DE102009047592B4 - Process for producing a silicon intermediate carrier - Google Patents

Abstract

Method for producing a silicon intermediate carrier (1) for mounting a microelectromechanical device and / or an electronic device having an integrated circuit on a substrate, comprising the method steps:
a) introducing at least one recess (2) into a silicon substrate (3) by means of a laser method, wherein the recess (2) extends from a first side (I) to a second side (II) of the silicon substrate (3),
b) forming a first insulating layer (4) at least on a partial region of the surface of the silicon substrate (3) which extends from the first side (I) through the recess (2) to the second side (II) of the silicon substrate (3), and
c) applying electrically conductive material (5) to the first insulation layer (4) for forming at least one via from the first side (I) through the recess (2) to the second side (II) of the silicon substrate (3)
characterized in that the method after the method step c) the method step
d) heating the silicon substrate (3) to a temperature at which the electrically conductive material (5) melts, and then cooling the silicon substrate (3) to a temperature at which the electrically conductive material (5) solidifies,
includes.

Description

The present invention relates to a method for producing a silicon intermediate carrier as well as intermediate silicon carrier.

State of the art

Miniaturization is a current trend in the design and connection technology of integrated circuit chips (IC chips) and microelectromechanical system chips (MEMS chips). If possible, the packaged component should not be much larger than the chip itself, which is also referred to as CSP (chip size package or chip scale package). One possibility for this is provided by the direct structure of the chip - without a package - on a substrate, which is also referred to as a nude chip ("bare die") or a nude chip assembly (COB, chip on board).

Nacktchipmontage in microelectromechanical systems (MEMS) for the entertainment and household electronics is complicated by the fact that the product usually contains two chips, namely a microelectromechanical system chip (MEMS chip) and an application-specific circuit chip (ASIC chip). If one were to build both chips directly on the substrate, one would have to deliver the chips to the customer individually and could not compare or test them together beforehand. In addition, microelectromechanical system chips are sensitive to mechanical stresses. Such mechanical stresses can occur, in particular in the case of temperature fluctuations, due to different coefficients of thermal expansion of the built-up materials, for example the chip, the solders, the substrate and can disturb the functioning of the system.

The publication US 7,447,323 B2 describes an arrangement in which a transducer element, in particular a microphone, and a device comprising an integrated circuit, are arranged side by side on a first side of a silicon intermediate carrier made of silicon. The intermediate silicon substrate has a via from the first side of the intermediate silicon substrate to a second side of the intermediate silicon substrate to electrically couple the transducer element and the first side electronic device via via to a substrate, such as an electrical circuit board, disposed on the second side of the intermediate silicon substrate connect to. In this case, thermomechanical voltages from the substrate to the transducer element or the electronic device can be reduced by the intermediate silicon carrier.

The publication US 7,447,323 B2 proposes to make the via by etching, in particular wet chemical etching or plasma etching, and subsequent metallization. In particular, due to the etching process is the method according to the document US 7,447,323 B2 However, associated with relatively high production costs.

From the DE 10 2006 012 645 A1 Already a packaging of integrated circuits at wafer level is known. A wafer level packaged integrated circuit is fabricated by setting a cap wafer on top of an IC wafer before cutting the IC wafer, that is, before singulating the plurality of chips on the IC wafer. Electrically conductive paths extend through the cap wafer between wafer pads on the top surface of the cap and the electrical contact points of the IC wafer. Holes are introduced into the cover wafer, for example, by laser drilling. On the cover wafer, an electrically insulating layer is applied. In the holes, an electrically conductive material is introduced.

Disclosure of the invention

• a) Einbringen mindestens einer Ausnehmung in ein Siliziumsubstrat mittels eines Laserverfahrens, beispielsweise Laserablationsverfahrens, wobei sich die Ausnehmung von einer ersten Seite zu einer zweiten Seite des Siliziumsubstrats erstreckt,
• b) Ausbilden einer ersten Isolationsschicht zumindest auf einem Teilbereich der Oberfläche des Siliziumsubstrats, welcher sich von der ersten Seite durch die Ausnehmung zur zweiten Seite des Siliziumsubstrats erstreckt, und
• c) Aufbringen von elektrisch leitendem Material auf die erste Isolationsschicht zum Ausbilden mindestens einer Durchkontaktierung von der ersten Seite durch die Ausnehmung zur zweiten Seite des Siliziumsubstrats.

The present invention relates to a method for producing a silicon intermediate carrier for mounting a microelectromechanical device and / or an electronic device having an integrated circuit on a substrate, in particular an electronic circuit board, comprising the method steps:

• a) introducing at least one recess into a silicon substrate by means of a laser method, for example laser ablation method, wherein the recess extends from a first side to a second side of the silicon substrate,
• b) forming a first insulating layer at least on a partial region of the surface of the silicon substrate, which extends from the first side through the recess to the second side of the silicon substrate, and
• c) applying electrically conductive material to the first insulating layer to form at least one via from the first side through the recess to the second side of the silicon substrate.

The method according to the invention has the advantage that it makes it possible to manufacture intermediate silicon carriers in an extremely cost-effective manner. Thus, among others, in the Thermal expansion coefficients substantiated material advantage of silicon compared to plastic-silicon intermediate carriers are realized taking into account the cost pressure. Advantageously, the method according to the invention for producing an intermediate silicon substrate does not require lithography and / or etching processes. In addition, a clean room environment is not necessarily required for the realization.

The laser process can advantageously be carried out at very high speed. It has been found that rough surfaces or debris (laser-drilling) occurring in the laser process may have an advantageous effect on the adhesion of the electrically conductive material.

In method step a), the at least one recess can be introduced in particular by laser drilling. Accordingly, the recess may also be referred to as a bore through the silicon substrate. The process according to the invention comprises, after process step c), the process step
d) heating the silicon substrate ( 3 ) to a temperature at which the electrically conductive material ( 5 ), and then cooling the silicon substrate ( 3 ) to a temperature at which the electrically conductive material ( 5 ) solidifies.

In this way, on the one hand, a better connection of the electrically conductive material to the first insulating layer can be ensured. On the other hand, electrically conductive material applied on the first and / or second side of the silicon substrate can flow into the recess and form the plated-through hole.

Within the scope of an embodiment of the method, adjustment marks, for example for the later separation of the silicon substrate and / or for the subsequent positioning of the devices, in particular by means of the laser method, are furthermore introduced in method step a).

In a further embodiment of the method, in method step b), the first insulation layer is formed by oxidizing the surface of the silicon substrate. This can have an advantageous effect on rough surfaces or debris (ejection in laser drilling) which may occur during the laser process. In method step b), the first insulation layer can be formed both by at least partial as well as by complete oxidation of the surface of the silicon substrate. A complete oxidation of the surface can be carried out with a lower process outlay.

Within the scope of a further embodiment of the method, in method step b), the first insulation layer is formed by thermal oxidation of the surface of the silicon substrate. This can be done, for example, in an oven under an oxidizing atmosphere, in particular an oxygen-containing atmosphere, for example in air. By thermal oxidation, the silicon substrate can be isolated on all sides.

Within the scope of a further embodiment of the method, in the method steps b) and / or c), in particular at the same time, at least one first electrical conductor track is formed on the first and / or second side of the silicon substrate with the at least one via, wherein in method step b) the first insulation layer is formed at least on the partial regions of the surface of the silicon substrate, on which the at least one first electrical conductor is formed in method step c).

Within the scope of a further embodiment of the method, in method step c) the electrically conductive material is applied by a printing method, in particular a screen printing method. Printing processes can advantageously be very cost-effective and be carried out in a continuous process. In addition, printed conductors advantageously can be used to realize strip conductors with a width of ≥ 100 μm.

• c1) Aufbringen von elektrisch leitendem Material auf die erste Isolationsschicht auf der ersten Seite des Siliziumsubstrats, und den Verfahrensschritt
• c2) Aufbringen von elektrisch leitendem Material auf die erste Isolationsschicht auf der zweiten Seite des Siliziumsubstrats.

unterteilt sein.The method step c) can in the process step

• c1) applying electrically conductive material to the first insulating layer on the first side of the silicon substrate, and the method step
• c2) applying electrically conductive material to the first insulating layer on the second side of the silicon substrate.

be divided.

Within the scope of a further embodiment of the method, process step d) is carried out in vacuo. In this way, inclusions in the electrically conductive material can be avoided.

• c1) Aufbringen von elektrisch leitendem Material auf die erste Isolationsschicht auf der ersten Seite des Siliziumsubstrats,
• d1) erstes Erhitzen des Siliziumsubstrats auf eine Temperatur, bei der das elektrisch leitende Material schmilzt, und anschließendes Abkühlen des Siliziumsubstrats auf eine Temperatur, bei der das elektrisch leitende Material erstarrt,
• c2) Aufbringen von elektrisch leitendem Material auf die erste Isolationsschicht auf der zweiten Seite des Siliziumsubstrats, und
• d2) zweites Erhitzen des Siliziumsubstrats auf eine Temperatur, bei der das elektrisch leitende Material schmilzt, und anschließendes Abkühlen des Siliziumsubstrats auf eine Temperatur, bei der das elektrisch leitende Material erstarrt.

Within the scope of a further embodiment of the method, method steps c) and d) are subdivided into the following method steps c1) and c2) as well as d1) and d2):

• c1) applying electrically conductive material to the first insulating layer on the first side of the silicon substrate,
• d1) first heating the silicon substrate to a temperature at which the electrically conductive Material melts, and then cooling the silicon substrate to a temperature at which solidifies the electrically conductive material,
• c2) applying electrically conductive material to the first insulating layer on the second side of the silicon substrate, and
• d2) second heating the silicon substrate to a temperature at which the electrically conductive material melts, and then cooling the silicon substrate to a temperature at which the electrically conductive material solidifies.

In this case, the silicon substrate can be rotated between method step d1) and method step c2), for example by 180 °, about an axis lying in the substrate plane. In method step d1), the silicon substrate is preferably arranged such that the first side of the silicon substrate is at the top with respect to the direction of gravity. In method step d2), the silicon substrate is preferably arranged such that the second side of the silicon substrate is at the top with respect to the direction of gravity. In this way, the electrically conductive material can flow into the recess in each case by means of the gravitational force.

The method may further comprise a method step after method step c) and / or d)
e1) comprising applying at least one second insulating layer.

In this case, the second insulation layer can be partially applied to the first insulation layer, in particular to the uncovered regions, for example the regions of the first insulation layer not covered by the at least one first electrical conductor, and / or partially to the at least one via and / or partially to the at least one first electrical conductor track are applied.

For example, the second insulation layer may be applied such that the at least one first electrical conductor is bounded laterally by the second insulation layer. In this way it can be prevented that the at least one first electrical conductor runs during heating in method step d) or loses the contour.

Alternatively or additionally, the second insulation layer may be partially applied to the at least one via or the at least one first electrical trace so that a portion of the at least one via or the at least one first electrical trace for contacting the via or the first electrical trace not with the second insulating layer is covered. In this way, the through-connection or the first electrical conductor track can be insulated in part to the outside and yet be partially contactable from the outside.

The application of the second insulating layer can take place in one step or in two or more steps. By way of example, the second insulation layer can be applied to the first and / or second side of the silicon substrate in one step, with the exception of the regions for contacting the contacts by means of first electrical conductor tracks. However, in a first step, the second insulation layer can also be applied to the first insulation layer in such a way that the at least one first electrical conductor is bounded laterally by the second insulation layer, and in a second step partially (and partially) to the at least one first electrical conductor on the second insulation layer region produced in the first step), that part of the at least one first electrical conductor for contacting the first electrical conductor is not covered with the second insulation layer. The application of the second insulating layer can advantageously be carried out by a cost-effective and in a continuous process feasible printing process.

Within the scope of a further embodiment of the method, therefore, the method further comprises a method step after method step c) and / or d)
e1) applying at least one second insulating layer by a printing process.

The printing process can be, for example, a seal glass printing process or a polymer printing process. In particular, the printing process may be a screen printing process.

The method can after the process step e1) a process step
e2) applying at least one second electrical conductor track to the at least one second insulating layer
include. In particular, in method step e2), the at least one second electrical conductor track can be applied to the at least one second insulation layer by a printing method. The printing process can also be a screen printing process.

In particular, the method steps e1) and e2) can take place several times alternately one behind the other. Thus, crossovers of printed conductors can be realized.

However, crossovers of interconnects can also be ensured by guiding the interconnects by means of a via on the other side of the silicon intermediate carrier. In order to realize a crossover between two interconnects, one of the interconnects may be passed through a via from one side of the silicon substrate to the other side of the silicon substrate. Optionally, the one conductor can then be returned through a second via again. For example, the conductor tracks and plated-through holes can be formed in such a way that at least one conductor track arranged on the first side is subdivided into a plurality of conductor track sections, in particular in order to realize a crossover with another track arranged on the first side of the silicon substrate, wherein a first conductor track section on one side of the Contacting a silicon substrate, a first via, wherein the first via on the second side of the silicon substrate contacts a second trace portion. The second track section may continue to contact a second via on the second side of the silicon substrate, the second via on the first side of the silicon substrate contacting a third trace section.

The method can furthermore, after method step c) and / or d) and / or e), comprise a method step
f) separating, for example sawing, in particular singulating, the silicon substrate into two or more smaller silicon substrates, in particular a multiplicity of smaller silicon substrates,
include.

By carrying out the process on a large silicon substrate and subsequent separation, it is advantageously possible to produce many intermediate silicon substrates in a short time and to further reduce the production costs.

In a further embodiment of the method, the silicon substrate is made of polycrystalline silicon and / or silicon of low purity (metallurgical grade) and / or recycled silicon. In this way, the production costs can advantageously be further reduced.

The first and second sides of the silicon substrate may face each other. In particular, the first and second sides of the substrate may be substantially parallel to each other.

The intermediate silicon carrier can have on the first side a first group of contact elements, in particular selected from the group consisting of conductor tracks and plated-through holes, for contacting a microelectromechanical device and a second group of contact elements, in particular selected from the group consisting of conductor tracks and plated-through holes, for making contact electronic device comprising an integrated circuit. On the second side, the intermediate silicon carrier may comprise a further group of contact elements, in particular selected from the group consisting of conductor tracks and plated-through holes, for contacting an electronic circuit board, at least one of which is electrically connected to a contact element of the first or second group. The microelectromechanical device may, for example, be a pressure sensor or acceleration sensor or yaw rate sensor or microelectromechanical actuator. For example, the electronic device may include an application specific integrated circuit (ASIC) as an integrated circuit.

• - eine durch ein Laserverfahren eingebrachte Ausnehmung, und/oder
• - eine durch ein Laserverfahren eingebrachte Justagemarke, und/oder
• - eine durch ein Druckverfahren, insbesondere Siebdruckverfahren, aufgebrachte Leiterbahn,
• - eine das Siliziumsubstrat, insbesondere vollständig, umgebende Siliziumoxidschicht als erste Isolationsschicht, und/oder
• - eine durch ein Druckverfahren, insbesondere Siebdruckverfahren, aufgebrachte zweite Isolationsschicht,

umfasst.Another object of the present invention is an intermediate silicon carrier, in particular produced by a method according to the invention, which is characterized in that the intermediate silicon carrier at least

• - A introduced by a laser process recess, and / or
• a calibration mark introduced by a laser process, and / or
• a printed circuit board applied by a printing method, in particular a screen printing method,
• - A silicon substrate, in particular completely, surrounding silicon oxide layer as the first insulating layer, and / or
• a second insulating layer applied by a printing process, in particular a screen printing process,

includes.

The intermediate silicon carrier can have on the first side a first group of contact elements, in particular selected from the group consisting of conductor tracks and plated-through holes, for contacting a microelectromechanical device and a second group of contact elements, in particular selected from the group consisting of conductor tracks and plated-through holes, for making contact electronic device comprising an integrated circuit. On the second side, the intermediate silicon carrier may comprise a further group of contact elements, in particular selected from the group consisting of conductor tracks and plated-through holes, for contacting an electronic circuit board, at least one of which is electrically connected to a contact element of the first or second group. The microelectromechanical device may be, for example, a pressure sensor or an acceleration sensor. For example, the electronic device may include an application specific integrated circuit (ASIC) as an integrated circuit.

list of figures

• 1 einen schematisierten Querschnitt durch eine Ausführungsform eines erfindungsgemäßen Siliziumzwischenträgers.

Further advantages and advantageous embodiments of the objects according to the invention are illustrated by the drawing and explained in the following description. It should be noted that the drawing has only descriptive character and is not intended to limit the invention in any way. It shows

• 1 a schematic cross section through an embodiment of a silicon intermediate carrier according to the invention.

1 shows that the silicon subcarrier 1 a silicon substrate 3 with a first page I and a second II , the first I has parallel opposite side. In this silicon substrate 3 became a recess by means of a laser process 2 introduced, which differs from the first page I to the second page II of the silicon substrate 3 extends. Subsequently, by oxidation on the surface of the silicon substrate, a silicon substrate became 3 completely surrounding silicon oxide layer 4 formed, which acts as a first insulating layer.

After that became an electrically conductive material 5 for forming the via 6 and of electrical conductors 7 first on the first insulation layer 4 on the first page I of the silicon substrate 3 applied. Simultaneously or subsequently, a region of a second insulation layer was formed 8th such by a printing process on the first insulating layer 4 on the first page I of the silicon substrate 3 Applied to the electrical conductors 7 laterally through the second insulation layer region 8th be limited. Thereafter, the silicon substrate became 3 a first time to a temperature at which the electrically conductive material 5 melts and heats up again to a temperature at which the electrically conductive material 5 solidified, cooled. It was the silicon substrate 3 arranged such that the first page I of the silicon substrate 3 with respect to the direction of gravity at the top. That's how it worked on the first page I of the silicon substrate 3 applied, electrically conductive material 5 into the recess 2 flow in and a first part of the via 6 form. Subsequently, the silicon substrate became 3 rotated 180 ° about an axis lying in the substrate plane, so that the silicon substrate 3 was arranged such that the second side II of the silicon substrate 3 with respect to the direction of gravity at the top. Then became electrically conductive material 5 for forming the via 6 and of electrical conductors 7 on the first insulation layer 4 on the second page II of the silicon substrate 3 applied. Simultaneously or subsequently, a region of the second insulation layer became 8th such by a printing process on the first insulating layer 4 on the second page II of the silicon substrate 3 Applied to the electrical conductors 7 laterally through the second insulation layer region 8th be limited. Thereafter, the silicon substrate became 3 a second time to a temperature at which the electrically conductive material 5 melts, heats and then to a temperature at which the electrically conductive material 5 solidified, cooled. That's how it worked on the second page II of the silicon substrate 3 applied, electrically conductive material 5 into the recess 2 flow in and a second part of the via 6 form.

After that it was printed on both sides I . II of the silicon subcarrier 1 in each case a further region of the second insulation layer 8th applied, wherein the further region of the second insulating layer 8th so partially on the tracks 7 and partially on the previously prepared second insulation layer region 8th was applied that part of the tracks 7 for later contacting each not with the second insulation layer 8th was covered.

Claims (10)

Method for producing a silicon intermediate carrier (1) for mounting a microelectromechanical device and / or an electronic device having an integrated circuit on a substrate, comprising the method steps: a) introducing at least one recess (2) into a silicon substrate (3) by means of a laser method wherein the recess (2) extends from a first side (I) to a second side (II) of the silicon substrate (3), b) forming a first insulation layer (4) at least on a partial region of the surface of the silicon substrate (3), which extends from the first side (I) through the recess (2) to the second side (II) of the silicon substrate (3), and c) applying electrically conductive material (5) to the first insulating layer (4) to form at least one Through-contact from the first side (I) through the recess (2) to the second side (II) of the silicon substrate (3), characterized in that s the process after process step c) the process step d) heating the Silicon substrate (3) to a temperature at which the electrically conductive material (5) melts, and then cooling the silicon substrate (3) to a temperature at which the electrically conductive material (5) solidifies comprises. Method according to Claim 1 , characterized in that in method step a) further alignment marks are introduced. Method according to Claim 1 or 2 , characterized in that in step b) the first insulating layer (4) is formed by oxidizing the surface of the silicon substrate (3). Method according to one of Claims 1 to 3 , characterized in that in step b), the first insulating layer (4) by thermal oxidation of the surface of the silicon substrate (3) is formed. Method according to one of Claims 1 to 4 , characterized in that formed in the method steps b) and c) with the at least one via (6) and at least one first electrical conductor track (7) on the first (I) and / or second (II) side of the silicon substrate (3) is, wherein in step b), the first insulating layer (4) is formed at least on the portions of the surface of the silicon substrate (3) on which in step c) the at least one first electrical conductor track (7) is formed. Method according to one of Claims 1 to 5 , characterized in that in step c) the electrically conductive material (5) is applied by a printing process. Method according to one of Claims 1 - 6 , characterized in that method step d) is carried out in vacuo. Method according to one of Claims 1 to 7 , characterized in that the method steps c) and d) are subdivided into the following method steps c1) and c2) as well as d1) and d2): c1) applying electrically conductive material (5) to the first insulating layer (4) on the first (I) of the silicon substrate (3), d1) first heating the silicon substrate (3) to a temperature at which the electrically conductive material (5) melts, and then cooling the silicon substrate (3) to a temperature at which the electric conductive material (5) solidifies, c2) applying electrically conductive material (5) to the first insulating layer (4) on the second side (II) of the silicon substrate (3), and d2) second heating the silicon substrate (3) to a temperature in which the electrically conductive material (5) melts, and then cooling the silicon substrate (3) to a temperature at which the electrically conductive material (5) solidifies. Method according to one of Claims 1 to 8th , characterized in that the method further comprises, after process step c) and / or d), a process step: e1) applying at least one second insulation layer (8) by a printing process. Method according to one of Claims 1 to 9 , characterized in that the silicon substrate (3) is formed of polycrystalline silicon and / or silicon of low purity and / or recycled silicon.

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