DE102008026500B4 - Method and device for regulating the commutation speed between series-connected power electronic actuators with an inductive load - Google Patents

Abstract

Method for regulating the commutation speed between series-connected power electronic actuators (5-1, 5-2, 6-1, 6-2) with inductive load (4), the actuators (5-1, 5-2, 6-1 , 6-2) are arranged in a circuit breaker arrangement (3) between a positive supply potential (VS) and a reference potential (GND), of which at least one actuator (5-1, 5-2) is actively switched on and off and via control signal lines (7-1, 7-2) is connected to a control circuit (2) which contains a central control circuit (2-1) with subcircuits located therein, the control circuit (2) being preceded by a higher-level programming and control unit (1) is, characterized in that the voltage or the current on the control signal line (7-1, 7-2) of the actively switching actuator (5-1, 5-2) is varied during a switching process in at least two time intervals, with at least one time interval as a parameter on an e rsten and a second, from a subcircuit (2-1b) of the central control circuit (2-1) having a control algorithm of the digital edge regulation to an auxiliary signal circuit (2-3) for generating time-delayed auxiliary signals for the control of driver stages (2-6, 2 -7) for associated driver partial current sources (17-1, 17-2, 17-3, 17-4) of the actuators (5-1, 5-2) leading parameter transfer line (13-1, 13-2) depending on measurement signals at least one measurement signal tap (10-1; 10-2, 10-3, 10-4) from the circuit breaker arrangement (3) and in each switching period of a signal on a control input interface (18) from the higher-level programming and control unit (1) so adaptively varies by a fixed or variable step size it is stored that after a finite number n≥1 of switching periods the commutation duration in a fixed ratio to a second predetermined time interval as a parameter on a third and a fourth subcircuit (2-1d) of the central control circuit (2-1) to the auxiliary signal circuit (2-3) for generating time-delayed auxiliary signals for controlling driver stages (2-6, 2-7) for associated driver partial current sources (17-1, 17-2, 17-3, 17 -4) of the actuators (5-1, 5-2) leading parameter transfer line (13-3, 13-4) is and also in the case of changing operating conditions of the circuit breaker arrangement (3) in the fixed ratio will.

Description

The invention relates to a method and a device for regulating the commutation speed between series-connected power electronic actuators with an inductive load, the actuators being arranged in a circuit breaker arrangement between a positive supply potential and a reference potential, of which at least one actuator is actively switched on and off and is connected via control signal lines to a control circuit which contains a central control circuit with subcircuits located therein, and a higher-level programming and control unit is connected upstream of the control circuit.

Such a method for controlling power electronic actuators with the aim of low electromagnetic interference with low switching losses at the same time has already been published in various versions, in which the commutation speed is controlled within a power FET half-bridge, is implemented in the B6 driver circuit TLE 6280 GB and in the publication Infineon Technologies AG: 3-phase Bridge Driver IC TLE 6280GP, Data Sheet, 2004, http://www.infineon.com/upload/Document/cmc_upload/documents/010/TLE6280GP_F1.pdf, May 7, 2007 . The interference voltage induced in the load circuit is capacitively decoupled via a high-pass filter in the supply line and evaluated in the driver circuit. In this way, the driver current at the moment of switching is reduced proportionally to the occurring interference voltage.

A problem with this procedure is that it is only possible to respond to this event after a fault has occurred.

In systems with an inductive load, a continuous load current flows and the circuit breaker arrangement is designed in such a way that an electronic power actuator can take over the load current in every switching state.

The commutation duration or the commutation speed is influenced by adaptive control methods. A schematic diagram of a conventional device consists of a higher-level control unit 1 (e.g. a microcontroller) and a control circuit 2 with feedback from the circuit breaker arrangement 3 with inductive load 4th , as in 1 shown, which indicates a greatly simplified block diagram of a switching converter with detection and feedback of the current half-bridge state, the circuit breaker arrangement 3 including the inductive load 4th with the control circuit 2 is in communication both via incoming control signals present on the input side and via status information signals on the output side. The control circuit 2 is a higher-level programming and control unit 1 upstream.

A corresponding circuit breaker arrangement 3 consists of two power electronic actuators connected in series 5-1 , 5-2 , 6-1 , 6-2 in the form of circuit breakers. These must be controlled in such a way that both actuators never switch actively 5-1 , 5-2 are switched on at the same time.

In order to be able to carry the load current in every switching state, the arrangement must contain at least one actively switching actuator (e.g. MOSFET) and one passively switching actuator (e.g. diode). However, two actively switching actuators can also be used, in which an additional passively switching actuator takes over the load current during the switching pauses.

A conventional circuit breaker arrangement 3 with two MOSFET power switches 5-1 and 5-2 , consisting of M1 and M2, is in 3 shown. When using MOSFETs, the passively switching actuators are already present 6-1 and 6-2 integrated as diodes in the circuit breaker due to the principle. Such a circuit breaker arrangement 3 is commonly referred to as a half bridge.

The two circuit breakers 5-1 and 5-2 are through the two control signal lines 7-1 and 7-2 controlled alternately so that there is an almost constant load current through the inductive load 4th sets with low current ripple. About the ratio of the switch-on times of the circuit breakers 5-1 and 5-2 the power can be set at the output of the circuit breaker arrangement.

Such a circuit breaker arrangement 3 is z. B. used to control DC machines and as DC voltage switching converters to supply electronic systems. When using several half-bridges, the area of application expands z. B. on electronically commutated machines.

The control signals on the control signal lines 7-1 and 7-2 are designed so that only one of the circuit breakers 5-1 or 5-2 is switched on. A switching pause (dead time) is inserted in which both circuit breakers 5-1 and 5-2 are turned off. This is always associated with a commutation of the load current to one of the two diodes 6-1 and 6-2 , regardless of whether a half bridge is set up with one or two actively switched actuators. In the example in 3 the load current always commutes to the second diode 6-2 .

The second diode must 6-2 thus switch from the blocking to the passing range and vice versa in order to take over the load current. Frequently used PIN diodes in particular have an unfavorable switch-on and switch-off behavior, which causes additional losses and excites parasitic resonant circuits in the structure.

During the opening process of the first circuit breaker 5-1 can the second diode 6-2 Do not switch from the restricted area to the passband as quickly as you like (forward recovery behavior). A switch-on voltage peak occurs at the load connection 8th on. The switch-on voltage peak is greater, the greater the rate of current change. It must therefore have a higher dielectric strength when dimensioning the circuit breaker arrangement 3 must be taken into account.

When the first circuit breaker closes 5-1 can the second diode 6-2 do not lock as quickly as you like (reverse recovery behavior). The inner orbit area of the second diode 6-2 must be cleared of load carriers. This causes one through the first breaker 5-1 and the second diode 6-2 flowing cross current in addition to the load current. The cross current creates additional losses in the first circuit breaker 5-1 . Is the inner orbit area of the second diode 6-2 cleared, there is an abrupt break in the cross flow. The current interruption ensures that a series resonant circuit, consisting of line inductances, as in 3 shown, and junction capacitances of the second circuit breaker 5-2 and the second diode 6-2 , is stimulated.

The reverse current spike through the second diode 6-2 and thus the maximum cross current through the first circuit breaker 5-1 and through the second diode 6-2 is determined by the previous rate of change of current. The lower the previous rate of current change in the second diode 6-2 is, the lower the reverse current peak and the lower the excitation of the parasitic resonant circuits.

The properties described cause a lower efficiency of the circuit breaker arrangement and worsen the electromagnetic compatibility, in particular the emission of interference.

In order to be able to influence these properties, the commutation duration and thus the rate of current change during commutation between two power electronic actuators should be regulated.

Adaptive control methods are primarily implemented in integrated driver circuits. In order to target the behavior of the actively switching power electronic actuators 5-1 and 5-2 To be able to act during the switching processes, information about the current state of the circuit breaker arrangement 3 won. Criteria for forming the control variables on the control signal lines are then derived from the feedback variables 7-1 and 7-2 for the circuit breakers 5-1 and 5-2 derived.

Using the example of a partially conventional MOSFET half-bridge 3 the gate current is the primary control variable that controls the gate capacitances of the active actuators 5-1 and 5-2 reloads. This results in the resulting voltages on the control signal lines 7-1 and 7-2 .

This enables the commutation duration to be regulated. As the commutation period increases, the switching power loss in the active actuators increases 5-1 and 5-2 too, which leads to a lower level of efficiency. At the same time, however, the parasitic resonant circuits of the circuit breaker arrangement 3 less excited. This in turn reduces the electromagnetic emissions. By specifying the commutation time, a good compromise with high efficiency and good EMC behavior can be set for the respective application.

A method for regulating the commutation time between power electronic actuators with inductive load is in the publication DE 40 13 997 C2 described, in which the voltage at the connection point between two circuit breakers connected as a half bridge is removed and the control current for driving the circuit breakers is controlled as a function of a comparison voltage. The The method enables a longer commutation period to be set in order to enable safe switching between an actively switched circuit breaker and a passive freewheeling element. One problem, however, is that voltages are induced in the parasitic inductances of the structure during commutation. The voltages falsify the measured voltage and thus lead to undesirable behavior of the method. Furthermore, due to the signal delays of the control circuit, the reaction to the current state of the circuit breaker arrangement is transmitted to the circuit breaker too late. The same problems also arise in the processes described in the documents DE 102 61 433 B3 and DE 102 17 611 B4 are described on.

A method and a device for controlling a power output stage with a switch, a freewheeling diode and an inductive load are described in the publication DE 198 55 604 C1 described. To generate the control sequence, an automat is used there, which is switched on by external results during the active switching process (e.g. exceeding a current threshold value Is, falling below a voltage threshold value Vs, etc.). The circuit breaker is charged with a high load current for EMI-compatible activation until the drain current exceeds a current threshold value, then charged with a lower charging current assigned to the desired rate of increase until the drain voltage falls below a specified voltage threshold value, and then for a specified duration with the large one Charging current charged further is controlled in almost the reverse order.

The method appears to be suitable for arrangements with a circuit breaker.

One problem is that due to the delay times in the detection, control errors arise that lead to non-optimal switching behavior. The method can only be used for power output stages with a switch. An extension to a half-bridge is not possible with this method, since for this purpose the freewheeling direction must also be determined and different control signal sequences must be generated for the active path and the non-active path.

The invention is based on the object of specifying a method and a device for regulating the commutation speed between series-connected power electronic actuators with inductive load, which are suitably designed so that an improvement in the EMC behavior with high efficiency of the circuit breaker arrangement connected to the device at the same time is achieved by avoiding excitations of the parasitic series resonant circuits.

The object of the invention is achieved by the features of claims 1 and 23.

In the method for regulating the commutation speed between series-connected power electronic actuators with inductive load, the actuators are arranged in a circuit breaker arrangement between a positive supply potential and a reference potential, of which at least one actuator is actively switched on and off and via control signal lines with a control circuit that contains a central control circuit with subcircuits located therein, the control circuit being preceded by a higher-level programming and control unit, the voltage or current on the control signal line of the actively switching actuator during a switching process in at least two time intervals according to the characterizing part of claim 1 is varied, with at least one time interval as a parameter on a first and a second, of one having a control algorithm of the digital edge regulation end sub-circuit of the central control circuit to an auxiliary signal circuit for generating time-delayed auxiliary signals for the control of driver stages for associated driver partial current sources of the actuators leading parameter transfer line depending on measurement signals on at least one measurement signal tap from the circuit breaker arrangement and in each switching period of a signal on a control input interface from the higher-level programming and Control unit is so adaptively varied and stored by a fixed or variable step size that after a finite number n≥1 of switching periods, the commutation period in a fixed ratio to a second predetermined time interval as a parameter on a third and a fourth, of a register for the Subcircuit, representing commutation duration setpoints, of the central control circuit for the auxiliary signal circuit for generating time-delayed auxiliary signals for the control of driver units fen stands for associated driver partial power sources of the actuators leading parameter transfer line and is kept in the fixed ratio even with changing operating conditions of the circuit breaker arrangement.

The parameters of the voltage and the current on the control signal lines in the different time intervals and the duration of the constant time intervals on the third and fourth Parameter transfer lines can be specified by the higher-level programming and control unit and stored in the control circuit via the interfaces.

Another possibility is to permanently implement the parameters mentioned in the control circuit.

By evaluating the measurement signals fed back to the control circuit on the measurement signal taps, the current state of the circuit breaker arrangement is determined in such a way that the active actuator determining the commutation in the next switching process is selected and controlled.

The measurement signals determined from the circuit breaker arrangement on the measurement signal taps can be designed in such a way that a voltage proportional to the commutation speed is induced in one of the actuators by a measuring inductance connected in series with the actuators.

The voltage induced in the measuring inductance is evaluated by the control circuit, the current state of the circuit breaker arrangement is determined and stored and is available for downstream circuit parts of the control circuit via the status register output.

The measurement signals determined from the circuit breaker arrangement on the measurement signal taps can furthermore also be designed in such a way that the voltages on the control signal lines and on the load connection of the circuit breaker arrangement are measured.

The measured voltage on the measurement signal tap at the load connection can be influenced by correction factors in such a way that despite a voltage corruption of the measured voltage as a result of commutation between the power electronic actuators, the state on the state register output line of the third subcircuit corresponds to the actual state of the circuit breaker arrangement.

The measurement signals determined from the circuit breaker arrangement on the measurement signal taps are evaluated in the control circuit and are available on the status register output lines for downstream circuit parts.

• - eine Mess- und Bewertungsschaltung, welche Verbindungen zu den Messsignalabgriffen und zum Signal auf der Steuervorgabeschnittstelle besitzt und über Zustandserfassungsleitungen Signale an die zentrale Steuerschaltung überträgt, welche in Verbindung zum Beginn und zum Ende der Kommutierung stehen,
• - die zentrale Steuerschaltung, welche mit der Mess- und Bewertungsschaltung über Zustandserfassungsleitungen verbunden ist und durch mindestens eine Signalleitung über die Steuervorgabeschnittstelle und durch mindestens eine Signalleitung zur Vorgabe von Zeitparametern auf der ersten Programmierschnittstelle mit der übergeordneten Programmier- und Steuereinheit in Verbindung steht,
• - eine Hilfssignalschaltung, welche mit der zentralen Steuerschaltung durch Zustandsregisterausgangsleitungen, Parameterübergabeleitungen und Hilfssignalrückführungsleitungen in Verbindung steht und über mindestens eine Signalleitung der Steuervorgabeschnittstelle mit der übergeordneten Programmier- und Steuereinheit verbunden ist,
• - mindestens zwei Ansteuerteilschaltungen, welche über Hilfssignalleitungen mit der Hilfssignalschaltung verbunden sind, und
• - mindestens zwei Treiberschaltungen, welche über Treibersteuerleitungen mit den Ansteuerteilschaltungen verbunden sind und durch Signalleitungen zur Vorgabe von Treiberteilstromniveaus auf der zweiten Programmierschnittstelle mit der übergeordneten Programmier- und Steuereinheit in Verbindung stehen sowie über die Steuersignalleitungen mit der Leistungsschalteranordnung verbunden sind.

In the device for regulating the commutation speed between series-connected power electronic actuators with inductive load, the actuators are arranged in a circuit breaker arrangement between a positive supply potential and a reference potential, of which at least one actuator is actively switched on and off and via control signal lines with a control circuit that a central control circuit with subcircuits located therein, the control circuit being preceded by a higher-level programming and control unit, operated according to the aforementioned method, wherein according to the characterizing part of claim 23 at least one actively switching actuator is connected by the control signal lines to a control circuit and by means of at least one measurement signal tap, it records measured variables from the circuit breaker arrangement and exercises control sequences for the actively switching actuators r control signal lines generated depending on the signal on the control specification interface and programming interfaces of a higher-level programming and control unit, the control circuit containing the following assemblies:

• - a measurement and evaluation circuit which has connections to the measurement signal taps and to the signal on the control input interface and transmits signals to the central control circuit via status detection lines which are connected to the start and end of the commutation,
• the central control circuit, which is connected to the measurement and evaluation circuit via status detection lines and is connected to the higher-level programming and control unit by at least one signal line via the control input interface and by at least one signal line for specifying time parameters on the first programming interface,
• - an auxiliary signal circuit which is connected to the central control circuit by status register output lines, parameter transfer lines and auxiliary signal return lines and is connected to the higher-level programming and control unit via at least one signal line of the control input interface,
• - At least two control subcircuits which are connected to the auxiliary signal circuit via auxiliary signal lines, and
• - at least two driver circuits which are connected to the control subcircuits via driver control lines and which are connected to the higher-level programming and control unit via signal lines for specifying partial driver current levels on the second programming interface and which are connected to the circuit breaker arrangement via the control signal lines.

• - einer ersten Teilschaltung als Speicher für den Beginn und das Ende der Kommutierung,
• - einer zweiten Teilschaltung als Speicher mit dem Regelalgorithmus der digitalen Flankenregelung,
• - einer dritten Teilschaltung als Speicher und Kombinatorik zum Bestimmen und Speichern des aktuellen Zustandes der Leistungsschalteranordnung und
• - einer vierten Teilschaltung als Register für die Kommutierungdauer-Sollwerte.

The central control circuit consists of

• - a first sub-circuit as a memory for the beginning and the end of the commutation,
• - a second sub-circuit as a memory with the control algorithm of the digital edge control,
• - A third sub-circuit as a memory and combinatorial system for determining and storing the current state of the circuit breaker arrangement and
• - A fourth sub-circuit as a register for the commutation duration setpoints.

Further developments and special configurations of the invention are specified in further subclaims.

The invention is to be explained in more detail using an exemplary embodiment with measurement of the beginning and end of the commutation by means of the induced voltage across the inductance in one of the commutation paths by means of several drawings.

• 1 ein stark vereinfachtes Blockschaltbild eines Gesamtsystems mit Erfassung und Rückkopplung des aktuellen Zustandes der Leistungsschalteranordnung nach dem Stand der Technik,
• 2 ein Blockschaltbild einer Ansteuerschaltung 2 mit einer übergeordneten Programmier- und Steuereinheit 1, das in zwei Blockschaltteilbilder unterteilt ist, wobei
  • 2a ein Blockschaltteilbild einer Mess- und Bewertungsschaltung 2-2 und eine zentrale Steuerschaltung 2-1 mit zugehörigen Teilschaltungen 2-1a, 2-1b, 2-1c, 2-1d und
  • 2b ein Blockschaltteilbild einer Hilfssignalschaltung 2-3, Ansteuerteilschaltungen 2-4 und 2-5 zur Erzeugung von Treibersteuersignalen und einer ersten und zweiten Treiberschaltung 2-6 und 2-7 in Form von Treiberstufen, die an die zentrale Steuerschaltung 2-1 nach 2a anschließbar sind,
• 3 eine als MOSFET-Halbbrücke ausgebildete Leistungsschalteranordnung 3 mit als MOSFET-Leistungsschalter ausgebildeten aktiv schaltenden Stellgliedern 5-1, 5-2 und als Dioden ausgebildeten passiv schaltenden Stellgliedern 6-1, 6-2 mit parasitären Induktivitäten, die an die Treiberschaltungen 2-6 und 2-7 nach 2b anschließbar ist,
• 4 eine schematische Darstellung der Signalverläufe eines ersten aktiv schaltenden Stellglieds 5-1 in Form eines MOSFET-Leistungsschalters nach 3 während eines aktiven Einschaltvorgangs und eines aktiven Ausschaltvorgangs,
• 5 mehrere Diagramme zum aktiven Einschaltvorgang des ersten Leistungsschalters 5-1 nach 2 und 3, wobei
  • 5a ein Signal auf der Steuervorgabeschnittstelle 18, einen aktuellen Zustand der Halbbrücke 3 auf der Zustandsregisterausgangsleitung 12,
  • 5b die rückgeführte Spannung der Messinduktivität 9 auf dem Messsignalabgriff 10-1,
  • 5c die Spannung der Steuersignalleitungen 7-1, 7-2 für die Leistungsschatter 5-1 und 5-2 sowie die Spannung am Lastanschluss 8 der Halbbrücke 3 und
  • 5d den Strom durch die Leistungsschalter 5-1 und 5-2 sowie durch die zweite Freilaufdiode 6-2 zeigen,
• 6 mehrere Diagramme zum aktiven Ausschaltvorgang des ersten Leistungsschalters 5-1 nach den 2 und 3, wobei
  • 6a ein Signal auf der Steuervorgabeschnittstelle 18, einen aktuellen Zustand der Halbbrücke 3 auf der Zustandsregisterausgangsleitung 12,
  • 6b die rückgeführte Spannung der Messinduktivität 9 auf dem Messsignalabgriff 10-1,
  • 6c die Spannung der Steuersignalleitungen 7-1, 7-2 für die Leistungsschalter 5-1 und 5-2 sowie die Spannung am Lastanschluss 8 der Halbbrücke 3 und
  • 6d den Strom durch die Leistungsschalter 5-1 und 5-2 sowie durch die zweite Freilaufdiode 6-2 zeigen,
• 7 mehrere Diagramme für den Ausregelvorgang zur digitalen Regelung der Kommutierungsgeschwindigkeit, wobei
  • 7a das Signal auf der Steuervorgabeschnittstelle 18,
  • 7b die Spannung am Lastanschluss 8 der Halbbrücke 3
  • 7c den Strom durch den ersten Leistungsschalter 5-1 und
  • 7d die variablen Zeitparameter auf den Parameterübergabeleitungen 13-1 und 13-2 zeigen,
• 8a ein allgemeines Blockschaltbild des Gesamtsystems unter Nutzung einer Messinduktivität 9 und
• 8b ein allgemeines Blockschaltbild des Gesamtsystems unter Nutzung mehrerer Messsignalabgriffe zur Messung von Spannungen der Leistungsschalteranordnung 3.

Show it:

• 1 a greatly simplified block diagram of an overall system with detection and feedback of the current state of the circuit breaker arrangement according to the prior art,
• 2 a block diagram of a control circuit 2 with a higher-level programming and control unit 1 , which is divided into two block circuit diagrams, where
  • 2a a partial block diagram of a measurement and evaluation circuit 2-2 and a central control circuit 2-1 with associated sub-circuits 2-1a , 2-1b , 2-1c , 2-1d and
  • 2 B a partial block diagram of an auxiliary signal circuit 2-3 , Control subcircuits 2-4 and 2-5 for generating driver control signals and a first and second driver circuit 2-6 and 2-7 in the form of driver stages that are sent to the central control circuit 2-1 to 2a are connectable,
• 3 a power switch arrangement designed as a MOSFET half-bridge 3 with actively switching actuators designed as MOSFET power switches 5-1 , 5-2 and passively switching actuators designed as diodes 6-1 , 6-2 with parasitic inductances affecting the driver circuits 2-6 and 2-7 to 2 B is connectable,
• 4th a schematic representation of the signal curves of a first actively switching actuator 5-1 in the form of a MOSFET power switch 3 during an active switch-on process and an active switch-off process,
• 5 several diagrams for the active closing process of the first circuit breaker 5-1 to 2 and 3 , in which
  • 5a a signal on the control specification interface 18th , a current state of the half bridge 3 on the status register output line 12th ,
  • 5b the returned voltage of the measuring inductance 9 on the measurement signal tap 10-1 ,
  • 5c the voltage of the control signal lines 7-1 , 7-2 for the power switch 5-1 and 5-2 as well as the voltage at the load connection 8th the half bridge 3 and
  • 5d the current through the circuit breaker 5-1 and 5-2 as well as by the second freewheeling diode 6-2 demonstrate,
• 6th several diagrams for the active opening process of the first circuit breaker 5-1 after the 2 and 3 , in which
  • 6a a signal on the control specification interface 18th , a current state of the half bridge 3 on the status register output line 12th ,
  • 6b the returned voltage of the measuring inductance 9 on the measurement signal tap 10-1 ,
  • 6c the voltage of the control signal lines 7-1 , 7-2 for the circuit breakers 5-1 and 5-2 as well as the voltage at the load connection 8th the half bridge 3 and
  • 6d the current through the circuit breaker 5-1 and 5-2 as well as by the second freewheeling diode 6-2 demonstrate,
• 7th several diagrams for the compensation process for digital control of the commutation speed, whereby
  • 7a the signal on the control specification interface 18th ,
  • 7b the voltage at the load connection 8th the half bridge 3
  • 7c the current through the first circuit breaker 5-1 and
  • 7d the variable time parameters on the parameter transfer lines 13-1 and 13-2 demonstrate,
• 8a a general block diagram of the overall system using a measuring inductance 9 and
• 8b a general block diagram of the overall system using several measurement signal taps to measure voltages in the circuit breaker arrangement 3 .

The following are the 2a , 2 B and 3 Considered together The method according to the invention is based on a line switch arrangement designed as a MOSFET half-bridge 3 with inductive load 4th to 3 explained. The MOSFET M1 , M2 contain in addition to the actively switching actuators 5-1 and 5-2 In the form of MOSFET circuit breakers, one passively switching actuator in each case, due to the principle involved 6-1 and 6-2 in the form of diodes. Furthermore, a real structure always has a number of unavoidable parasitic inductances L _D , L _S , L _PCB1 , L _PCB2 . These are due to the inductance of the conductor tracks, the power FET connections and the bond wires.

The measurement inductance is used to measure the start and end of commutation 9 a specified line inductance or an inductance as a concentrated component in series with the circuit breakers 5-1 and 5-2 used. In 3 the preferred variant for measurement against reference potential GND is shown. Via a measurement signal tap 10-1 can be the induced voltage from the control circuit 2 be measured and assessed.

Above the measuring inductance 9 thus falls proportionally to the rate of change of the current through the second circuit breaker 5-2 or through the second diode 6-2 a voltage which is in the control circuit 2 corresponding 2a and 2 B evaluated and for controlling the circuit breaker 5-1 and 5-2 can be used. The measuring inductance 9 is dimensioned in such a way that a current change as a result of commutation for an evaluable induced voltage at the measurement signal tap 10-1 cares. With every switching process in which commutation takes place, a voltage pulse is generated at the measurement signal tap 10-1 with different polarity.

Based on the polarity of the induced voltage pulse and knowledge of the status of the signal on the control input interface 18th the higher-level programming and control unit 1 can determine the current load current _{direction i 8} at the load connection 8th the circuit breaker arrangement 3 and thus the current control and freewheeling path can be determined.

The control path denotes the current path which, when the corresponding circuit breaker is switched on, causes the supply voltage to drop VS across the inductive load 4th cares. The current path that short-circuits the two load connections is referred to as the free-wheeling path. In the in 3 circuit breaker arrangement shown 3 are always the first circuit breaker 5-1 in the control path and the second circuit breaker 5-2 or the second diode 6-2 in the freewheeling path.

Table 1 shows the four possible commutation processes for the in 3 Circuit breaker arrangement shown 3 listed. Table 1: Detectable states of the circuit breaker arrangement 3 during a switching process Commutation of the load current according to the signal on the control input interface 18 Polarity of the voltage induced at the measuring signal tap 10-1 Current state of the circuit breaker arrangement From To second circuit breaker 5-2 first circuit breaker 5-1 positive - ∂i ₉ / ∂t positive - i ₉ negative - 5-1 in the control path - 5-2 and 6-2 in the free- _{running path - i 8} positive second circuit breaker 5-2 first circuit breaker 5-1 negative - ∂i ₉ / ∂t negative - i ₉ positive - 5-2 in the control path - 5-1 and 6-1 in the free-wheeling path - i ₈ negative first circuit breaker 5-1 second circuit breaker 5-2 positive - ∂i ₉ / ∂t positive - i ₉ positive - 5-2 in the control path - 5-1 and 6-1 in the free-wheeling path - i ₈ negative first circuit breaker 5-1 second circuit breaker 5-2 negative - ∂i ₉ / ∂t negative - i ₉ negative - 5-1 in the control path, - 5-2 and 6-2 in the free-wheeling path - i ₈ positive X X - no detection of the commutation process - induced voltage too low - regulation of the commutation time is deactivated

The detection of the current control path is essential to the extent that it is only necessary to regulate the commutation duration in the case of an active switching of the control path. If the freewheeling path is switched to active, the commutation takes place within a circuit breaker between the second diode 6-2 and the channel of the second circuit breaker 5-2 instead of and does not cause any excitation of parasitic oscillating circuits. In this case, the commutation can take place as quickly as desired and also does not induce any voltage across the measuring inductance 9 .

In 2 , 2a and 2 B is a partial block diagram with the control circuit 2 for a power switch arrangement designed as a MOSFET half-bridge 3 shown.

The measurement and evaluation circuit 2-2 has two comparators, each of which has a state detection line 11-1 , 11-2 to the central control circuit 2-1 is led.

• - einer ersten Teilschaltung 2-1a als Speicher für den Beginn und das Ende der Kommutierung,
• - einer zweiten Teilschaltung 2-1b als Speicher mit dem Regelalgorithmus der digitalen Flankenregelung,
• - einer dritten Teilschaltung 2-1c als Speicher und Kombinatorik zum Bestimmen und Speichern des aktuellen Zustandes der Leistungsschalteranordnung und
• - einer vierten Teilschaltung 2-1d als Register für die Kommutierungdauer-Sollwerte.

The central control circuit 2-1 consists

• - a first partial circuit 2-1a as a memory for the beginning and the end of commutation,
• - a second sub-circuit 2-1b as a memory with the control algorithm of the digital edge control,
• - a third sub-circuit 2-1c as a memory and combinatorial system for determining and storing the current state of the circuit breaker arrangement and
• - a fourth sub-circuit 2-1d as a register for the commutation duration setpoints.

• - eine Vielzahl von Multiplexern,
• - in einer Kette geschaltete Verzögerungsglieder sowie
• - einen Demultiplexer, der eingangsseitig mit den Multiplexern in Verbindung steht und von dem aus ausgangsseitig Hilfssignalleitungen 15-1, 15-2 an die Ansteuerteilschaltungen 2-4, 2-5 geführt sind.

The auxiliary signal circuit 2-3 for generating time-delayed auxiliary signals for the control of the downstream first and second control subcircuit 2-4 , 2-5 contains the following assemblies:

• - a variety of multiplexers,
• - delay elements connected in a chain as well as
• - A demultiplexer which is connected on the input side to the multiplexers and from which auxiliary signal lines on the output side 15-1 , 15-2 to the control subcircuits 2-4 , 2-5 are led.

The two control subcircuits 2-4 , 2-5 are used for recoding and level conversion of the auxiliary signals for the driver stages and have driver control lines on the output side 16-1a , 16-1b ; 16-2a , 16-2b ; 16-3a , 16-3b ; 16-4a , 16-4b for the first and second driver circuit 2-6 , 2-7 .

One driver circuit each 2-6 , 2-7 contains four driver sub-power sources 17-1a , 17-1b , 17-2a , 17-2b ; 17-3a , 17-3b , 17-4a , 17-4b , to the driver control lines 16-1a , 16-1b ; 16-2a , 16-2b ; 16-3a , 16-3b ; 16-4a , 16-4b are performed, from the driver circuits 2-6 , 2-7 one control signal line on the output side 7-1 , 7-2 to the circuit breakers 5-1 , 5-2 is led.

From the higher-level programming and control unit 1 are a signal on the control specification interface 18th to the first subcircuit 2-1a and to the auxiliary signal circuit 2-3 , a first programming interface 19th to the fourth subcircuit 2-1d and a second programming interface 20th to the driver circuits 2-6 , 2-7 guided.

The one in the measuring inductance 9 induced voltage u _10-1 is used in the measurement and evaluation circuit 2-2 with two reference potentials + Vref and -Vref compared. This becomes the polarity of the induced voltage u _10-1 detected. The necessary comparators can be implemented with short delay times, since in the selected exemplary embodiment they experience almost no common-mode deflection.

In the first, in the central control circuit 2-1 located partial circuit 2-1a The first positive and first negative flank of the output signal is used as a memory for the beginning and end of the commutation on the status detection lines 11-1 , 11-2 after a change in the signal on the control input interface 18th saved. The edge evaluation thus prevents a misinterpretation of subsequent voltage pulses at the first measurement signal tap 10-1 as a result of possible disturbances at the end of the commutation process.

In the second subcircuit 2-1b is the control algorithm of the digital edge control for the time parameters on the first two parameter transfer lines 13-1 and 13-2 implemented. The time parameters are for the current control path over several periods of the signal on the control input interface 18th adapted in such a way that the measured end of commutation is the actual value corresponding to the signal on the first or second state detection line 11-1 , 11-2 with the specified end of commutation as the setpoint corresponding to the signal on the first auxiliary signal feedback line 14-1 for the switch-on process and the signal on the second auxiliary signal feedback line 14-2 be brought into time correspondence for the switch-off process.

With the help of the third subcircuit 2-1c The beginning and the end of the commutation as well as the polarity of the induced voltage and the state of the half-bridge are evaluated as memory and combinatorics for determining and storing the current half-bridge status 3 on the status register output line 12th output and saved until the next switching event.

The parameters on the first two parameter transfer lines 13-1 and 13-2 are increased or decreased by a specified step size with each switching process. The newly set value will then take effect with the next switching event.

In the fourth subcircuit 2-1d The setpoints for the commutation duration for the third and fourth parameter transfer line are used as registers for the commutation duration setpoints 13-3 and 13-4 filed. The setpoints are set by the higher-level programming and control unit 1 via the first programming interface 19th to hand over.

In the auxiliary signal circuit 2-3 As a time control unit, auxiliary control signals are selected from a chain with delay elements by means of a multiplexer, which are opposite to the signal on the control input interface 18th are delayed. The multiplexers are in accordance with the parameters on the parameter transfer lines 13-1 to 13-4 controlled.

A downstream demultiplexer then selects the auxiliary control signals according to the current half-bridge status on the status register output line 12th and switches them off via the first and second auxiliary signal lines 15-1 , 15-2 to the first and second control subcircuit 2-4 , 2-5 further.

The first control subcircuit 2-4 and the second drive subcircuit 2-5 then take a recoding and level conversion of the transferred auxiliary control signals on the auxiliary signal lines 15-1 and 15-2 in front. Via the driver control signals on the driver control signal lines 16-x With 16-1a , 16-1b , 16-2a , 16-2b , 16-3a , 16-3b , 16-4a , 16-4b become the driver stages 2-6 and 2-7 activated.

Via a second programming interface 20th can be the strength of each driver sub-power source 17-x With 17-1a , 17-1b , 17-2a , 17-2b , 17-3a , 17-3b , 17-4a , 17-4b to the connected circuit breakers 5-1 and 5-2 be adjusted.

To enable the commutation duration to be checked, there are at least four partial driver current sources 17-x With 17-1a , 17-1b , 17-2a , 17-2b or 17-3a , 17-3b , 17-4a , 17-4b per driver circuit 2-6 or. 2-7 necessary. Two driver sub-power sources 17-xa and 17-xb With 17-1a , 17-1b ; 17-2a , 17-2b ; 17-3a , 17-3b ; 17-4a , 17-4b are the circuit breakers for charging and discharging the gate 5-1 and 5-2 necessary, whereby the two sources must differ significantly in terms of current level.

In 4th are the basic signal curves for the active switching on and off of the first circuit breaker 5-1 according to the arrangement in 3 shown.

Each switching process is divided into two time intervals, the duration of the first interval being determined by the parameters on the first and the second parameter transfer line 13-1 , 13-2 by the control algorithm in the second subcircuit 2-1b at each switching period of the signal on the control specification interface 18th is varied. The second time interval is determined by the parameters on the third and fourth parameter transfer lines 13-3 , 13-4 from the higher-level programming and control unit 1 specified and corresponds to the commutation time to be achieved.

Table 2 describes the individual times and time intervals for a switch-on process. Table 2: Description of the method based on the basic signal curves according to FIG. 4. Time / interval description t ₀ - State change of the signal on the control input interface 18th - Beginning of the closing process of the first circuit breaker 5-1 by the first driver circuit 2-6 t ₀ -t ₁ - the first circuit breaker 5-1 is reloaded by a large driver current i _7-1 (partial driver current source 17-1a active) - The duration of the time interval is determined by the variable parameter on the first parameter transfer line 13-1 given t ₁ - End of the first time interval - first circuit breaker 5-1 reaches its threshold voltage U _th - driver current i _7-1 is switched to a significantly lower value (partial driver current source 17-1b active) - commutation of second diode 6-2 on first breaker 5-1 begins t ₁ - t ₂ - Gate voltage u _{7-1 of} the first power switch 5-1 is kept almost constant - the duration of the time interval is determined by the parameter on the third parameter transfer line 13-3 specified - the duration of the time interval corresponds to the commutation duration in the regulated state t ₂ - Check whether commutation has already been completed (compare falling edge of the signal on the first status detection line 11-1 and rising edge of the signal on the first auxiliary signal feedback line 14-1 ) - Adaptation of the duration of the first time interval by varying the parameter on the first parameter transfer line 13-1 - Switching back to a large driver current i _7-1 (partial driver current source 17-1a active) t ₂ - t ₃ - Fast switching of the first circuit breaker 5-1 to minimize switching losses

The switch-off process takes place in an analogous manner. The first time interval corresponding to the parameter on the second parameter transfer line 13-2 is regulated in such a way that the commutation has just ended _{at time t 6.} For this purpose, the falling edge of the signal is transmitted to the second status detection line 11-2 (actual end of commutation) compared with the rising edge of the signal on the second auxiliary signal feedback line 14-2 (setpoint for the end of commutation).

The parameters on the third and fourth parameter transfer lines 13-3 and 13-4 allow a direct specification of the commutation time with this method. The large driver component power sources 17-xb With 17-1b , 17-2b , 17-3b , 17-4b enable the circuit breaker to switch quickly in order to minimize the switching power loss. The driver power sources 17-xa With 17-1a , 17-2a , 17-3a , 17-4a enable the commutation process to be monitored.

In 5a , 5b , 5c , 5d are time courses of the signals for a switch-on process according to the schematic representation 4th shown. They show 5a the signal on the control specification interface 18th and the current state of the circuit breaker arrangement 3 on the status register output line 12th , the 5b the returned induced voltage of the measuring inductance 9 on the measurement signal tap 10-1 , the 5c the voltage of the control signal lines 7-1 and 7-2 for the circuit breakers 5-1 and 5-2 as well as the voltage at the load connection 8th and the 5d the current through the circuit breaker 5-1 and 5-2 as well as through the second diode 6-2 . The one in the measuring inductance 9 induced voltage u _10-1 according to 5b is made by the comparators in the measurement and evaluation circuit 2-2 detected and in the third subcircuit 2-1c in correct current states of the circuit breaker arrangement on the state register output line 12th according to 5a implemented. With the change of state of the signal on the control input interface 18th according to 5a becomes the status signal on the status register output line 12th reset ("UNDEF"). After a dead time in which the second circuit breaker 5-2 is switched off, the first time interval begins in which the first circuit breaker 5-1 is charged up to the threshold voltage. Commutation now begins (status signal on the status register output line 12th : "COM-LH-LFW") from the second diode 6-2 on the first breaker 5-1 . Meanwhile, the gate voltage remains u _7-1 according to 5c of the first circuit breaker 5-1 almost constant. The end of the commutation is reached with the falling edge of the induced voltage u _10-1 according to 5b detected (status signal on the status register output line 12th : "COM-END") and the first circuit breaker 5-1 is fully switched through in a short time. In 5d are the current curves of the commutation between the first circuit breaker 5-1 and the second diode 6-2 specified.

The 6th show the timing of the signals according to the schematic representation in 4th for a switch-off process. When switching off, the same signals are used, similar to switching on. The result is the time courses as in 6a , 6b , 6c and 6d and has already been described for the schematic representation, wherein in 6a the signal on the control specification interface 18th and the current state of the circuit breaker arrangement 3 on the status register output line 12th , in 6b the returned induced voltage u _10-1 the measuring inductance 9 at the measuring signal tap 10-1 , in 6c the voltage of the control signal lines 7-1 and 7-2 for the circuit breakers 5-1 and 5-2 as well as the voltage at the load connection 8th and in 6d the current through the circuit breaker 5-1 and 5-2 as well as through the second diode 6-2 being represented.

In the 7th several diagrams for the compensation process for digital control of the commutation speed are shown, with the 7a the signal on the control specification interface 18th , the 7b the voltage at the load connection 8th the circuit breaker arrangement 3 , the 7c the current through the first circuit breaker 5-1 and the 7d the variable time parameters on the first and second parameter transfer lines 13-1 and 13-2 demonstrate. To illustrate the adaptive mode of operation of the process are in 7a , 7b , 7c , 7d the waveforms for the voltage u ₈ at the load connection 8th the circuit breaker arrangement 3 according to 7b and the stream i _5-1 through the first circuit breaker 5-1 according to 7c shown.

Furthermore, there are the courses of the time parameters of the first and second parameter transfer line 13-1 and 13-2 according to 7d over several periods of the signal on the control input interface 18th according to 7a pictured. In this representation, the method works with a constant step size for the time parameters on the first and second parameter transfer line 13-1 and 13-2 , but can also be operated with a variable step size to reach the final value more quickly.

Reach the parameters on the first and second parameter transfer line 13-1 and 13-2 a stationary value, the actual commutation times correspond to the setpoints on the third and fourth parameter transfer lines 13-3 and 13-4 . At the same time, there is a significant reduction in the resonance increase in the voltage u ₈ at the load connection 8th the circuit breaker arrangement 3 and the stream i _5-1 through the first circuit breaker 5-1 clear.

In the adaptive method according to the invention, a measuring inductance is used 9 used, which is arranged in such a way that a voltage is induced in it during the commutation, which voltage is proportional to the rate of current change in the power electronic actuator connected in series 5-1 , 5-2 , 6-1 , 6-2 is. By evaluating the induced voltage through appropriate feedback at the first measurement signal tap 10-1 the actual start and end of commutation can be determined. The method according to the invention can also use a different signal from the circuit breaker arrangement 3 , e.g. B. the voltage at the load connection 8th as a feedback variable at the measurement signal tap 10-4 , use. However, the method according to the invention always enables predictive and thus timely control of the circuit breaker arrangement 3 .

In the 8a and the 8b are two devices for regulating the commutation speed between power electronic actuators connected in series 5-1 , 5-2 , 6-1 , 6-2 with inductive load 4th , the actuators 5-1 , 5-2 , 6-1 , 6-2 in a circuit breaker arrangement 3 between a positive supply potential VS and a reference potential GND are arranged, of which at least one actuator 5-1 , 5-2 is actively switched on and off and via control signal lines 7-1 , 7-2 with a control circuit 2 who have a central control circuit 2-1 with subcircuits located therein, is connected, the control circuit 2 a higher-level programming and control unit 1 is upstream.

• - eine Mess- und Bewertungsschaltung 2-2, welche Verbindungen zu den Messsignalabgriffen 10-1, 10-2, 10-3, 10-4 und zum Signal auf der Steuervorgabeschnittstelle 18 besitzt und über Zustandserfassungsleitungen 11-1, 11-2 Signale an die zentrale Steuerschaltung 2-1 überträgt, welche in Verbindung zum Beginn und zum Ende der Kommutierung stehen,
• - die zentrale Steuerschaltung 2-1, welche mit der Mess- und Bewertungsschaltung 2-2 über Zustandserfassungsleitungen 11-x verbunden ist und durch mindestens eine Signalleitung 18-1 über die Steuervorgabeschnittstelle 18 und durch mindestens eine Signalleitung 19-1 zur Vorgabe von Zeitparametern auf der ersten Programmierschnittstelle 19 mit der übergeordneten Programmier- und Steuereinheit 1 in Verbindung steht,
• - eine Hilfssignalschaltung 2-3, welche mit der zentralen Steuerschaltung 2-1 durch Zustandsregisterausgangsleitungen 12, Parameterübergabeleitungen 13-x und Hilfssignalrückführungsleitungen 14-x in Verbindung steht und über mindestens eine Signalleitung 18-1 der Steuervorgabeschnittstelle 18 mit der übergeordneten Programmier- und Steuereinheit 1 verbunden ist,
• - mindestens zwei Ansteuerteilschaltungen 2-4, 2-5, welche über Hilfssignalleitungen 15-1, 15-2 mit der Hilfssignalschaltung 2-3 verbunden sind, und
• - mindestens zwei Treiberschaltungen 2-6, 2-7, welche über Treibersteuerleitungen 16-x mit den Ansteuerteilschaltungen 2-4, 2-5 verbunden sind und durch Signalleitungen 20-1, 20-2, 20-3, 20-4 zur Vorgabe von Treiberteilstromniveaus auf der zweiten Programmierschnittstelle 20 mit der übergeordneten Programmier- und Steuereinheit 1 in Verbindung stehen sowie über die Steuersignalleitungen 7-1, 7-2 mit der Leistungsschalteranordnung 3 verbunden sind.

According to the invention, there is at least one actively switching actuator 5-1 , 5-2 through the control signal lines 7-1 , 7-2 with a control circuit 2 connected, the control circuit 2 through at least one measurement signal tap 10-1 , 10-2 , 10-3 , 10-4 Measured variables from the circuit breaker arrangement 3 records and control sequences for the actively switching actuators 5-1 , 5-2 via control signal lines 7-1 , 7-2 depending on the signal on the control specification interface 18th and programming interfaces 19th , 20th a higher-level programming and control unit 1 generated, the control circuit 2 contains the following assemblies:

• - a measurement and evaluation circuit 2-2 which connections to the measurement signal taps 10-1 , 10-2 , 10-3 , 10-4 and to the signal on the control specification interface 18th owns and via condition detection lines 11-1 , 11-2 Signals to the central control circuit 2-1 transmits which are connected to the beginning and the end of commutation,
• - the central control circuit 2-1 , which with the measurement and evaluation circuit 2-2 via condition detection lines 11-x is connected and by at least one signal line 18-1 via the control specification interface 18th and by at least one signal line 19-1 for specifying time parameters on the first programming interface 19th with the higher-level programming and control unit 1 is connected,
• - an auxiliary signal circuit 2-3 , which with the central control circuit 2-1 through status register output lines 12th , Parameter transfer lines 13-x and auxiliary signal return lines 14-x is in communication and via at least one signal line 18-1 the control specification interface 18th with the higher-level programming and control unit 1 connected is,
• - at least two control subcircuits 2-4 , 2-5 , which via auxiliary signal lines 15-1 , 15-2 with the auxiliary signal circuit 2-3 connected, and
• - at least two driver circuits 2-6 , 2-7 , which via driver control lines 16-x with the control subcircuits 2-4 , 2-5 are connected and by signal lines 20-1 , 20-2 , 20-3 , 20-4 for specifying partial driver current levels on the second programming interface 20th with the higher-level programming and control unit 1 are in communication as well as via the control signal lines 7-1 , 7-2 with the circuit breaker arrangement 3 are connected.

The device in 8b differs from the device in 8a to the extent that in 8b instead of measuring with measuring inductance 9 other signals from the circuit breaker arrangement 3 be measured, e.g. B. the voltage signals on the control signal lines 7-1 , 7-2 and the voltage at the load connection 8th by means of the measurement signal taps 10-2 , 10-3 and 10-4 .

Overall, with this method, a significantly better EMC behavior can be achieved by avoiding excitations of the parasitic series resonant circuits. The switching power loss remains due to rapid switching before and especially after commutation at the level of already existing control methods. In this way, material and development costs for EMC filters for attenuating the conducted interference spectrum can be saved.

The additional effort for implementing the control algorithm is limited to the external measuring inductance and additional chip area for the driver circuit. In most applications, the inductance can be implemented as a defined conductor track section, which means that there are no additional material costs for external passive components.

In contrast to the prior art, in the method according to the invention, an adaptation is carried out over several switching periods. The adaptive method according to the invention is understood to mean steps which carry out a successive approximation of the control parameters to the control target, preferably to the specified commutation period, over several switching periods of the signal on the control input interface. This makes it possible to reduce the driver current in advance, before the parasitic resonant circuits are excited and disturbances occur.

List of reference symbols

1

Superordinate programming and control unit

2

Control circuit

2-1

central control circuit

2-1x

Subcircuits

2-1a

first partial circuit

2-1 b

second partial circuit

2-1c

third partial circuit

2-1d

fourth partial circuit

2-2

Measurement and evaluation circuit

2-3

Auxiliary signal circuit

2-4

first control subcircuit

2-5

second control subcircuit

2-6

first driver circuit

2-7

second driver circuit

3

Circuit breaker arrangement

4th

Inductive load

5-1

first actively switching actuator

5-2

second actively switching actuator

6-1

first passive switching actuator

6-2

second passive switching actuator

7-x

Control signal lines

7-1

first control signal line

7-2

second control signal line

8th

Load connection

9

Measuring inductance

10-x

Measurement signal taps

10-1

first measurement signal tap

10-2

second measurement signal tap

10-3

third measurement signal tap

10-4

fourth measurement signal tap

11-x

Condition detection lines

11-1

first condition detection line

11-2

second condition detection line

12th

Status register output line

13-x

Parameter transfer lines

13-1

first parameter transfer line

13-2

second parameter transfer line

13-3

third parameter transfer line

13-4

fourth parameter transfer line

14-x

Auxiliary signal return lines

14-1

first auxiliary signal return line

14-2

second auxiliary signal return line

15-x

Auxiliary signal lines

15-1

first auxiliary signal line

15-2

second auxiliary signal line

16-x

Driver control lines

16-1a

Driver control line

16-1b

Driver control line

16-2a

Driver control line

16-2b

Driver control line

16-3a

Driver control line

16-3b

Driver control line

16-4a

Driver control line

16-4b

Driver control line

17-x

Driver partial power sources

17-1a

Driver partial power source

17-1 b

Driver partial power source

17-2a

Driver partial power source

17-2b

Driver partial power source

17-3a

Driver partial power source

17-3b

Driver partial power source

17-4a

Driver partial power source

17-4b

Driver partial power source

18th

Control specification interface

18-1

Signal line

19th

first programming interface

19-1

Signal line

20th

second programming interface

20-1

Signal line

20-2

Signal line

20-3

Signal line

20-4

Signal line

VS

Supply voltage

t

time

∂i9 / ∂t

Current rate of change

M1

Power MOSFET

M2

Power MOSFET

+ Vref

positive reference potential

-Vref

negative reference potential

Claims (37)

Method for regulating the commutation speed between series-connected power electronic actuators (5-1, 5-2, 6-1, 6-2) with inductive load (4), the actuators (5-1, 5-2, 6-1 , 6-2) are arranged in a circuit breaker arrangement (3) between a positive supply potential (VS) and a reference potential (GND), of which at least one actuator (5-1, 5-2) is actively switched on and off and via control signal lines (7-1, 7-2) is connected to a control circuit (2) which contains a central control circuit (2-1) with subcircuits located therein, the control circuit (2) being preceded by a higher-level programming and control unit (1) is, characterized in that the voltage or the current on the control signal line (7-1, 7-2) of the actively switching actuator (5-1, 5-2) is varied during a switching process in at least two time intervals, with at least one time interval as a parameter on a first and second, from a subcircuit (2-1b) of the central control circuit (2-1) having a control algorithm for the digital edge regulation to an auxiliary signal circuit (2-3) for generating time-delayed auxiliary signals for the control of driver stages (2-6, 2 -7) for associated driver partial current sources (17-1, 17-2, 17-3, 17-4) of the actuators (5-1, 5-2) leading parameter transfer line (13-1, 13-2) depending on measurement signals at least one measurement signal tap (10-1; 10-2, 10-3, 10-4) from the circuit breaker arrangement (3) and in each switching period of a signal on a control input interface (18) from the higher-level programming and control unit (1) so adaptively varies by a fixed or variable step size it is stored that after a finite number n≥1 of switching periods the commutation duration in a fixed ratio to a second predetermined time interval as a parameter on a third and a fourth subcircuit (2-1d) of the central control circuit (2-1) to the auxiliary signal circuit (2-3) for generating time-delayed auxiliary signals for controlling driver stages (2-6, 2-7) for associated driver partial current sources (17-1, 17-2, 17-3, 17 -4) of the actuators (5-1, 5-2) leading parameter transfer line (13-3, 13-4) is and also in the case of changing operating conditions of the circuit breaker arrangement (3) in the fixed ratio will. Procedure according to Claim 1 , characterized in that the parameters of the voltage and the current on the control signal lines (7-1, 7-2) are specified in the various time intervals by the higher-level programming and control unit (1) and via a first programming interface (19) in the control circuit (2) are stored or are permanently implemented in the control circuit (2). Procedure according to Claim 1 , characterized in that the duration of the constant time intervals is specified by the higher-level programming and control unit (1) and is stored in the control circuit (2) via a second programming interface (20) or is permanently implemented in the control circuit (2). Procedure according to Claim 1 , characterized in that by evaluating the measurement signals fed back to the control circuit (2) on at least one measurement signal tap (10-1; 10-2, 10-3, 10-4), the current state of the circuit breaker arrangement (3) is determined in such a way that the in the next switching process the active switching actuator (5-1, 5-2) determining the commutation is selected and controlled. Procedure according to Claim 1 , characterized in that the measurement signals determined from the circuit breaker arrangement (3) are formed on a measurement signal tap (10-1) in such a way that a voltage proportional to the commutation speed in one of the actuators (5-1, 5-2, 6-1, 6 -2) is induced by a measuring inductance (9) connected in series with the actuators (5-1, 5-2, 6-1, 6-2). Procedure according to Claim 5 , characterized in that the voltage induced in the measuring inductance (9) is evaluated by the control circuit (2) and the current state of the circuit breaker arrangement (3) is determined and stored as well as via status register output lines (12) for downstream subcircuits of the control circuit (2) is available. Procedure according to Claim 1 , characterized in that the measurement signals determined from the circuit breaker arrangement (3) on the measurement signal taps (10-2, 10-3, 10-4) are designed in such a way that the voltages on the control signal lines (7-1, 7-2) and can be measured at the load connection (8) of the circuit breaker arrangement (3). Procedure according to Claim 7 , characterized in that the measured voltage at the load connection (8) is influenced by correction factors in such a way that despite a voltage falsification of the measured voltage at the measurement signal taps (10-2, 10-3, 10-4) due to commutation, the output state to the State register output lines (12) corresponds to the actual state of the circuit breaker arrangement (3). Procedure according to Claim 8 , characterized in that on the basis of the polarity of the induced voltage pulse in the measuring inductance (9) and the knowledge of the state of the signal on the control _{input interface (18) the current load current direction (i 8} ) at the load connection (8) of the circuit breaker arrangement (3) and thus a current control and freewheeling path is determined. Method according to one of the preceding claims, characterized in that the parameters on the first and second parameter transfer lines (13-1, 13-2) are increased or decreased by a predetermined step size with each switching operation, the newly set value with the next Switching event becomes effective. Method according to one of the preceding claims, characterized in that the strength of individual driver partial current sources (17-1a, 17-2a, 17-1b, 17-2b; 17-3a, 17-4a, 17-3b , 17-4b) is adapted to the connected active switching actuators (5-1, 5-2) by specifying partial driver current levels. Procedure according to Claim 11 , characterized in that at least four partial driver current sources (17-1a, 17-2a, 17-1b, 17-2b; 17-3a, 17-4a, 17-3b, 17-4b) per driver stage (2- 6; 2-7) are provided, with two partial driver current sources (17-1a, 17-1b; 17-2a, 17-2b; 17-3a, 17-3b; 17-4a, 17-4b) each for charging and Unloading the gate can be provided. Procedure according to Claim 1 , characterized in that a switch-on process is divided into two time intervals, the duration of the first time interval as a parameter on the first parameter transfer line (13-1) by the control algorithm of the digital edge control in the second sub-circuit (2-1b) for each switching period of the signal is varied on the control input interface (18) and the second time interval is specified as a parameter on the third parameter transfer line (13-3) by the higher-level programming and control unit (1) and is in proportion to the commutation duration to be achieved. Procedure according to Claim 1 , characterized in that a switch-off process is divided into two time intervals, the duration of the first time interval as a parameter on the second Parameter transfer line (13-2) is varied by the control algorithm in the second subcircuit (2-1b) for each switching period of the signal on the control input interface (18) and the second time interval is varied as a parameter on the fourth parameter transfer line (13-4) by the higher-level programming - and control unit (1) is specified and is in proportion to the commutation time to be achieved. Procedure according to Claim 1 , characterized in that the parameters on the third and fourth parameter transfer line (13-3, 13-4) are provided for a direct specification of the commutation duration. Procedure according to Claim 1 , characterized in that a measurement and evaluation circuit (2-2) provided in the control circuit (2) contains at least two comparators which compare the voltage induced in the measurement inductance (9) with reference potentials (+ Vref, -Vref) and thus compare the Determine the polarity of the induced voltage as well as the beginning and the end of the commutation and output them on the status detection lines (11-x, with x = 1, 2). Procedure according to Claim 1 , characterized in that in a first subcircuit (2-1a) located in the central control circuit (2-1) as a memory for the beginning and end of the commutation, the first positive and first negative edge of the signal on the first or the second state detection line (11 -1; 11-2) from the measurement and evaluation circuit (2-2) can be stored after a change in the signal on the control input interface (18). Method according to one of the preceding claims, characterized in that in the second subcircuit (2-1b) located in the central control circuit (2-1) the control algorithm of the digital edge control for the time parameters on the first two parameter transfer lines (13-1, 13- 2) is implemented, the time parameters for the respective current control path being adapted over several periods of the signal on the control input interface (18) in such a way that the measured end of commutation is the actual value corresponding to the signal on the first or second state detection line (11-1; 11-2) with the specified end of commutation as the setpoint value corresponding to the signal on the first auxiliary signal return line (14-1) for the switch-on process and the signal on the second auxiliary signal return line (14-2) for the switch-off process. Method according to one of the preceding claims, characterized in that, with the aid of the third subcircuit (2-1c) located in the central control circuit (2-1), the start and end of the commutation and the polarity of the induced voltage are evaluated and the state of the circuit breaker arrangement (3) is output on a status register output line (12) and is stored until the next switching event. Method according to one of the preceding claims, characterized in that the setpoint values for the commutation duration are stored in a fourth subcircuit (2-1d) located in the central control circuit (2-1) and transferred to the third and fourth parameter transfer line (13-3, 13- 4) are output, the setpoint values being transferred by the higher-level programming and control unit (1) via a corresponding first programming interface (19). Method according to one of the preceding claims, characterized in that in the auxiliary signal circuit (2-3) as a time control unit by means of internal multiplexers, auxiliary control signals are selected from a chain with delay elements which are time-delayed compared to the signal on the control input interface (18), the multiplexers correspondingly the parameters on all parameter transfer lines (13-1, 13-2, 13-3, 13-4), with a downstream demultiplexer selecting the auxiliary control signals according to the current half-bridge status on the status register output line (12) and adding them to existing control subcircuits (2- 4, 2-5) advances. Method according to one of the preceding claims, characterized in that a successive approximation of the control parameters to the specified commutation duration is carried out over several switching periods of the signal on the control input interface (18), whereby the driver current is reduced in advance. Device for regulating the commutation speed between series-connected power electronic actuators (5-1, 5-2, 6-1, 6-2) with inductive load (4), the actuators (5-1, 5-2, 6-1 , 6-2) are arranged in a circuit breaker arrangement (3) between a positive supply potential (VS) and a reference potential (GND), of which at least one actuator (5-1, 5-2) is actively switched on and off is switched off and is connected via control signal lines (7-1, 7-2) to a control circuit (2) which contains a central control circuit (2-1) with subcircuits located therein, the control circuit (2) having a higher-level programming and Control unit (1) is connected upstream, operated according to the method Claim 1 to 22nd , characterized in that at least one actively switching actuator (5-1, 5-2) is connected to a control circuit (2) through the control signal lines (7-1, 7-2) and the control circuit (2) receives measured variables from the circuit breaker arrangement ( 3) and control sequences for the actively switching actuators (5-1, 5-2) via control signal lines (7-1, 7-2) depending on the signal on the control input interface (18) and programming interfaces (19, 20) of a higher-level programmer - and control unit (1), the control circuit (2) containing the following assemblies: - a measurement and evaluation circuit (2-2), which has connections to the measurement signal taps (10-1, 10-2, 10-3, 10- 4) and to the signal on the control input interface (18) and via state detection lines (11-1, 11-2) transmits signals to the central control circuit (2-1), which are connected to the beginning and end of the commutation, - the central control circuit (2-1), which is connected to the measuring and evaluation circuit (2-2) via state detection lines (11-1, 11-2) and by at least one signal line (18-1) via the control input interface (18) and by at least one signal line (19-1 ) is in connection with the higher-level programming and control unit (1) for specifying time parameters on the first programming interface (19), - an auxiliary signal circuit (2-3), which is connected to the central control circuit (2-1) through status register output lines (12) , Parameter transfer lines (13-x, with x = 1, 2, 3, 4) and auxiliary signal return lines (14-x, with x = 1,2) and via the signal line (18-1) of the control input interface (18) with the higher-level programming and control unit (1) is connected, - at least two control subcircuits (2-4, 2-5) which are connected to the auxiliary signal circuit (2-3) via auxiliary signal lines (15-1, 15-2), and - at least two driver circuits (2-6, 2-7), which are connected to the control subcircuits (2-4, 2-5) via driver control lines (16-x with x = 1a, 1b, 2a, 2b, 3a, 3b, 4a, 4b) and are connected by signal lines (20 -x with x = 1, 2, 3, 4) for specifying partial driver current levels on the second programming interface (20) with the higher-level programming and control unit (1) and via the control signal lines (7-1, 7-2) are connected to the circuit breaker arrangement (3). Device according to Claim 23 , characterized in that the central control circuit (2-1) consists of - a first subcircuit (2-1a) as a memory for the beginning and the end of the commutation, - a second subcircuit (2-1b) as a memory with a control algorithm of the digital Edge control, - a third subcircuit (2-1c) as a memory and combinatorial system for determining and storing a current state of the circuit breaker arrangement (3) and - a fourth subcircuit (2-1d) as a register for the commutation duration setpoints. Device according to Claim 23 , characterized in that the auxiliary signal circuit (2-3) for generating time-delayed auxiliary signals for controlling the downstream first and second control subcircuits (2-4, 2-5) contains the following assemblies: - a plurality of multiplexers, - delay elements connected in a chain and - a demultiplexer which is connected on the input side to the multiplexers and from which auxiliary signal lines (15-1, 15-2) are routed to the control subcircuits (2-4, 2-5) on the output side. Device according to Claim 23 , characterized in that the two control subcircuits (2-4, 2-5) are used for recoding and level conversion of the auxiliary signals on the auxiliary signal lines (15-1, 15-2) for the driver circuits (2-6, 2-7) and on the output side Have driver control lines (16-1a, 16-1b; 16-2a, 16-2b; 16-3a, 16-3b; 16-4a, 16-4b) for the first and second driver circuits (2-6, 2-7) . Device according to Claim 23 , characterized in that one driver circuit (2-6, 2-7) has four driver partial current sources (17-1a, 17-1b, 17-2a, 17-2b; 17-3a, 17-3b, 17-4a, 17- 4b) to which driver control lines (16-1a, 16-1b; 16-2a, 16-2b; 16-3a, 16-3b; 16-4a, 16-4b) are routed, the driver circuits (2- 6, 2-7) a control signal line (7-1, 7-2) is routed to the actively switching actuators (5-1, 5-2) on the output side. Device according to Claim 23 , characterized in that from the higher-level programming and control unit (1) at least one signal line (18-1) of the control input interface (18) to the auxiliary signal circuit (2-3), at least one signal line (19-1) of the first programming interface (19 ) to the fourth subcircuit (2-1d) and signal lines (20-1, 20-2, 20-3, 20-4) of the second programming interface (20) are routed to the driver circuits (2-6, 2-7). Device according to one of the preceding Claims 23 to 28 , characterized in that the actively switching actuators (5-1, 5-2) each contain a first and second diode (6-1, 6-2) connected in parallel and designed as a passive actuator and as a power MOSFET in the power switch arrangement ( 3) are used. Device according to one of the preceding Claims 23 to 29 , characterized in that a measuring inductance (9) in the form of a predetermined line inductance or a concentrated component in series with the power electronic actuators (5-1, 5-2, 6-1, 6-2) is used to measure the start and end of commutation. is used, the induced voltage being measured and evaluated by the control circuit (2) via at least one measuring signal tap (10-1, 10-2, 10-3, 10-4). Device according to one of the preceding Claims 23 to 30th , characterized in that the measuring inductance (9) is dimensioned in such a way that an evaluable induced voltage is present at the measuring signal tap (10-1) due to a change in current as a result of commutation, whereby with every switching process in which a commutation takes place between the control and freewheeling path , a voltage pulse is induced at the measuring signal tap (10-1) with different polarity. Device according to one of the preceding Claims 23 to 31 , characterized in that the control path is a current path which, when the corresponding circuit breaker is switched on, ensures a voltage drop in the supply voltage (VS) across the inductive load (4). Device according to one of the preceding Claims 23 to 32 , characterized in that the freewheeling path is a current path which short-circuits the two connections of the inductive load (4). Device according to one of the preceding Claims 23 to 33 , characterized in that the measuring and evaluation circuit (2-2) is provided with two comparators, the voltage u _10-1 induced at the measuring signal tap (10-1) in the measuring and evaluation circuit (2-2) having two reference potentials (+ Vref, - Vref) each assigned compared within the comparators and thus the polarity of the induced voltage u _{10-1 is} determined. Device according to one of the preceding Claims 23 to 34 , characterized in that the third subcircuit (2-1c) as a memory and combinatorial system for determining and storing the current state of the circuit breaker arrangement (3) evaluates the beginning and end of the commutation and the polarity of the induced voltage and evaluates the state of the circuit breaker arrangement (3 ) on the status register output line (12) and stores it until the next switching event. Device according to one of the preceding Claims 23 to 35 , characterized in that the second subcircuit (2-1b) contains the control algorithm of the digital edge control for the time parameters on the first and second parameter transfer line (13-1, 13-2), the time parameters for the current control path over several periods of the Signal on the control input interface (18) can be adapted in such a way that the measured end of the commutation as the actual value corresponding to the signal on the status detection lines (11-1, 11-2) with the specified end of the commutation as the setpoint corresponding to the signal on the first auxiliary signal feedback line ( 14-1) for the switch-on process and the signal on the second auxiliary signal return line (14-2) for the switch-off process are brought into time correspondence. Device according to one of the preceding Claims 23 to 36 , characterized in that instead of a measuring signal pick-up (10-1) on an introduced measuring inductance (9), other circuit-internal measuring signal pick-ups (10-2, 10-3, 10-4) are provided, which measure the voltages on the control signal lines (7-1, 7-2) and measure at the load connection (8) of the circuit breaker arrangement (3).

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