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DE102005022000B8 - Verfahren zur Herstellung von elektronischen Einheiten aus zwei mehrlagigen Ausgangsstrukturen und deren Verwendung - Google Patents

Verfahren zur Herstellung von elektronischen Einheiten aus zwei mehrlagigen Ausgangsstrukturen und deren Verwendung Download PDF

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Publication number
DE102005022000B8
DE102005022000B8 DE102005022000A DE102005022000A DE102005022000B8 DE 102005022000 B8 DE102005022000 B8 DE 102005022000B8 DE 102005022000 A DE102005022000 A DE 102005022000A DE 102005022000 A DE102005022000 A DE 102005022000A DE 102005022000 B8 DE102005022000 B8 DE 102005022000B8
Authority
DE
Germany
Prior art keywords
preparation
electronic units
starting structures
multilayer starting
multilayer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE102005022000A
Other languages
English (en)
Other versions
DE102005022000B4 (de
DE102005022000A1 (de
Inventor
Michael Bisges
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
OFlexx Technologies GmbH
Original Assignee
OFlexx Technologies GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by OFlexx Technologies GmbH filed Critical OFlexx Technologies GmbH
Priority to DE102005022000A priority Critical patent/DE102005022000B8/de
Publication of DE102005022000A1 publication Critical patent/DE102005022000A1/de
Publication of DE102005022000B4 publication Critical patent/DE102005022000B4/de
Application granted granted Critical
Publication of DE102005022000B8 publication Critical patent/DE102005022000B8/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/50—Forming devices by joining two substrates together, e.g. lamination techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60—Forming conductive regions or layers, e.g. electrodes
    • H10K71/611—Forming conductive regions or layers, e.g. electrodes using printing deposition, e.g. ink jet printing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
DE102005022000A 2005-05-09 2005-05-09 Verfahren zur Herstellung von elektronischen Einheiten aus zwei mehrlagigen Ausgangsstrukturen und deren Verwendung Expired - Fee Related DE102005022000B8 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE102005022000A DE102005022000B8 (de) 2005-05-09 2005-05-09 Verfahren zur Herstellung von elektronischen Einheiten aus zwei mehrlagigen Ausgangsstrukturen und deren Verwendung

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102005022000A DE102005022000B8 (de) 2005-05-09 2005-05-09 Verfahren zur Herstellung von elektronischen Einheiten aus zwei mehrlagigen Ausgangsstrukturen und deren Verwendung

Publications (3)

Publication Number Publication Date
DE102005022000A1 DE102005022000A1 (de) 2006-11-16
DE102005022000B4 DE102005022000B4 (de) 2010-04-15
DE102005022000B8 true DE102005022000B8 (de) 2010-08-12

Family

ID=37295347

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102005022000A Expired - Fee Related DE102005022000B8 (de) 2005-05-09 2005-05-09 Verfahren zur Herstellung von elektronischen Einheiten aus zwei mehrlagigen Ausgangsstrukturen und deren Verwendung

Country Status (1)

Country Link
DE (1) DE102005022000B8 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0523163D0 (en) * 2005-11-14 2005-12-21 Suisse Electronique Microtech Patterning of conductive layers with underlying compressible spacer layer or spacer layer stack
GB2467316B (en) 2009-01-28 2014-04-09 Pragmatic Printing Ltd Electronic devices, circuits and their manufacture
CN104629187B (zh) * 2015-01-27 2018-02-13 北京化工大学 一种多功能性聚丙烯复合材料及其制备方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002029912A1 (en) * 2000-10-04 2002-04-11 CAMBRIDGE UNIVERSITY TECHNICAL SERVICES LIMITED University of Cambridge, Department of Physics Solid state embossing of polymer devices
US6596569B1 (en) * 2002-03-15 2003-07-22 Lucent Technologies Inc. Thin film transistors
WO2004006633A2 (en) * 2002-07-02 2004-01-15 Motorola, Inc. Integrated circuit including field effect transistor and method of manufacture
WO2004055920A2 (en) * 2002-12-14 2004-07-01 Plastic Logic Limited Electronic devices

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002029912A1 (en) * 2000-10-04 2002-04-11 CAMBRIDGE UNIVERSITY TECHNICAL SERVICES LIMITED University of Cambridge, Department of Physics Solid state embossing of polymer devices
US6596569B1 (en) * 2002-03-15 2003-07-22 Lucent Technologies Inc. Thin film transistors
WO2004006633A2 (en) * 2002-07-02 2004-01-15 Motorola, Inc. Integrated circuit including field effect transistor and method of manufacture
WO2004055920A2 (en) * 2002-12-14 2004-07-01 Plastic Logic Limited Electronic devices

Also Published As

Publication number Publication date
DE102005022000B4 (de) 2010-04-15
DE102005022000A1 (de) 2006-11-16

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8327 Change in the person/name/address of the patent owner

Owner name: O-FLEXX TECHNOLOGIES GMBH, 47228 DUISBURG, DE

8396 Reprint of erroneous front page
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee

Effective date: 20121201