DE102004031128A1 - An electrical circuit having a carbon conductive pattern and method of fabricating a carbon conductive pattern of an electrical circuit - Google Patents

Abstract

One electrical circuit has at least one carbon conductor structure on, which by means of a layer consisting essentially of carbon is formed, which has a specific resistance of less as 1 mΩcm having.

Description

The The invention relates to an electrical circuit having a carbon-conductor structure and a method for producing a carbon conductor pattern an electrical circuit.

At present becomes in the manufacture of integrated circuits or electronic Components an ever stronger Miniaturization sought. One way the space requirement of a integrated circuit is the so-called 3D integration, i.e. a suitable superimposing or stacking up the individual components or system units of the integrated Circuit [1]. This makes it possible to increase the packing density increase and thus to reduce the space required in a plane. Another Application of 3D integration is the stacking of different ones integrated circuits, so-called systems, which on one common chip to be integrated, creating a so-called System-on-chip (SoC) is formed.

By the stacking up individual components it is possible long ladder structures, so-called tracks, within one Level and reduce this by vertical ladder structures, so-called vias, to replace. Furthermore, the 3D integration for some Technology systems are advantageous when parallel processing units, i.e. integrated circuits are arranged in layers. This is for example the technological realization of image processing and pattern recognition on the model of the human brain of the case [2].

For a 3D integration are the properties of the metallization systems, i. the electrical conductor structures and the surrounding dielectric layers, which are single Interconnect components of the integrated circuits, really important. Important properties of a metallization system are the electrical properties, such as the electrical resistance the individual ladder structures, both of the ladder structures within a plane, i. the so-called tracks, as well as the ladder structures, which connect two levels, the so-called vias. Furthermore, the dielectric properties of the insulating are dielectric layers between the conductor structures of the metallization system for the integrated circuit of great importance. To the RC switching times for a signal transmission within the integrated circuit as low as possible, trying Both the resistance R and the capacitance C, i. the dielectric constant k of the insulating layers, if possible to keep low. Consequently, preferred are materials with low resistivity and low k dielectrics are used.

Further it is also desirable that the metallization system processes easily, reproducibly and cost-effectively can be and has a low probability of failure.

Usual materials, Today's tracks are made of metals like tungsten, aluminum or copper. Tungsten and aluminum are coming especially in memory products with little metal levels used. In high-performance logic chips, because of the higher electrical conductivity, preferably used copper. The difficult processability of Copper, e.g. the difficult etchability, leads to introduction of new integration schemes, i. new process steps. Such new integration scheme is the so-called damascene technique, an insertion technique, which in copper the subtractive method, which used in aluminum metallization systems has detached. For this purpose, specially adapted filling and planarization processes, which are partly associated with high costs. Another disadvantage with the use of said materials is that the resistivity at pattern widths of the tracks increases below 100 nm due to electron scattering processes.

specially for forming vias, i. the vertical wiring in the 3D integration forming conductor structures, become metallic wiring or tungsten-based interconnects, such as shown in [1], or doped polysilicon such as shown in [2]. One Disadvantage when forming the vias using tungsten technology or Polysilicon technology is that in the usual deposition processes of these materials results in an inhomogeneous sidewall covering, whereby the filling from holes, through which the vertical wiring is formed, with high aspect ratios, So a high ratio of height to the width of the hole, very difficult. The inhomogeneous sidewall covering leads to Defects, so-called voids, within the Via. The filling of holes with an aspect ratio between 20 and 50, in the case of highly doped polysilicon only be carried out in a multi-stage process, eliminating the manufacturing process a 3D-integrated Circuit complicated and expensive. Will the via of tungsten Although a good sidewall coverage can be achieved, However, this is great Stress, i. a high mechanical load generated.

Of the The invention is based on the problem of an electrical circuit with a ladder structure of an alternative material and a Method for producing a conductor structure from an alternative To provide material of an electrical circuit in which the Material of the conductor structure compared to the known materials has improved electrical properties and it in a simple way in conventional Process technologies can be integrated.

The Problem is caused by the electrical circuit with a carbon-conductor structure and the method for producing a carbon conductor pattern an electrical circuit solved with the features of the independent claims.

One electrical circuit has at least one carbon conductor structure, which by means of a layer consisting essentially of carbon is formed, which has a specific resistance of less as 1 mΩcm having.

at a method of manufacturing a carbon conductive pattern of an electrical circuit on a substrate becomes in manufacturing the carbon-conductor structure on a surface of the substrate in an atmosphere with a hydrogen partial pressure between 1 hectopascal and 6 hectopascal and at a temperature between 700 ° Celsius and 1000 ° Celsius the Carbon conductor structure as consisting essentially of carbon Layer by means of feeding formed of a carbonaceous gas.

clear An aspect of the invention may be seen in that instead be used by metallic conductor structures conductor structures, which are formed essentially of carbon. Advantageous on carbon conductor structures are the very good processability of carbon and the possibility training in simple processes. That it will be metallization systems, whose conductor structures essentially have carbon formed. Under metallization systems are not according to the invention only understood metallization systems with metal conductor structures, but Generally, systems that contact the electrical various components serve an integrated electrical circuit and in which at least individual conductor structures made of carbon may be formed can. Under a conductor structure according to the invention, in particular conductor tracks, i.e. Tracks within a layer or layer or otherwise expressed essentially horizontal tracks, and vias, i. electrical conductive Essentially, connections between two levels or layers, or in other words vertical ladder, understood. Where Vias is between the different ones Levels of 3D integration can be formed, as well as within a Plane, for example between two layers of a layer arrangement, which an electronic circuit, such as a transistor form.

Carbon-conductor structures can in this case be designed so that they have a specific resistance which is comparable to that of metals. Especially can by using carbon as the material of the conductor structures be achieved that at small feature sizes, i. linewidths less than 100 nm, the electron scattering processes in the conductor structure be reduced, which does not increase the specific Resistance comes, as it is observed in metals, for which at structural widths of less than 100 nm, the resistivity which for given macroscopic systems is unreachable.

One Another advantage of using carbon conductor structures is that the carbon is simultaneously acts as a diffusion barrier. Thus, special diffusion barriers, as for example when using copper and silica be used, and which the manufacturing process of electrical Circuits complicate and slow down, not necessary. Also So-called adhesion-promoting layers are in carbon-conductor structures not necessary, because carbon is in contrast to, for example, copper on silica liable. Such diffusion barriers and adhesion-promoting layers are when using copper as the material of the conductor patterns usually made of tantalum-based materials that are expensive [3]. The entire manufacturing process can thus be achieved by saving process steps shortened in time and cheaper be designed. The deposition time of a layer of carbon, which is used as the carbon conductor structure is relative short. There is also a parallel so-called batch process possible with good reproducibility. The Carbon layer in this case has a roughness of, for example 2 nm ± 0.3 nm with an average grain size of 1 nm to 2 nm.

A deposited carbon layer can also be easily Structure a way to form a carbon-conductor structure. This can be, for example by means of a hydrogen and / or oxygen plasma and / or air plasma happen.

Preferred developments of the invention will become apparent from the dependent claims. The further embodiments of the invention, which are described in connection with one of the independent claims are mutatis mutandis in Wechselsei tiger way to understand as embodiments of each other independent claim.

Prefers The electrical circuit has at least two subcircuits on, wherein the at least two subcircuits by means of the carbon-conductor structure electrically connected to each other.

Especially Preferably, the at least two subcircuits are in two different Planes forms and the carbon conductor structure forms a vertical connection between the two different levels.

In The method can use the carbon-conductor structure via a via be formed, which subcircuits of the electrical circuit with each other connects, which are arranged in different levels.

The Using the carbon conductor structure to form a vertical connection, a so-called Via, is a simple way such a Via train. In particular, the carbon conductor structure by means of a simple deposition process with optimal edge coverage and very good filling properties be formed. Also, with a vertical compound made of carbon very high aspect ratios, i.e. of a relationship of height to width, the Via, possible. According to the invention holes with aspect ratios fill homogeneously from 100 to 200, i.e. it can be aspect ratios realize, for example, by means of tungsten or doped Do not reach polysilicon. Furthermore, the electrical conductivity a via of carbon also at least comparable to that of highly doped polysilicon, so that sufficient conductivity of the Vertical connection can be ensured. The subcircuits can in this case be all known integrated circuits, such as Memory, transistors, logic gates or diodes.

In a training is the aspect ratio the vertical connection between 50 and 500, preferably between 100 and 400 and more preferably between 100 and 200.

By such a high aspect ratio, which by tungsten or doped polysilicon not or only very difficult to reach, it is possible even with small structures with small critical dimensions one Perform 3D integration. That it is possible also with vias, which have a small diameter at a high altitude to train, making it possible is highly miniaturized and integrated electrical circuits on top of each other to arrange a sufficient vertical distance from each other.

The Partial circuits can each individual chips.

By forming the individual subcircuits as individual chips, which are preferably independent Chips, for example, logic components, which by means of a Carbon conductor structure are electrically connected to each other, it is possible a to achieve highly integrated 3D integration of chips. Especially Is it possible different systems, i. Different components or chips Function, over each other stack and produce so-called system-on-chips (SoC).

Especially Preferably, at least one subcircuit is a bio-chip.

The Forming bio-chips in which a carbon-conductor structure is formed is particularly advantageous because carbon is biocompatible, i.e. biomolecules or damage cells.

In an embodiment is the essentially made of carbon conductor structure polycrystalline carbon.

Under a polycrystalline carbon layer is in the application a layer understood, which in some areas each a graphite-like Structure has. However, it is not a large hexagonal structure formed. The individual partial areas with graphite-like structure have a size which to the grain size of the polycrystalline carbon layer corresponds and is about 1 nm to 2 nm. Illustrative are the individual Subareas with hexagonal graphite structure repeatedly through Areas interrupted in which no regular graphite structure exists or in which the hexagonal graphitic structures at least one other Have alignment.

clear you can see the individual sections with a regular graphite structure as "crystalline" areas. Thus, the polycrystalline carbon has a plurality of "crystalline" regions. Out For this reason, in the context of this application, the term "polycrystalline carbon" for the material selected. The individual crystalline regions, i. the graphite structures, generally have a preferred direction, i. it is formed layer-like Structures of the polycrystalline carbon.

Prefers For example, the carbon conductor pattern has a resistivity between 1 μΩcm and 100 μΩcm and especially preferably between 1 μΩcm and 5 μΩcm.

Carbon conductor structures with such spe For example, resistances comparable to resistivities of metals are particularly suitable for use in electrical integrated circuits. In particular, in the case of the use of the carbon conductor structure with small feature sizes, the resistance of the carbon conductor structure is even lower than that of a metallic conductor structure, since metallic conductor structures, as already mentioned, result in electron scattering processes with feature sizes of less than 100 nm. Due to the low resistance, the RC switching times of the electrical circuits can be reduced. The low specific resistances can be achieved with carbon conductor structures which are doped by means of customary dopants, such as boron, phosphorus or arsenic, the doping being able to be carried out by means of so-called in-situ doping or implantation. Intercalation by means of metal halides, such as, for example, arsenic fluoride (AsF ₅ ) or antimony fluoride (SbF ₅ ), is also possible. When intercalating with AsF ₅ , for example, a specific electrical resistance of up to 1.1 μΩcm [4] can be achieved.

The specific resistances of doped carbon conductor structures are significantly lower than those of highly doped polysilicon, which usually in the prior art for the training of vertical connections is used. Especially Compared to highly doped polysilicon has the carbon-conductor structure also have better thermal conductivity, which makes it in 3D integrated Circuits the resulting heat can be derived better, and thus counteracted a chip heating can be.

Preferably the carbon-conductor structure is doped and / or intercalated.

By Doping or intercalating makes it possible to easily create one to achieve specific resistance of the carbon-conductor structure, which at least equally good or better than that of metallic conductor structures is.

Especially the doped and / or intercalated carbon conductor structure is preferred thermally activated.

Especially when using fluorine as a dopant, i. if fluorine in the Carbon conductor structure is introduced, is the thermal Activate a suitable process step to determine the properties, for example, the resistivity, the carbon-conductor structure Cheap to influence. The thermal activation can be carried out by heating a gas which is in a chamber, in which the electrical circuit is processed. An alternative possibility it is the wafer on which the electrical circuit is processed is to heat itself, for example, via an electric heater the so-called chuck. At the thermal activation is too note that this is not done at such high temperatures, that components formed in the electrical circuit are damaged can, For example, a doping of trained transistors influenced can be.

The Carbon conductor structure may be a carbon trace and / or a via of being substantially carbon.

In An embodiment of the invention is a selective activation the doped and / or intercalated carbon conductor structure by means of Lasers performed.

The Using a laser is a particularly suitable means to one selective activation of the doped and / or intercalated carbon conductor structure perform, since selectively selectively thermally treated areas by means of a laser, i.e. heated can be.

The Carbonaceous gas can be methane, ethane, alcohol vapor and / or Acetylene.

These Carbonaceous gases are particularly suitable for use in the process used for producing a polycrystalline carbon layer can and can be used individually or in combination.

In an embodiment is the temperature between 900 ° Celsius and 970 ° Celsius and the hydrogen partial pressure becomes essentially 1 hectopascal and becomes so much carbonaceous in forming the carbon-conductor structure Supplied with gas, that a total pressure between 500 hectopascal and 700 hectopascal established. Preferred is the temperature 950 ° Celsius and the total pressure is 600 hectopascals.

alternative is the temperature between 750 ° Celsius and 850 ° C, the hydrogen partial pressure is substantially 3,5 hectopascal and becomes so much carbonaceous in forming the carbon conductor structure Supplied with gas, that is a partial pressure of the carbonaceous gas between 8 hectopascal and 12 hectopascal sets. The temperature is preferably 800 ° Celsius and the partial pressure of the carbonaceous gas is 10 hectopascals.

Under these conditions, formation of a layer for a carbon conductive pattern and a resistivity of less than 1 mΩcm is particularly effective and easy feasible.

Prefers the temperature is at least partially by means of a photon heater aufrecherhalten. Using a photon heater to at least to provide some of the energy of heating to the required temperature, is advantageous because it has been shown that in this case the temperature can be lowered in the process. As a result, when performing the Procedure requires a lower energy intake and the risk of impairment lowered by already trained subcircuits.

In summary An aspect of the invention can be seen in that means the invention an alternative for previously used materials for Conductor structures or metallization systems of integrated circuits is created. Instead of the previous use of metals or, in the case of vertical connections, is made of doped polysilicon Used carbon. Draw the carbon conductor structures characterized by very simple and inexpensive production and simple Processability, in particular, the time is needed to form a carbon layer, much lower than that Forming a copper layer in the damascene process and is about 15 minutes.

Further have the carbon-conductor structures, especially in small Structures or opposite doped polysilicon, a lower resistivity as ladder structures from usual ones Materials in metallization on. This makes it possible the Reduce switching times of the integrated circuits, i. operate the integrated circuits at a faster rate, as it is possible today with copper metallizations. Another advantage of doped carbon, in particular over doped polysilicon, that too the thermal conductivity the doped carbon is better, resulting in a better thermal Coupling between different components in 3D integration of integrated circuits can be achieved, resulting in an improved heat dissipation outward leads.

Also, carbon is easily deposited on metal, which further increase the potential for use of a carbon-conductor structure and further simplify the manufacturing processes. Furthermore, the mechanical stability of a carbon layer on metal, or silicon oxide or silicon is sufficient and is above the usual required strength of 400 kg / m ² . According to the invention, the carbon conductor structures, both as interconnects within a plane or layer or, in other words, as substantially horizontal conductor structures, as well as so-called vias, ie in the substantially vertical conductor structures can be used. In this case, the vias may be vias of a 3D integration, ie vias, which connect one level of 3D integration with another level of 3D integration, as well as vias, which have different layers of a layer arrangement within a level of 3D integration which forms, for example, an electrical circuit, connects to each other.

embodiments The invention is illustrated in the figures and will be explained in more detail below.

It demonstrate:

1a a schematic sectional view of a layer arrangement according to the first part steps of a method according to a first embodiment;

1b a schematic sectional view of the layer arrangement of 1a after additional substeps of the method according to the first embodiment, which serve to structure the layer arrangement;

1c a schematic sectional view of the layer arrangement of 1b after additional substeps of the method according to the first embodiment, which serve to form a cover layer;

1d a schematic sectional view of the layer arrangement of 1c after additional substeps of the method according to the first embodiment, which serve to planarize the cover layer;

2a a scanning electron micrograph of a filled with a carbon layer according to the invention hole or via;

2 B a scanning electron micrograph of the carbon layer 2a showing the homogeneity of the carbon layer; and

3 a schematic sectional view of a 3D integrated electrical circuit.

1a shows a schematic representation of a layer arrangement 100 after first part steps of a method according to a first embodiment for producing an electrical circuit with carbon-conductor structures. This in 1 schematically illustrated embodiment relates to a so-called air-gap structure in which carbon conductor structures are formed.

Under an air-gap structure in this application is a layer arrangement in which, for the purpose of reducing the dielectric constant, and thus the parasitic Capacities, the layer arrangement in subregions of the structure no dielectrics but air-filled or cavity structures filled with a suitable gas, air-gaps, are provided. In other words Some dielectric layers of a layer arrangement are replaced by cavities. Each individual dielectric layer may consist of one or more different ones Dielectrics be formed and / or the materials of the dielectric layers can for different Dielectric layers be different. This will be the Gesamtdielektrizitätszahl the air gap structure lowered.

The layer arrangement 100 points in 1a a first layer 101 on, which is formed for example of silicon oxide. On this first layer 101 becomes a second layer 102 formed, which has as material substantially carbon and from which subsequently carbon-conductor structures are formed. The carbon layer 102 can be formed by means of various processes, two of which will be described in more detail below.

In a first process, at a temperature between 900 ° Celsius and 970 ° Celsius, preferably 950 ° Celsius, a hydrogen atmosphere with a pressure of 0.001 bar, or 1 hectopascal, is generated. Subsequently, a carbon-containing gas such as methane (CH ₄ ), ethane (C ₂ H ₆ ), alcohol vapor (C ₂ H ₅ OH) or acetylene (C ₂ H ₄ ) is introduced until a total pressure of about 0.6 bar, or 600 hectopascal, sets. Under these conditions, a polycrystalline carbon layer separates 102 on the surface of the first layer 101 from. The carbonaceous gas is constantly introduced during the deposition process, so that the total pressure remains substantially constant.

In a second process, at a temperature of about 800 ° Celsius, a hydrogen atmosphere of about 2 Torr to 3 Torr, preferably 2.5 Torr, which corresponds to about 3.33 hectopascal, is generated. Simultaneously with heating by means of a normal oven, a so-called photon furnace is used, ie a light source which additionally provides energy. As a result, the temperature can be reduced compared to the method described above, which can be advantageous depending on the field of application. A carbon-containing gas, for example methane (CH ₄ ), ethane (C ₂ H ₆ ), alcohol vapor (C ₂ H ₅ OH) or acetylene (C ₂ H ₄ ) is then in turn introduced into the hydrogen atmosphere until a partial pressure of the carbon-containing gas between 6 , 5 Torr and 8.5 Torr, preferably 7.5 Torr, which corresponds to about 10 hectopascals. Under these conditions, a polycrystalline carbon layer separates out. Also in this process, the carbonaceous gas is constantly introduced as long as the conformal deposition is performed.

The thickness of the carbon layer 102 , can be adjusted in both processes described over the duration of the deposition and at the same time determines the height of the carbon-conductor structures. The thus deposited carbon layer 102 has a resistivity of about 1 mΩcm. To increase the conductivity, the carbon layer can 102 be doped or intercalated. For this purpose, it is possible to use the dopants customary in silicon technology, such as, for example, boron, phosphorus or arsenic. Intercalation is possible with metal halides such as arsenic fluoride or antimony fluoride. By doping / intercalation specific resistances up to about 1 μΩcm are possible. After the intercalation, thermal activation is carried out, preferably selectively by means of a laser.

On the carbon layer 102 subsequently become a third layer 103 and a fourth layer 104 are formed, which are both made of a dielectric material, such as silicon oxide, and which serve the carbon layer 102 electrically isolate. Alternatively, silicon nitride may also be used as the dielectric material. Preferably, a material is used which in subsequent etching steps has a selectivity to the other materials used and which can be easily deposited.

The following will, as in 1b shown the layer arrangement 100 structured by a photoresist 105 on the fourth layer 109 is formed and structured, whereby a mask is formed. By means of this mask is then with a conventional dry etching process, for example by means of an oxygen plasma and / or hydrogen plasma or air plasma, the fourth layer 104 , the third layer 103 and the carbon layer 102 etched and structured, creating a ditch 106 is trained.

The following will, as in 1c shown the photoresist layer 105 removed and a fifth layer 107 formed of a dielectric material. The fifth shift 107 This is only selective on the third layer 103 separated, causing the ditch 106 obtained by etching back the carbon layer 102 is created, covered and bridged, creating a cavity, Air Gap, arises. On the fifth layer 107 subsequently becomes a sixth layer 108 formed of a dielectric material. The fifth shift 107 and the sixth layer 108 Both serve to cover the trench 106 , which thus has a gap or chamber in the layer arrangement 100 , an air gap, forms. Furthermore, serve the fifth layer 107 and the sixth layer 108 the isolation and passivation of the layer arrangement 100 , in particular the carbon layer 102 , The generation of self-aligning air-gap structures, as shown for example in [5], are also possible in a simple manner by suitable silicon dioxide stack deposition.

Below are, as in 1d shown the fifth layer 107 and the sixth layer 108 , ie, the insulation or passivation, planarized in a process step, preferably by means of chemical mechanical polishing. As a result, a planarized surface is formed, on which subsequently further planes of metallizations or planes with integrated electrical circuits can be formed. According to the invention, a plurality of metallization levels, which can be electrically coupled to each other, form one above the other, whereby a 3D integration of the integrated circuits can be achieved.

2a shows a scanning electron micrograph (SEM image) of a layer arrangement 200 a hole or via filled with a carbon layer according to the invention.

On the basis of the SEM image, which in 2a As shown, it can be seen that it is possible by means of the inventive method, narrow holes and cavities in a first layer 201 or substrate with a carbon layer 202 to fill and thereby form a vertical connection or via between two levels of a 3D integrated circuit. The illustrated hole has a diameter of less than 50 nm. The hole was filled by one of the methods described above for forming a polycrystalline carbon layer. By way of example, it is also possible in the SEM image to detect different regions in the carbon layer which correspond to the individual crystalline regions of the polycrystalline carbon layer. These are somewhat darker in the SEM image than the surrounding carbon.

With a carbon layer according to the invention, it is possible in a simple manner to form vertical connections which have a high aspect ratio. Aspect ratios between 100 and 400 can be achieved. Furthermore, the carbon layer according to the invention can be deposited even at high aspect ratios with a very homogeneous layer thickness, as it is in 2 B it can be seen, in particular in the detail enlargement, in which it can be seen that the thickness of the carbon layer is the same on both the substrate, on the sidewalls of the vertical connections and on the floors of the vertical connections, the vertical connections here are designed as narrow holes.

In 3 a schematic sectional view of a 3D integrated electrical circuit is shown.

A 3D integrated circuit 300 has a first wafer 301 on which in 3 schematically partial circuits 302 303 and 304 , which may represent transistors, for example, are formed. On the first wafer 301 and the subcircuits is a passivation layer 305 formed, which the first wafer 301 from a second wafer 306 separates which on the passivation layer 305 is trained. Also on the second wafer 306 are schematic subcircuits 307 . 308 and 309 educated. Individual components or partial circuits of the two wafers are connected to one another by vertical connections according to the invention 310 and 311 coupled from carbon conductors. Also, individual components within a single plane are through carbon conductor structures 312 and 313 coupled. In other words, at least part of the metallization system of a 3D integrated circuit is formed by conductor structures which essentially comprise carbon as the material.

In summary An aspect of the invention can be seen in that means the invention an alternative for previously used materials for Conductor structures or metallization systems of integrated circuits is created. Instead of the previous use of metals or, in the case of vertical connections, is made of doped polysilicon Used carbon. Draw the carbon conductor structures characterized by very simple and inexpensive production and simple Processability, in particular, the time is needed to form a carbon layer, much lower than that Forming a copper layer in Damascus process.

• [1] M. Engelhardt, Proc. 3rd International AVS Conference on Microelectronics and Interfaces ICMI (2002), Seite 19
• [2] M. Koyanagi et al., "Neuromorphic Vision Chip Fabricated Using Three-Dimensional Integration Technology", IEEE International Solid-State Circuits Conference ISSCC (2001)
• [3] http://minerals.usgs.gov/minerals/pubs/commodity/niobium/231798.pdf
• [4] H. Matsubara et al., Synthetic Metals, 18 (1987), Seite 503–507
• [5] DE 101 25 019

In this application the following documents are cited:

• [1] M. Engelhardt, Proc. 3rd International AVS Conference on Microelectronics and Interfaces ICMI (2002), page 19
• [2] M. Koyanagi et al., "Neuromorphic Vision Chip Fabricated Using Three-Dimensional Integration Technology", IEEE International Solid-State Circuits Conference ISSCC (2001)
• [3] http://minerals.usgs.gov/minerals/pubs/commodity/niobium/231798.pdf
• [4] H. Matsubara et al., Synthetic Metals, 18 (1987), Page 503-507
• [5] DE 101 25 019

100

layer arrangement

101

first Layer (dielectric)

102

Second Layer (carbon)

103

third Layer (dielectric)

104

fourth Layer (dielectric)

105

Photoresist layer

106

dig

107

fifth shift (Dielectric)

108

sixth Layer (dielectric)

200

layer arrangement

201

first Layer 201 (substrate)

202

Carbon layer

300

3D integrated circuit

301

first wafer

302

Subcircuit

303

Subcircuit

304

Subcircuit

305

passivation

306

second wafer

307

Subcircuit

308

Subcircuit

309

Subcircuit

310

Vertical compound

311

Vertical compound

312

Carbon conductor track

313

Carbon conductor track

Claims (19)

Electrical circuit having at least one carbon conductor structure, which formed by means of a layer consisting essentially of carbon which has a resistivity of less than 1 mΩcm. Electrical circuit according to claim 1, which is at least has two sub-circuits, wherein the at least two sub-circuits electrically connected to each other by means of the carbon conductor structure are. An electrical circuit according to claim 2, wherein the at least two subcircuits in two different levels forms and the carbon conductor structure is a vertical connection between forms the two different levels. An electrical circuit according to claim 3, wherein the aspect ratio of Vertical connection is between 50 and 500. Electrical circuit according to one of claims 2 to 4, in which the subcircuits are each individual chips. Electrical circuit according to one of claims 2 to 5, in which at least one subcircuit is a biochip. Electrical circuit according to one of claims 1 to 6, wherein the layer consisting essentially of carbon a polycrystalline carbon layer. Electrical circuit according to one of claims 1 to 7, in which the carbon conductor structure has a specific resistance between 1 μΩcm and 100 μΩcm. Electrical circuit according to one of claims 1 to 8, in which the carbon conductor structure has a resistivity between 1 μΩcm and 5 μΩcm. Electrical circuit according to one of claims 1 to 9, in which the carbon-conductor structure has a carbon trace and / or a via is essentially carbon. Method for producing a carbon conductor structure an electrical circuit on a substrate, wherein the Producing the carbon conductor pattern on a surface of the substrate in an atmosphere with a hydrogen partial pressure between 1 hectopascal and 6 hectopascal and at a temperature between 700 ° Celsius and 1000 ° Celsius the Carbon conductor structure as consisting essentially of carbon Layer by means of feeding a carbonaceous gas is formed. Method according to claim 11, in which a via is formed by means of the carbon conductor structure, which subcircuits of the electrical circuit with each other connects, which are arranged in different levels. Method according to one the claims 11 or 12, in which the carbon conductor structure, doped and / or is intercalated. Method according to claim 13, in which the doped and / or intercalated carbon conductor structure thermally activated. Method according to claim 13 or 14, in which a selective activation of the doped and / or intercalated Carbon conductor structure is performed by laser. Method according to one the claims 11 to 15, in which the carbonaceous gas methane, ethane, alcohol vapor and / or acetylene. Method according to one of the claims 11 to 16, where the temperature is between 900 ° Celsius and 970 ° Celsius, the hydrogen partial pressure is 1 hectopascal, and so much carbon-containing gas is supplied to form the carbon-conductor structure that a total pressure of between 500 hectopascal and 700 hectopascal is established. Method according to one the claims 11 to 16, where the temperature is between 750 ° Celsius and 850 ° Celsius, the hydrogen partial pressure is 3.5 hectopascals and in forming the carbon-conductor structure as much carbon-containing gas is supplied, that is a partial pressure carbonaceous gas between 8 hectopascal and 12 hectopascal established. Method according to one the claims 11 to 18, wherein the temperature at least partially by means of a Photon heating will be upkeep.