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DE10085345T1 - Einrichtung und Verfahren zur Ankopplung eines Speichermoduls - Google Patents

Einrichtung und Verfahren zur Ankopplung eines Speichermoduls

Info

Publication number
DE10085345T1
DE10085345T1 DE10085345T DE10085345T DE10085345T1 DE 10085345 T1 DE10085345 T1 DE 10085345T1 DE 10085345 T DE10085345 T DE 10085345T DE 10085345 T DE10085345 T DE 10085345T DE 10085345 T1 DE10085345 T1 DE 10085345T1
Authority
DE
Germany
Prior art keywords
coupling
memory module
module
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE10085345T
Other languages
English (en)
Other versions
DE10085345B4 (de
Inventor
David W Frame
Christopher J Banyal
Karl H Mauritz
Albert R Nelson
Quing-Lun Chen
Hany M Fahmy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE10085345T1 publication Critical patent/DE10085345T1/de
Application granted granted Critical
Publication of DE10085345B4 publication Critical patent/DE10085345B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4086—Bus impedance matching, e.g. termination
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/646—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00 specially adapted for high-frequency, e.g. structures providing an impedance match or phase match
    • H01R13/6461—Means for preventing cross-talk
    • H01R13/6464—Means for preventing cross-talk by adding capacitive elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/646—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00 specially adapted for high-frequency, e.g. structures providing an impedance match or phase match
    • H01R13/6473—Impedance matching
    • H01R13/6477—Impedance matching by variation of dielectric properties

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Small-Scale Networks (AREA)
  • Information Transfer Systems (AREA)
  • Logic Circuits (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE10085345T 1999-12-22 2000-11-20 Schaltungsanordnung mit Direct-Rambus-Speicherelementen Expired - Fee Related DE10085345B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/470,542 1999-12-22
US09/470,542 US7010629B1 (en) 1999-12-22 1999-12-22 Apparatus and method for coupling to a memory module
PCT/US2000/031911 WO2001046814A2 (en) 1999-12-22 2000-11-20 Apparatus and method for coupling to a memory module

Publications (2)

Publication Number Publication Date
DE10085345T1 true DE10085345T1 (de) 2002-12-12
DE10085345B4 DE10085345B4 (de) 2008-08-28

Family

ID=23868028

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10085345T Expired - Fee Related DE10085345B4 (de) 1999-12-22 2000-11-20 Schaltungsanordnung mit Direct-Rambus-Speicherelementen

Country Status (7)

Country Link
US (1) US7010629B1 (de)
KR (1) KR100438995B1 (de)
CN (1) CN1318995C (de)
AU (1) AU1924001A (de)
DE (1) DE10085345B4 (de)
TW (1) TWI236593B (de)
WO (1) WO2001046814A2 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7017002B2 (en) 2000-01-05 2006-03-21 Rambus, Inc. System featuring a master device, a buffer device and a plurality of integrated circuit memory devices
US7363422B2 (en) 2000-01-05 2008-04-22 Rambus Inc. Configurable width buffered module
US7315000B2 (en) * 2003-07-27 2008-01-01 Sandisk Il Ltd. Electronic module with dual connectivity
US7788451B2 (en) * 2004-02-05 2010-08-31 Micron Technology, Inc. Apparatus and method for data bypass for a bi-directional data bus in a hub-based memory sub-system
US7296129B2 (en) * 2004-07-30 2007-11-13 International Business Machines Corporation System, method and storage medium for providing a serialized memory interface with a bus repeater
US7309839B1 (en) * 2004-10-15 2007-12-18 Xilinx, Inc. Storage device for integrated circuits and method of employing a storage device
US11328764B2 (en) 2005-09-26 2022-05-10 Rambus Inc. Memory system topologies including a memory die stack
US7464225B2 (en) 2005-09-26 2008-12-09 Rambus Inc. Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology
US7562271B2 (en) 2005-09-26 2009-07-14 Rambus Inc. Memory system topologies including a buffer device and an integrated circuit memory device
KR101273241B1 (ko) * 2011-08-19 2013-06-11 포항공과대학교 산학협력단 저전력 고속의 송수신 장치
US9966925B2 (en) 2016-01-28 2018-05-08 Analog Devices, Inc. Apparatus and method to balance the parasitic capacitances between metal tracks on an integrated circuit chip

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4225900A (en) * 1978-10-25 1980-09-30 Raytheon Company Integrated circuit device package interconnect means
US5334962A (en) * 1987-09-18 1994-08-02 Q-Dot Inc. High-speed data supply pathway systems
JP2513017Y2 (ja) * 1990-07-30 1996-10-02 株式会社アドバンテスト 高周波多極コネクタ
EP0558770A1 (de) * 1992-02-29 1993-09-08 International Business Machines Corporation On-Line-Steckbarer elektrischer Schaltkreis
US5387114A (en) * 1993-07-22 1995-02-07 Molex Incorporated Electrical connector with means for altering circuit characteristics
US5467455A (en) * 1993-11-03 1995-11-14 Motorola, Inc. Data processing system and method for performing dynamic bus termination
US5655113A (en) * 1994-07-05 1997-08-05 Monolithic System Technology, Inc. Resynchronization circuit for a memory system and method of operating same
US5578940A (en) * 1995-04-04 1996-11-26 Rambus, Inc. Modular bus with single or double parallel termination
US5980321A (en) * 1997-02-07 1999-11-09 Teradyne, Inc. High speed, high density electrical connector
US6230245B1 (en) * 1997-02-11 2001-05-08 Micron Technology, Inc. Method and apparatus for generating a variable sequence of memory device command signals
US6081430A (en) * 1997-05-06 2000-06-27 La Rue; George Sterling High-speed backplane
EP1018290A4 (de) * 1997-05-23 2000-08-23 Alpine Microsystems Inc System und verfahren zur verpackung von integrierten schaltungen
KR100281266B1 (ko) * 1997-06-20 2001-03-02 김영환 고속 버스 인터페이스 회로
US6067594A (en) * 1997-09-26 2000-05-23 Rambus, Inc. High frequency bus system
US5966293A (en) * 1997-12-15 1999-10-12 Hewlett-Packard Company Minimal length computer backplane
US6003121A (en) * 1998-05-18 1999-12-14 Intel Corporation Single and multiple channel memory detection and sizing
US6067596A (en) * 1998-09-15 2000-05-23 Compaq Computer Corporation Flexible placement of GTL end points using double termination points
US6310392B1 (en) * 1998-12-28 2001-10-30 Staktek Group, L.P. Stacked micro ball grid array packages
US6089923A (en) * 1999-08-20 2000-07-18 Adc Telecommunications, Inc. Jack including crosstalk compensation for printed circuit board
US6139371A (en) * 1999-10-20 2000-10-31 Lucent Technologies Inc. Communication connector assembly with capacitive crosstalk compensation

Also Published As

Publication number Publication date
WO2001046814A2 (en) 2001-06-28
AU1924001A (en) 2001-07-03
CN1318995C (zh) 2007-05-30
DE10085345B4 (de) 2008-08-28
TWI236593B (en) 2005-07-21
KR100438995B1 (ko) 2004-07-02
KR20020068060A (ko) 2002-08-24
WO2001046814A3 (en) 2002-01-10
US7010629B1 (en) 2006-03-07
CN1434944A (zh) 2003-08-06

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee