DE10065754A1 - Execution of computer code out of sequence so that it runs faster, relating particularly to multiprocessor systems, with data attributes declared that define data in such a way that data integrity is preserved. - Google Patents

Abstract

Method for control of a computer system (1) in which source code is converted into machine code (15) with an associated reordering of instructions. The source code includes a data declaration that assigns a first attribute to a first data store (11) and a second attribute to a second data store (13). The machine code is stored in a program memory after reordering and executed by a processor (2) in yet another sequence. The data attributes of the data stores limits reordering of source code instructions and reordering of machine code instructions at execution. Independent claims are made for (1) a computer system with an execution environment in which source code and machine code can be reordered so that it runs faster. (2) a computer program product.

Description

The present patent application relates to a method for Control of a computer system, a computer system with a Execution unit and a corresponding computer program product that is stored on a computer-compatible medium chert is.

Computer systems with conventional processors stand out characterized in that the processor (arithmetic unit) instructions loads from a command memory and this in order processes how they are stored in the command memory. This always ensures that a memory write Command that is in order in the command memory before ei A memory read command is also arranged before the memory cher read command is executed so that the data is already in the data memory are stored and the memory read Command the actual current data from the memory holds.

Modern processors, for example, have several in parallel Arithmetic units so that commands in their processing rows order within a processor can be swapped to to be run in a parallel computing unit where due to the total processing power of the processor. A further increase in processing speed Nes computer system is, for example, by the arrangement multiple processors possible. Here the present Instruction sequence distributed over several processors, whereby a accelerated processing of the underlying problem is enough.  

The problem here is that commands are in their order are exchanged, which can result in data inconsistencies NEN.

This is the case, for example, if in a first pro a result is calculated and the correct calculation The result is subsequently obtained from a second processor must be used. A possible way to do this provides that the correct calculation of the result is displayed by the first processor in a signal field. Only then does a second processor access the one from the first processor calculated result when the signal field indicates that the result is calculated correctly and completely has been. Now the order of processing in the first Processor swapped, so the signal field can be a supposed Show validly calculated result, although the first Pro processor has not yet calculated this result. consequently incorrect data is processed in the second processor. The problem described does not only occur for several processes sensors, but is already in one processor with several tasks, processes or threads. This problem can be solved, for example, that the moder NEN processors parallel processing or visible reversal of the order of processing is quickly suppressed. The problem would continue solvable that only one processor of the computer system Edited this program and the other processors the computer system does not contribute to the processing of the Program. However, both approaches lead to one significantly reduced computing power of the computer system.

It is the object of the invention to provide a control method to specify a computer that will lead to a more efficient ar of the computer system, a corresponding com to specify the computer system with an execution environment and a to specify the corresponding computer program product.  

According to the invention, the object is achieved by a method for controlling a computer system in the

• - A source code with source code commands is created, which in an order of commands are arranged;
• - The source code includes a data declaration and the Data declaration a first data store a first at assigns tribute and a second to a second data storage Assigns attribute; and
• - The source code is translated into machine instructions and the machine instructions are rearranged so that the Machine instructions a machine instruction Order that depends on the order of commands gives way; and
• - The machine instructions stored in a command memory be saved and from a processing unit from the command memory and different from the machine Structural order executed by the computing unit become;
• - The first attribute of the first data store and the second attribute of the second data memory cause that the rearrangement of the machine instructions at the Über restricted in a first predetermined manner becomes; and
• The first attribute of the first data storage means, that the reordering of the machine instructions at the Execution in the processing unit in a second agreed is restricted.

An advantage of the method according to the invention is that that a first attribute and a second attribute to declare tion of data are used, the first attribute being egg another restriction regarding the interchangeability of Instructions included as the second attribute. example wisely, the first attribute has an effect on the interchangeability of machine instructions that are so probably on the translation process of the source code in Maschi instructions as well as the execution order of the  Machine instructions affect the computing unit. The second attribute includes an effect on ver Interchangeability of machine instructions that are only on the translation process of the source code into machines structures affects.

The first attribute can be the data integrity of a multiprocess ensure the interchangeability of machines instructions for both translation and translation Program execution can be prevented. This initially provides ne limitation, which is the processing speed of the computer program brakes. Accelerated processing To enable the computer program, for example an order of instructions that only be one processor is created using the second attribute. The for example, the second attribute contains only one restriction exchange of machine instructions for the Translation so that a single processor internally the Abar processing order can change to an accelerated Abar to achieve processing of the computer program. Modern processing Ren have means that ensure data consistency währleisten.

An embodiment of the method according to the invention provides before translating the source code into machine instruct tion by means of an interpreter or a compiler or a just-in-time compiler. An interpreter ter is suitable for translating the source code, whereby the Translation at the time of the program at the time of ver command is processed. A compiler translates the Source code in advance, so that efficient program execution can be done. A just-in-time compiler translates the Source code at program runtime, whereby in contrast to the Inter preter the machine instructions generated from the source code saved so that they are translated only once have to.  

Another embodiment of the method according to the invention provides that the first attribute of the first data store along with a first source code command that he clicked on Most data storage accesses, the generation of a first Ma Machine instruction in translation causes the one he is the limit.

Another embodiment of the method according to the invention provides that the second attribute of the second data store together with a second source code command that is sent to the accesses second data storage, generating a second Machine instruction in translation causes one forms the second border.

Another embodiment of the method according to the invention stipulates that the first limit or the second Boundary is a fence machine instruction or egg ne machine instruction that affects the effect of a Fence machine instruction included. Fence- Machine instructions or machine instructions that affect the effect of a fence machine instruction are known for modern processors.

Another embodiment of the method according to the invention stipulates that the first source code command or the second source code command for a memory read access is one in the first or the second data storage reads stored information or a storage Write access that is information in the first or the second data store.

For example, the source code command is access to a signal field, the signal field at can be used for example to ensure that al arrange in the program before access to the signal field machine instructions are processed with certainty, before the signal field receives a signal value.  

Another embodiment of the method according to the invention stipulates that during translation and during translation management in a processing unit ensures that all Source code commands that appear before the first source code command are translated into machine instructions that in the machine instruction order before the first Ma machine instructions are arranged and it is ensured that all Ma. arranged before the first machine instruction machine instructions are executed before one after the first machine instruction arranged machine instruction is performed.

Another advantageous embodiment of the invention The procedure provides that during the translation is that all source code commands before the second Source code command are arranged in machine instructions that are translated in the machine instruction Order arranged before the second machine instruction are.

Another advantageous embodiment of the invention The procedure provides that during translation and during the execution in a computing unit ensures that no visible exchange in the machine instruction sequence.

Another advantageous embodiment of the invention The procedure provides that during the translation is that there is no visible one across the second border Swap in the machine instruction order follows.

This ensures that there is a visible mix-up is excluded from instructions across the border, so that program parts can be strictly separated. A visible swapping includes swapping, for example  the processing order of machine instructions or the exchange of the shooting of the Abarbei machine instruction for other processors or processes become visible.

With regard to the computer system, the object is achieved by a computer system with an execution environment

• - for which a source code with source code commands has been created, which are arranged in an order of commands;
• - The source code includes a data declaration and the Data declaration a first data store a first at assigns tribute and a second to a second data storage Assigns attribute; and
• - The computer system having means for the source code for execution by the computer system from the Computersy system into machine instructions, the Ma machine instructions are rearranged so that the machine machine instructions an order of machine instructions have which deviates from the order of commands; and
• - The machine instructions in a command memory for Processing are stored by a computing unit and the computing unit has means for swapping the Machine instruction order are suitable;
• - The computer system having means which cause the first attribute of the first data store and the second Attribute of the second data store the resorting of Machine instructions for translation in a first restrict in a predetermined manner; and
• - The computer system having means which cause the first attribute of the first data store the. Umsortie The machine instructions for execution in the Computing unit turned on in a second predetermined manner limits.

The computer system according to the invention enables stowage research and parallel processing of instructions in an instruction memory are stored. This leads to a  accelerated execution of the ge in a command memory stored instructions, whereby si by additional means It is established that the rearrangement of the machine instruct tion is restricted in a predetermined manner. here by enables a data inconsistency during the Processing of instructions is avoided. Still is provided that the funds only in translation Limit reordering of machine instructions.

With regard to the computer program product, the task is ge solves through a computer program product that is directly in the in tegrated memory of a digital computer can and includes software code sections with which the Steps according to one of claims 1 to 10 who performed when the program product runs on a computer.

Furthermore, the task regarding the computer program is products solved by a computer program product based on a computer-compatible medium is stored and computer-readable Program means includes with which the steps according to one of the Claims 1 to 10 are executed when the program pro runs on a computer.

Advantageous embodiments of the invention are the subject of the respective subclaims.

The invention is described below with reference to exemplary embodiments len and figures explained in more detail.

The figures show:

. Figure 1 shows a source code with source code instructions, as well as generated from source machine instructions;

Figure 2 is a computer system having a first processor, a first instruction memory and a data memory and a second processor having a second instruction memory.

In Fig. 1, a source 7 is shown, the source code contains commands. 8 The source code commands 8 are arranged in a command sequence 9 . The source code 7 comprises a data declaration 10 which assigns a first attribute 12 to a first data memory 11 and a second attribute 14 to a second data memory 13 . In addition, a first source code command 17 and a second source code command 20 are arranged in the source code 7 . Further, 1 is a first loading is shown in Fig. Failed memory 4, are disposed in the machine instructions 15 in a machine instruction sequence 16, wherein the machine instructions have been translated 15 from the source code instructions. 8 The translation of the machine instructions 15 from the source code commands 8 can be carried out during the runtime of the program. Furthermore, it is possible for a compiler to generate the machine instructions 15 before the program runs, which enables the computer program to be processed efficiently. Furthermore, it is possible for a just-in-time compiler to translate the source code commands 8 into the machine instructions 15 , as a result of which a translation can be carried out for the specific hardware of the computer system at runtime of the program.

In FIG. 2, a computer system 1 is shown. The computer system 1 comprises a first computing unit 2 and a second computing unit 3 . The first arithmetic unit 2 is connected to the first instruction memory 4 and the second arithmetic unit 3 is connected to a second instruction memory 5 . The first arithmetic unit 2 and the second arithmetic unit 3 are connected to a data memory 6 . The machine instructions 15 are arranged in the first instruction memory 4 in the machine instruction sequence 16 .

A first data memory 11 , a second data memory 13 and a third data memory 25 are arranged in the data memory 6 .

The machine instructions 15 include interchangeable machine instructions 23 and a first data access 24 which accesses the third data memory 25 . Subsequently, the machine instructions 15 comprise a first machine instruction 18 , which includes data access to the first data memory 11 . The first machine instruction 18 by bordered a first boundary 19, because the first machine instruction 18 on the marked with the first attribute 12 first Since tenbereich 11 accesses. If, for example, the interchangeable machine instructions 23 include the calculation of a result which is stored in the third data memory 25 by means of the first data access 24 , then it is necessary for the first machine instruction 18 to write a signal value into the first data memory 11 only then when the first data access 24 has ended the write operation in the third data memory 25 . This enables the second processor 3 to execute the query machine instruction 25 arranged in the second instruction memory 5 , in order to ensure that the data read from the third data memory in the data reading machine instruction 27 executed below is valid. The order of the first Datenzu handle 24 and the first machine instruction 18 is observed Prozes sorübergreifend so that both the transla the source code 7-cutting in the machine instructions 15 as well as the execution of the first machine instructions 15 in the first processor 2, the interchangeability of the Reihenfol ge is restricted. The first source code command 17 is, for example, translated into the first machine instruction 18 , the translation taking into account that access to the first data memory 11 and the attribution of the first data memory 11 to the first are contained in the first source code command 17 Attribute 12 is taken into account.

It is further provided that the second source code command 20 is translated into a second machine instruction 21 , which is also arranged in the first command memory 4 . The second source code command 20 provides memory access to the second data memory 13 , which is identified with the second attribute 14 . This ensures that a second boundary 22 is formed next to the two-th machine instruction 21 during the translation of the source code commands 8 into the machine instructions 15 . The second limit 22 provides that during the translation process, the exchange of machine instructions is restricted in such a way that data consistency is guaranteed. This is the case, for example, when the first processor 2 accesses the second data memory 13 exclusively. In this case, the first processor 2 can swap during the runtime - also beyond the limit 22 formed by the second machine instruction 21 - as long as the first processor 2 ensures that data consistency is guaranteed.

The second attribute 14 is useful, for example, when an interrupt occurs between two instructions that are to be executed in a fixed order to one another. An error can occur here if the commands are swapped in their processing order, since the interrupt handler called by the interrupt can read out the data areas processed by the interchanged commands for evaluation. A swap during the runtime within the processor can be recognized by modern processors, so that the premature storage of a signal date before the storage of a useful date can be recognized and removed by the processor. However, if this exchange takes place during the translation, the order changed during the translation cannot be corrected by the processor. The possibility of swapping during the execution of the program increases the execution speed of the program code, since commands can be processed prematurely, for example in a parallel execution unit of the processor.

Another embodiment includes a usage date and a Signal date, the date of use by the first processor should be saved before the first processor the Si gnaldatum saves the correct storage of the user date. Likewise, the second processor should only do that Read and evaluate signal date from memory so that si can be made that in a subsequent step valid user data from the second processor from the memory to be read. This can be achieved with the first attribute be that both the swapping of instructions during translation and exchange during execution restriction.

If a usage date and a signal date or Data structure and a pointer pointing to the data structure (Pointer) used only by one processor, so should also if an interrupt occurs, ensure that the Signal date is only set when the user data is already are written or the pointer to a data structure is only used if the data structure be is already filled (initialized) with valid data. This can be achieved with the second attribute, which is the Exchange of instructions during translation limits and enables during the term. Because the trust performed by the processor during runtime the resulting data inconsistencies of be corrected to the processor.  

LIST OF REFERENCE NUMBERS

1

computer system

2

first arithmetic unit

3

second arithmetic unit

4

first command memory

5

second command memory

6

data storage

7

Source code

8th

Source commands

9

Command Order

10

data declaration

11

first data store

12

first attribute

13

second data storage

14

second attribute

15

machine instructions

16

Machine instruction sequence

17

first source code command

18

first machine instruction

19

first limit

20

second source code command

21

second machine instruction

22

second limit

23

interchangeable machine instructions

24

first data access

25

third data store

26

Query machine instruction

27

Data read-machine instruction
S1 first program step
S2 second program step
S3 third program step
S4 fourth program step
S5 fifth program step

Claims (13)

1. Method for controlling a computer system ( 1 ) in the
a source code ( 7 ) with source code commands ( 8 ) is arranged, which are arranged in a command sequence ( 9 );
wherein the source code ( 7 ) comprises a data declaration ( 10 ) and the data declaration ( 10 ) assigns a first attribute ( 12 ) to a first data store ( 11 ) and assigns a second attribute ( 14 ) to a second data store ( 13 ); and
the source (7) is translated into machine instructions (15) and the machine instructions (15) are rearranged so that the machine instructions (15) Maschinenin constructive tions sequence having (16) the order of the instruction (9) is deviated; and
the machine instructions ( 15 ) are stored in a command memory ( 4 ) and loaded by a computing unit ( 2 ) from the command memory ( 4 ) and executed differently from the machine instruction sequence ( 16 ) by the computing unit ( 2 );
wherein the first attribute ( 12 ) of the first data store ( 11 ) and the second attribute ( 14 ) of the second data store ( 13 ) have the effect that the rearrangement of the machine instructions ( 15 ) during translation is restricted in a first predetermined manner; and
wherein the first attribute ( 12 ) of the first data memory ( 11 ) has the effect that the re-sorting of the machine instructions ( 15 ) when executed in the computing unit ( 2 ) is restricted in a second predetermined manner. 2. The method according to claim 1, characterized in that the translation of the source code ( 7 ) in machine instructions ( 15 ) by means of an interpreter or a compiler or egg nes Just-In-Time compiler is carried out. 3. The method according to any one of claims 1 or 2, characterized in that the first attribute ( 12 ) of the first data store ( 11 ) together with a first source code command ( 17 ) which he accesses the most data store ( 11 ), causes the generation of a first machine instruction ( 18 ) during translation, which forms a first boundary ( 19 ). 4. The method according to any one of claims 1 to 3, characterized in that the second attribute ( 14 ) of the second data memory ( 13 ) together with a second source code command ( 20 ) which accesses the second data memory ( 13 ), the Generation of a second machine instruction ( 21 ) in the translation be effective, which forms a second boundary ( 22 ). 5. The method according to any one of claims 3 to 4, characterized in that the first boundary ( 19 ) or the second boundary ( 22 ) is a fence machine instruction or is a machine instruction which is the effect of a fence machine instruction includes. 6. The method according to any one of claims 3 to 5, characterized in that it is in the first source code command ( 17 ) or the second source code command ( 20 ) is a memory read access, one in the first or reads out information stored in the second data memory ( 11 , 13 ) or is a memory write access that writes information into the first or the second data memory ( 11 , 13 ). 7. The method according to any one of claims 3 to 6, characterized in that it is ensured during the translation and - during execution in a computing unit ( 2 ) that all source code commands are arranged before the first source code command ( 17 ) are translated into machine instructions arranged in the machine instruction order ( 16 ) before the first machine instruction ( 15 ) and it is ensured that all machine instructions arranged before the first machine instruction ( 18 ) are executed before one after the first Machine instruction ( 18 ) arranged machine instruction is executed. 8. The method according to any one of claims 4 to 7, characterized in that it is ensured during the translation that all source code commands that are arranged before the second source code command ( 20 ) are translated into machine instructions that are in the machine instruction Sequence ( 16 ) are arranged before the second machine instruction ( 21 ). 9. The method according to any one of claims 3 to 8, characterized in that it is ensured during the translation and during execution in a computing unit ( 2 ) that there is no visible confusion in the machine instruction sequence beyond the first limit ( 19 ) ( 16 ) takes place. 10. The method according to any one of claims 4 to 9, characterized in that it is ensured during the translation that there is no visible exchange in the machine instruction sequence ( 16 ) beyond the second border ( 19 ). 11. Computer system with an execution environment
for which a source code ( 7 ) with source code commands ( 8 ) is provided, which are arranged in a command sequence ( 9 );
wherein the source code ( 7 ) comprises a data declaration ( 10 ) and the data declaration ( 10 ) assigns a first attribute ( 12 ) to a first data store ( 11 ) and assigns a second attribute ( 14 ) to a second data store ( 13 ); and
the computer system ( 1 ) having means for converting the source code ( 7 ) for execution by the computer system from the computer system into machine instructions ( 15 ), the machine instructions ( 13 ) being rearranged so that the machine instructions ( 15 ) are a machine have an instruction sequence ( 16 ) which differs from the command sequence ( 9 ); and
the machine instructions ( 15 ) are stored in a command memory ( 4 ) for processing by a computing unit ( 2 ) and the computing unit ( 2 ) has means which are suitable for interchanging the machine instruction sequence ( 16 );
wherein the computer system ( 1 ) has means which cause the first attribute ( 12 ) of the first data store ( 11 ) and the second attribute ( 14 ) of the second data store ( 13 ) to rearrange the machine instructions ( 15 ) when translated into one restrict a first predetermined manner; and
wherein the computer system ( 1 ) has means which cause the first attribute ( 12 ) of the first data memory ( 11 ) to restrict the re-sorting of the machine instructions ( 15 ) when executed in the computing unit ( 2 ) in a second predetermined manner. 12. Computer program product built directly into the Memory of a digital computer can be loaded and Includes software code sections with which the steps according to one of claims 1 to 10 are executed when the Pro gram product running on a computer. 13. Computer program product based on a computer-compatible Medium is stored and computer-readable program means around summarizes with which the steps according to any one of claims 1 to 10 are executed when the program product on a Com computer is running.