Disclosure of utility model
The utility model aims to overcome the defects of the prior art, and provides a U2U3 multiplexing test fixture, so as to solve the defects that when different types of interfaces are verified on the same test main board, operators have to replace the fixture to match the test requirements of different interfaces, the efficiency is low, more importantly, new test parameter variables are introduced for each replacement due to the difference of the fixture, and particularly when the main board problem analysis is carried out, the complexity of the problem diagnosis is greatly increased due to the fact that the related parameters of different fixtures are different.
In order to achieve the above purpose, the present utility model adopts the following technical scheme:
The embodiment of the utility model provides a U2U3 multiplexing test fixture, which comprises a test connection board, wherein one end of the test connection board is provided with a physical connector, the physical connector is used for being in butt joint with a U.2 interface or a U.3 interface, the other end of the test connection board is provided with an SMP interface group, and the SMP interface group comprises a U.2RX3+ interface, a U.2 RX3-interface, a U.2TX3+ interface, a U.2RX2+/U.3RX3+ interface, a U.2RX2-/U.3 RX3-interface, a U.2TX2-/U.3 RX3 TX3+ interface, a U.2RX1-/U.3 TX2-/U.3 TX2+ interface, a U.3 TX1+interface, a U.2 TX1+interface, a U.3 TX2+interface, a U.2TX2-/U.3 X3+interface, a U.2+1+0.2+0 interface, a U.2+0+0 interface; the U.2RX3+ interface, the U.2RX3-interface, the U.2TX3-interface, the U.2TX3+ interface, the U.2RX0+ interface, the U.2TX0-interface, the U.2TX0+ interface are SMP interfaces corresponding to the U.2 interface, the U.3RX1+ interface, the U.3RX1-interface, the U.3TX1+ interface, the U.3RX0+ interface, the U.3RX0-interface, the U.3TX0-interface, the U.3TX0+ interface are SMP interfaces corresponding to the U.3 interface, and the U.2RX2+/U.3RX2-/U.2TX2-/U.2RX2-/U.3RX3+ interface, the U.2TX1+/U.3TX2-/U.3RX2-/U.2U.3RX2-/U.2U.3X2-/U.3X2-interface The CLK-interface and clk+ interface are SMP interfaces adapted to the U.2 interface and the U.3 interface.
As a preferable technical scheme of the utility model, the U.2RX3+ interface, the U.2RX3-interface, the U.2TX3-interface, the U.2TX3+ interface, the U.2RX0+ interface, the U.2RX0-interface, the U.2TX0-interface and the U.2TX0+ interface are combined into a U.2 applicable interface group; the U.3RX1+ interface, the U.3RX1-interface, the U.3TX1-interface, the U.3RX0+ interface, the U.3RX0-interface, the U.3TX0-interface and the U.3TX0+ interface are combined to form a U.3 applicable interface group, the U.2RX2+/U.3RX3+ interface, the U.2RX2-/U.3RX3-interface, the U.2TX2-/U.3TX3-interface, the U.2TX2+/U.3RX2+ interface, the U.2RX1-/U.3RX2-interface, the U.2TX1+/U.3TX2+ interface are combined to form a U.3-shared interface group, the U.2 applicable interface group, the U.2-U.3-interface group and the other end of the test connection board are arranged in a linear test connection board.
As a preferred embodiment of the present utility model, the U.2RX3+ interface, U.2RX3-interface, U.2TX3-interface, U.2TX3+ interface, U.2RX2+/U.3RX3+ interface, U.2RX2-/U.3RX3-interface, U.2TX2-/U.3TX3-interface, U.2TX2+/U.3TX3+ interface, U.2RX1-/U.3RX2-interface, U.2TX1-/U.3TX2-interface, U.2TX1+/U.3TX2+ interface, U.3RX1-interface, U.3TX1-interface, U.3TX1+ interface, U.3TX0+ interface, U.3TX0-interface, U.2RX0-interface, U.2TX0-interface, U.3TX1-/U.3TX2-interface, and the interface are all connected to the interface and the CLK interface.
As a preferred technical scheme of the utility model, the U.2RX2+/U.3RX3+ interface, the U.2RX2-/U.3RX3-interface, the U.2TX2-/U.3TX3-interface, the U.2TX2+/U.3TX3+ interface, the U.2RX1+/U.3RX2+ interface, the U.2RX1-/U.3RX2-interface, the U.2TX1-/U.3TX2-interface, the U.2TX1+/U.3TX2+ interface, the CLK-interface and the CLK+ interface are all connected to the physical connector through cables.
As a preferred technical solution of the present utility model, the test connection board includes a rectangular portion and a sector portion, the physical connector is disposed on one side of the rectangular portion, the sector portion is formed by extending from the other side of the rectangular portion, and the SMP interface group is disposed along a circumference of the sector portion.
As a preferable technical scheme of the utility model, the center of the fan-shaped part is the midpoint of the other side edge of the rectangular part.
As a preferred embodiment of the present utility model, the SMP interface groups are uniformly arranged along the circumference of the sector.
As a preferable technical scheme of the utility model, the test connecting plate is of an axisymmetric structure.
As a preferable technical scheme of the utility model, the utility model further comprises a plurality of detachable cables, one ends of the detachable cables are connected with the physical connector, and the other ends of the detachable cables are detachably connected with the U.2RX3+ interface, the U.2RX3-interface, the U.2TX3-interface, the U.2TX3+ interface, the U.2RX0+ interface, the U.2RX0-interface, the U.2TX0+ interface or the U.3RX1+ interface, the U.3RX1-interface, the U.3TX1+ interface, the U.3RX0+ interface, the U.3RX0-interface, the U.3TX0-interface and the U.3TX0+ interface.
As a preferable technical scheme of the utility model, the CLK-interface and the CLK+ interface are connected to the oscilloscope through cables.
Compared with the prior art, the U2U3 multiplexing test fixture is in butt joint with U.2 or U.3 interfaces through the physical connector, is connected with a test instrument or equipment through the SMP interface group, is designed according to the standards of U.2 and U.3 interfaces, can meet the signal transmission requirements of the two interfaces at the same time, and improves the test efficiency and the test accuracy.
The foregoing description is only an overview of the present utility model, and is intended to be more clearly understood as being carried out in accordance with the following description of the preferred embodiments, as well as other objects, features and advantages of the present utility model.
Detailed Description
The present utility model will be described in further detail with reference to the drawings and the detailed description, in order to make the objects, technical solutions and advantages of the present utility model more apparent.
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to fall within the scope of the utility model.
In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate orientations or positional relationships as described based on the drawings are merely for convenience in describing the present utility model and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present utility model.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present utility model, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the present utility model, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, connected, detachably connected, or integrally formed, mechanically connected, electrically connected, directly connected, indirectly connected via an intervening medium, or in communication between two elements or in an interaction relationship between two elements. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.
In the present utility model, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, as well as the first and second features not being in direct contact but being in contact with each other through additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly under and obliquely below the second feature, or simply means that the first feature is less level than the second feature.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present utility model. In this specification, schematic representations of the above terms should not be understood as necessarily being directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, one skilled in the art can combine and combine the different embodiments or examples described in this specification.
Referring to FIG. 1, the embodiment of the utility model provides a U2U3 multiplexing test fixture, which comprises a test connection board 1, wherein one end of the test connection board 1 is provided with a physical connector 2, the physical connector 2 is used for being in butt joint with a U.2 interface or a U.3 interface, the other end of the test connection board 1 is provided with an SMP interface group 3, and the SMP interface group 3 comprises a U.2RX3+ interface, a U.2 RX3-interface, a U.2TX3+ interface, a U.2RX2+/U.3RX3+ interface, a U.2RX2-/U.3 TX3-interface, a U.2TX2+/U.3 TX2+ interface, a U.2RX1-/U.3 TX2-interface, a U.2TX1-/U.3 TX2+ interface, a U.2 TX1+interface, a U.3 TX2-/U.3 TX2+ interface, a U.2TX2-/U.3TX3 TX3+interface, a U.2+interface, a U.3 TX2+interface, a U.3+0+0 interface, a CLK+0 interface; the U.2RX3+ interface, the U.2RX3-interface, the U.2TX3-interface, the U.2TX3+ interface, the U.2RX0+ interface, the U.2TX0-interface, the U.2TX0+ interface are SMP interfaces corresponding to the U.2 interface, the U.3RX1+ interface, the U.3RX1-interface, the U.3TX1+ interface, the U.3RX0+ interface, the U.3RX0-interface, the U.3TX0-interface, the U.3TX0+ interface are SMP interfaces corresponding to the U.3 interface, and the U.2RX2+/U.3RX2-/U.2TX2-/U.2RX2-/U.3RX3+ interface, the U.2TX1+/U.3TX2-/U.3RX2-/U.2U.3RX2-/U.2U.3X2-/U.3X2-interface The CLK-interface and clk+ interface are SMP interfaces adapted to the U.2 interface and the U.3 interface.
In this embodiment, one end of the U2U3 multiplexing test fixture is provided with a physical connector 2, which can be docked with the U.2 interface or the U.3 interface, it can be understood that U.2 and U.3 are two different interface standards, belonging to the prior art, and are commonly used for connection of high-speed and mass storage devices, specifically, considering that the existing U.2 interface and U.3 interface are SFF-8639 physical connectors, the physical connector 2 in this embodiment is an SFF-8639 physical connector 2 that can be docked with the U.2 interface and the U.3 interface. The other end of the U2U3 multiplexing test fixture is provided with a set of SMP (Smal l Form-factor Pluggable) interfaces, which are used for connecting with test equipment or measuring instruments to perform data transmission and signal measurement, specifically, the SMP interface set 3 includes multiple interfaces, which correspond to different signal lines in U.2 and U.3 interfaces respectively, for example, the interfaces of u.2rx3+, u.2rx3-and the like are used for receiving the 3 rd pair of differential signals of the U.2 interfaces, the interfaces of u.3rx3+, u.3rx3-and the like are used for receiving the 3 rd pair of differential signals of the U.3 interfaces, and meanwhile, the interfaces also support signal multiplexing between U.2 and U.3, such as u.2rx2+/u.3rx3+, u.2rx2-/u.3rx3-, and the like. Also included in the SMP interface group 3 are clock signal interfaces (CLK-and clk+), which are used to transfer clock signals to ensure the synchronization and accuracy of data transfer. An important feature of the U2U3 multiplexing test fixture in this embodiment is that it supports multiplexing of U.2 and U.3 interfaces, which means that by adjusting the connection mode of the physical connector 2 and the SMP interface group 3, the same U2U3 multiplexing test fixture can be used for testing the device of the U.2 interface and also for testing the device of the U.3 interface, and this multiplexing function greatly improves the flexibility and the use efficiency of the test fixture.
Preferably, on the test connection board 1, U.2RX3+ interfaces, U.2RX3-interfaces, U.2TX3-interfaces, U.2TX3+ interfaces, U.2RX2+/U.3RX3+ interfaces, U.2RX2-/U.3RX3-interfaces, U.2TX2+/U.3TX3+ interfaces, U.2RX1+/U.3RX2+ interfaces, U.2RX1-/U.3RX2-interfaces, U.2TX1-/U.3TX2-interfaces, U.2TX1+/U.3TX2+ interfaces, U.3RX1-interfaces, U.3TX1-interfaces, U.3TX1+ interfaces, U.3TX0+ interfaces, U.3TX0-interfaces, U.2RX0+ interfaces, U.2RX0-interfaces, U.2TX0-interfaces, U.2TX1-/U.2TX2+0 interfaces, the interfaces on the sides of the CLK+0 interface, if the U.2RX3+ interface side is marked with U.2RX3+, and the U.2RX3-interface side is marked with U.2RX3-.
Further, the U.2RX3+ interface, the U.2RX3-interface, the U.2TX3-interface, the U.2TX3+ interface, the U.2RX0+ interface, the U.2RX0-interface, the U.2TX0-interface and the U.2TX0+ interface are combined into U.2 applicable interface groups; the U.3RX1+ interface, the U.3RX1-interface, the U.3TX1-interface, the U.3RX0+ interface, the U.3RX0-interface, the U.3TX0-interface and the U.3TX0+ interface are combined to form a U.3 applicable interface group, the U.2RX2+/U.3RX3+ interface, the U.2RX2-/U.3RX3-interface, the U.2TX2-/U.3TX3-interface, the U.2TX2+/U.3TX2+ interface, the U.2RX1-/U.3RX2-interface, the U.2TX1+/U.3TX2+ interface are combined to form a U.3-U.3 common interface group, the CLK-interface group, the U.2 applicable interface group, the U.2-U.3-interface group and the U.3 are arranged on the other end of the test connection board in sequence.
In this embodiment, the SMP interface in the U.2 applicable interface group is specifically used for communication and data transmission with the device of the U.2 interface, the SMP interface in the U.3 applicable interface group is specifically used for communication and data transmission with the device of the U.3 interface, the SMP interface in the U.2-U.3-common interface group can be connected with the device of the U.2 interface and the device of the U.3 interface, and the SMP interface in the test interface group is used for transmitting clock signals to ensure the synchronization and accuracy of data transmission. The other end of the test connection board 1 is sequentially and linearly arranged according to the sequence of U.2 applicable interface groups, U.2-U.3-shared interface groups, U.3 applicable interface groups and test interface groups, and the layout mode not only ensures that the interfaces are clearer and easy to identify, but also is convenient for users to connect and test according to the needs.
Furthermore, the SMP interfaces in the prior art all use a 90-degree vertical interface mode, namely, the direction of a connecting port is vertical to the surface of the clamp, so that when the SMP interfaces are wired in the prior art, the cable can be bent at 90 degrees at the SMP interfaces, and the cable can be bent to drift parameters after long-term use, so that the accuracy and consistency of test data are affected to a certain extent. Based on the above-mentioned drawbacks of the prior art, the U.2RX3+ interface, U.2RX3-interface, U.2TX3-interface, U.2TX3+ interface, U.2RX2+/U.3RX3+ interface, U.2RX2-/U.3RX3-interface, U.2TX2-/U.3TX3-interface, U.2TX2+/U.3TX3+ interface, U.2RX1+/U.3RX2+ interface, U.2RX1-/U.3RX2-interface, U.2TX1-/U.3TX2-interface, U.2TX1+/U.3TX2+ interface, and the like in the embodiment the interfaces of the U.3RX1+ interface, the U.3RX1-interface, the U.3TX1-interface, the U.3TX1+ interface, the U.3RX0+ interface, the U.3RX0-interface, the U.2RX0+ interface, the U.2RX0-interface, the U.3TX0-interface, the U.3TX0+ interface, the U.2TX0+ interface, the CLK-interface and the CLK+ interface face the physical connector 2, therefore, when the physical connector 2 and the SMP interface group 3 are connected by cables, the cables can be kept flat and go out, are not influenced by bending for a long time, and ensure the accuracy and consistency of test data.
Furthermore, it should be explained that the proposed U2U3 multiplexing test fixture according to the present disclosure connects the physical connector 2 with the SMP interface group 3 according to actual test requirements, and realizes a docking test for the U.2 interface or the U.3 interface by different connection modes between the physical connector 2 and the SMP interface group 3, for example, when testing the U.2 interface, the U.2 applicable interface group, the U.2-U.3 common interface group, and the test interface group are connected with the physical connector 2 through cables; when the U.3 interface is tested, the U.3 applicable interface group, the U.2-U.3-shared interface group and the test interface group are connected with the physical connector 2 through cables, it is understood that whether the U.2 interface or the U.3 interface is tested, the U.2-U.3-shared interface group and the test interface group are connected with the physical connector 2 through cables, and in order to reduce the workload of a tester, in this embodiment, the U.2RX2+/U.3RX3+ interface, the U.2RX2-/U.3RX3-interface, the U.2TX2-/U.3TX3+ interface, the U.2RX1+/U.3RX2+ interface, the U.2RX1-/U.3RX2-interface, the U.2TX1-/U.3TX2-interface, the CLK-interface and the CLK+ interface are connected with the physical connector through cables, namely, the U.2TX1-/U.2TX1+/U.3TX2+ interface and the CLK-interface are connected with the physical connector 74 through cables, and the shared interface groups are connected with the physical connector 2 through cables.
Further, the test connection board 1 includes a rectangular portion 11 and a sector portion 12, the physical connector 2 is disposed on one side of the rectangular portion 11, the sector portion 12 is formed by extending the other side of the rectangular portion 11, and the SMP interface group 3 is disposed along the circumference of the sector portion 12. In this embodiment, the design of the sector 12 enables more SMP interfaces to be arranged in a limited space, thereby improving space utilization, and the SMP interface groups 3 are circumferentially arranged, so that each SMP interface has a relatively independent position, which is not easy to be confused, and is convenient for a user to connect and test.
Specifically, the center of the fan-shaped part 12 is the midpoint of the other side of the rectangular part 11. In particular, the SMP interface groups 3 are evenly arranged along the circumference of the sectors 12. Specifically, the test connection board 1 has an axisymmetric structure.
In this embodiment, the center of the fan-shaped part 12 is arranged at the midpoint of the side edge of the rectangular part 11, so that the symmetry of the test connection board 1 in appearance and layout is ensured, and the SMP interface groups 3 are uniformly distributed along the circumference, so that the number of SMP interfaces is ensured, and each SMP interface has enough space to connect and operate. More importantly, the cable lengths when the physical connectors 2 are connected with the SMP interfaces in the SMP interface group 3 are the same or have smaller difference, and the difference of signal transmission delay caused by the difference of the cable lengths is minimized, so that the accuracy of the test result is ensured.
Furthermore, the U2U3 multiplexing test fixture further comprises a plurality of detachable cables, one ends of the detachable cables are connected to the physical connector 2, and the other ends of the detachable cables are detachably connected to the U.2RX3+ interface, the U.2RX3-interface, the U.2TX3-interface, the U.2TX3+ interface, the U.2RX0+ interface, the U.2RX0-interface, the U.2TX0+ interface or the U.3RX1+ interface, the U.3RX1-interface, the U.3TX1-interface, the U.3TX1+ interface, the U.3RX0+ interface, the U.3RX0-interface, the U.3TX0-interface and the U.3TX0+ interface. When the U2U3 multiplexing test fixture of this embodiment tests U.2 interfaces, one end of the detachable cable is connected to the physical connector 2, and the other end is detachably connected to the u.2rx3+ interface, the u.2rx3-interface, the u.2tx3-interface, the u.2tx3+ interface, the u.2rx0+ interface, the u.2rx0-interface, the u.2tx0-interface, and the u.2tx0+ interface. When the U2U3 multiplexing test fixture of this embodiment tests U.3 interfaces, one end of the detachable cable is connected to the physical connector 2, and the other end is detachably connected to the u.3rx1+ interface, the u.3rx1-interface, the u.3tx1-interface, the u.3tx1+ interface, the u.3rx0+ interface, the u.3rx0-interface, the u.3tx0-interface, and the u.3tx0+ interface.
Further, the CLK-interface and the CLK+ interface are connected to the oscilloscope through cables. It will be appreciated that an oscilloscope is an electronic measurement instrument for observing and measuring the waveform of an electrical signal, and in a test system, the oscilloscope can display the waveforms of clock signals transmitted by the CLK-interface and the clk+ interface in real time, thereby helping engineers analyze the stability and accuracy of the clock signals. Optionally, the oscilloscope is connected to the CLK-interface, the CLK+ interface, and also can be connected to the TX interfaces, such as the U.2TX3-interface, the U.2TX3+ interface, the U.2TX2-/U.3TX3-interface, the U.2TX2+/U.3TX3+ interface, the U.2TX1-/U.3TX2-interface, the U.2TX1+/U.3TX2+ interface, the U.3TX1-interface, the U.3TX1+ interface, the U.3TX0-interface, and the U.2TX0+ interface, through cables, so as to realize signal integrity analysis and confirm whether the TX consistency requirements of PCI-SIG specifications are met.
Compared with the prior art, the U2U3 multiplexing test fixture is in butt joint with U.2 or U.3 interfaces through the physical connector, is connected with a test instrument or equipment through the SMP interface group, is designed according to the standards of U.2 and U.3 interfaces, can meet the signal transmission requirements of the two interfaces at the same time, and improves the test efficiency and the test accuracy.
While the utility model has been described with reference to certain preferred embodiments, it will be understood by those skilled in the art that various changes and substitutions of equivalents may be made and equivalents will be apparent to those skilled in the art without departing from the scope of the utility model. Therefore, the protection scope of the utility model is subject to the protection scope of the claims.