CN211197211U - Improved chip packaging tape - Google Patents
Improved chip packaging tape Download PDFInfo
- Publication number
- CN211197211U CN211197211U CN201922186004.4U CN201922186004U CN211197211U CN 211197211 U CN211197211 U CN 211197211U CN 201922186004 U CN201922186004 U CN 201922186004U CN 211197211 U CN211197211 U CN 211197211U
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- tape
- chip packaging
- cover tape
- chip
- side edge
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Abstract
The utility model discloses an improved generation chip packaging area, including the carrier band with install in cover area on the carrier band, set up a plurality of recesses that are used for placing the chip on the carrier band, the recess include first side, with the relative second side of first side, third side and with the relative fourth side of third side, first side reaches be provided with the bellying on the second side, the bellying is suitable for preventing the chip to follow the recess left and right sides breaks away from, cover area corresponds the third side with the fourth side is formed with indentation portion, indentation portion will cover area with the carrier band is connected, and is suitable for preventing the chip to follow both sides break away from about the recess, and this improved generation chip packaging area can effectively avoid the chip to take place to shift out the phenomenon of recess because the shake takes place to take place.
Description
Technical Field
The utility model relates to a semiconductor package technical field especially relates to an improved generation chip packaging area.
Background
In the production process of semiconductor components, in order to prevent the damage of chip electronic components such as resistors, capacitors, diodes and the like and facilitate the storage, transportation, absorption and mounting of the electronic components, the chip electronic components are usually first packaged by carrying belts. Currently, most carrier tapes for packaging electronic components are longitudinal flexible tapes, and are generally designed in a customized manner according to the characteristics of a packaged product. As shown in fig. 5 and 6, after placing electronic components into the carrier tape, the cover tape 10 is sealed over the grooves 101 of the carrier tape to form a closed package for protecting the electronic components from contamination and damage during transportation. When the electronic components are mounted, the cover tape is peeled off, and the automatic mounting equipment sequentially takes out the components contained in the grooves through the accurate positioning of the carrier tape index holes and mounts the components on the integrated circuit board in a mounting mode.
General carrier tape design and cover tape sealing mode can not satisfy the electronic component of all thicknesses, when the electronic component of carrying is the ultra-thin chip of rectangle, its thickness is below 100um, ultra-thin chip can produce the shake in the carrying process, as shown in fig. 7, when carrier tape and cover tape have the gap a little, ultra-thin chip 30 will take place to shift out recess 101 because of the shake, imbed the gap between carrier tape and the cover tape, greatly reduced the quality of carrier tape packing, lead to the unable normal absorption and subsides of post, seriously influence the efficiency and the yields of subsides dress.
SUMMERY OF THE UTILITY MODEL
In order to overcome the defects of the prior art, the utility model aims to provide an improved chip packaging belt which can effectively avoid the phenomenon that the chip shifts and deviates from the groove due to shaking.
The purpose of the utility model is realized by adopting the following technical scheme:
the utility model provides an improved generation chip packaging area, including the carrier band with install in cover tape on the carrier band, set up a plurality of recesses that are used for placing the chip on the carrier band, the recess include first side, with first side relative second side, third side and with third side relative fourth side, first side reaches be provided with the bellying on the second side, the bellying is suitable for preventing the chip to follow the recess left and right sides breaks away from, the cover tape corresponds the third side with the fourth side is formed with indentation portion, indentation portion will cover tape with the carrier band is connected, and is suitable for preventing the chip to follow both sides break away from about the recess.
Further, adjacent set up the boss between the recess, the boss both sides respectively with first side reaches the second side is connected, and forms the bellying.
Further, the cover tape is a heat seal tape.
Furthermore, two parallel adhesive tapes are arranged on the surface of the cover tape along the length direction of the cover tape, and the two adhesive tapes are suitable for adhering the cover tape to the carrier tape and forming the indentation.
Further, the distance between the indentation and the third side edge or the fourth side edge is 0-0.6 mm.
Furthermore, an avoiding groove is formed in the corner of the groove.
Further, the height of the convex part is 0.1-0.2 mm.
Furthermore, the bottom of the groove is provided with a vacuum hole.
Further, the distance between adjacent grooves is 4 or 8 mm.
Compared with the prior art, the beneficial effects of the utility model reside in that:
this application sets up bellying through the first side at the recess with the second side, and the indentation portion that corresponds third side and fourth side formation is taken to the lid in the cooperation to effectively prevent to carry in-process chip and take place to shift and deviate from the recess owing to the shake, with the normal absorption and subsides dress work of carrying out in convenient later stage, the chip is behind the recess that deviates from simultaneously, and damage easily appears in its bight or other parts, thereby influences the yields.
Drawings
Fig. 1 is a schematic structural view of an embodiment 1 of an improved chip packaging tape of the present invention;
FIG. 2 is a cross-sectional view of the grooves of an embodiment 1 of an improved chip packaging tape of the present invention;
fig. 3 is a schematic structural view of an improved chip packaging tape of embodiment 2 of the present invention;
FIG. 4 is a cross-sectional view of the grooves of example 2 of an improved chip packaging tape of the present invention;
FIG. 5 is a schematic view of a prior art packaging tape of embodiment 1 of the present invention;
FIG. 6 is a schematic view of a prior art packaging tape embodiment 2 of the present invention;
FIG. 7 is a state view of a conventional packing band of the present invention in use in accordance with example 2;
FIG. 8 is a state view of an improved chip packaging tape of the present invention in use according to example 2;
fig. 9 is a schematic view of an improved cover tape for a chip packaging tape according to the present invention;
fig. 10 is a schematic view of another embodiment of an improved cover tape for a chip packaging tape according to the present invention. The figure is as follows: 10. carrying a belt; 101. a groove; 1011. a first side edge; 1012. a second side edge; 1013. a third side; 1014. a fourth side; 1015. an avoidance groove; 1016. a vacuum hole; 102. a boss portion; 103. a boss; 20. a cover tape; 201. an indentation section; 30. and (3) a chip.
Detailed Description
The present invention will be further described with reference to the accompanying drawings and the detailed description, and it should be noted that the embodiments or technical features described below can be arbitrarily combined to form a new embodiment without conflict.
Example 1
As shown in fig. 1, 2, 9 and 10, an improved chip packaging tape includes a carrier tape 10 and a cover tape 20 mounted on the carrier tape 10, the carrier tape 10 is provided with a plurality of recesses 101 for placing chips 30, each recess 101 includes a first side 1011, a second side 1012 and a third side 1013 opposite to the first side, and a fourth side 1014 opposite to the third side 1013, the first side 1011 and the second side 1012 are provided with protrusions 102, the protrusions 102 are adapted to prevent the chips 30 from separating from the left and right sides of the recess 101, after the cover tape 20 is sealed, indentations 201 are formed corresponding to the third side 1013 and the fourth side 1014 to enable the cover tape to adhere to the carrier tape and prevent the chips 30 from separating from the upper and lower sides of the recess 101.
In the present application, the first side 1011 and the second side 1012 of the groove 101 are provided with the protrusions 102, and the cover tape 20 is matched with the indentations 201 formed by the third side 1013 and the fourth side 1014, so as to effectively prevent the chip 30 from shifting and deviating from the groove 101 due to shaking during the carrying process, thereby facilitating the normal sucking and mounting work at the later stage.
The height of the protruding portion 102 is 0.1-0.2mm in this application, so as to prevent the protruding portion 102 from lifting up the cover tape 20, so that a gap exists between the indentation 201 and the carrier tape 10, and the chip 30 is separated from the groove 101 from the gap between the indentation 201 and the carrier tape 10 in the carrying process.
More specifically, the distance between indentation 201 and third side 1013 or fourth side 1014 is 0-0.6mm, so as to avoid that indentation 201 is too far away from the edge of groove 101 to prevent chip 30 from escaping from groove 101.
In this embodiment, the cover tape 20 may be a heat-sealing tape, when in use, the cover tape 20 and the carrier tape 10 are placed in a heat-sealing machine, the heat-sealing tape of the heat-sealing machine presses the cover tape 20 on the carrier tape 10 for heat-sealing, a contact portion between the cover tape 20 and the heat-sealing tape forms an indentation 201 attached to the carrier tape 10, and the temperature during heat-sealing is 160-.
Of course, a cold seal tape may be used, and two adhesive tapes parallel to each other are disposed on the surface of the cover tape 20 along the length direction of the cover tape 20, and are adapted to adhere the cover tape 20 to the carrier tape 10 and form the indentations 201.
Example 2
As shown in fig. 3, 4, 8, 9 and 10, a boss 103 is disposed between adjacent grooves 101, and both sides of the boss 103 are respectively connected to a first side 1011 and a second side 1012 to form a protrusion.
In addition, in order to prevent the corner of the chip 30 from colliding with the corner of the groove 101 and being damaged when the chip 30 is placed into the groove 101 or taken out of the groove 101, the corner of the groove 101 is provided with an avoiding groove 1015 to avoid colliding with the corner of the chip 30, and reduce the probability of damage to the chip 30.
Specifically, the bottom of the groove 101 is provided with a vacuum hole 1016, so that when the cover tape is heat-sealed, air in the groove 101 is pumped away, the air is pumped out and dissipated, and the cover tape is prevented from swelling.
Specifically, the cover tape 20 is a heat sealing tape, when in use, the cover tape 20 and the carrier tape 10 are placed in a heat sealing machine, the heat sealing tape of the heat sealing machine presses the cover tape 20 on the carrier tape 10 for heat sealing, the contact part of the cover tape 20 and the heat sealing tape forms an indentation 201 attached to the carrier tape 10, and the temperature during heat sealing is 160-.
In addition, in the embodiment, the cover tape 20 may also be a cold seal tape, and two adhesive tapes parallel to each other are disposed on the surface of the cover tape 20 along the length direction of the cover tape 20, and are adapted to adhere the cover tape 20 to the carrier tape 10 and form the indentation 201.
In particular, the distance between adjacent grooves 101 is 4 or 8mm to suit different use needs. The carrier tape 10 is made of polycarbonate in this application.
The above embodiments are only preferred embodiments of the present invention, and the protection scope of the present invention cannot be limited thereby, and any insubstantial changes and substitutions made by those skilled in the art based on the present invention are all within the protection scope of the present invention.
Claims (9)
1. The utility model provides an improved generation chip packaging area, including the carrier band with install in cover tape on the carrier band, set up a plurality of recesses that are used for placing the chip on the carrier band, the recess include first side, with the second side that first side is relative, third side and with the fourth side that third side is relative, its characterized in that: the first side edge and the second side edge are provided with protruding parts, the protruding parts are suitable for preventing chips from being separated from the left side and the right side of the groove, the cover tape corresponds to the third side edge and the fourth side edge, and indentation parts are formed on the cover tape and the carrier tape and are suitable for preventing the chips from being separated from the upper side and the lower side of the groove.
2. An improved chip packaging tape as claimed in claim 1, wherein: and a boss is arranged between the adjacent grooves, and two sides of the boss are respectively connected with the first side edge and the second side edge to form the protruding part.
3. An improved chip packaging tape as claimed in claim 1, wherein: the cover tape is a heat seal tape.
4. An improved chip packaging tape as claimed in claim 1, wherein: the surface of the cover tape is provided with two parallel bonding tapes along the length direction of the cover tape, and the two bonding tapes are suitable for bonding the cover tape on the carrier tape and forming the indentation part.
5. An improved chip packaging tape as claimed in claim 1, wherein: the distance between the indentation part and the third side edge or the fourth side edge is 0-0.6 mm.
6. An improved chip packaging tape as claimed in claim 1, wherein: and avoidance grooves are formed in the corners of the grooves.
7. An improved chip packaging tape as claimed in claim 1, wherein: the height of the convex part is 0.1-0.2 mm.
8. An improved chip packaging tape as claimed in claim 1, wherein: the bottom of the groove is provided with a vacuum hole.
9. An improved chip packaging tape as claimed in claim 1, wherein: the distance between adjacent grooves is 4 or 8 mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922186004.4U CN211197211U (en) | 2019-12-09 | 2019-12-09 | Improved chip packaging tape |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922186004.4U CN211197211U (en) | 2019-12-09 | 2019-12-09 | Improved chip packaging tape |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN211197211U true CN211197211U (en) | 2020-08-07 |
Family
ID=71863116
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922186004.4U Active CN211197211U (en) | 2019-12-09 | 2019-12-09 | Improved chip packaging tape |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN211197211U (en) |
-
2019
- 2019-12-09 CN CN201922186004.4U patent/CN211197211U/en active Active
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