CN210006926U - Patch antenna - Google Patents

Abstract

The utility model relates to a patch antenna, which is characterized in that the patch antenna comprises a multilayer printed circuit board, wherein a calibration network and a patch for the patch antenna are integrated on the multilayer printed circuit board. A radiator array and a feed network for the patch radiator array. The integrated patch antenna array according to the various embodiments of the present invention is advantageous: the patch antenna integrates the patch radiator array, the feeding network and the calibration network on a single multilayer printed circuit board, which is beneficial for their The electrical connection between them is relatively simple to realize, thus realizing the integrated and miniaturized design concept of the patch antenna.

Description

Patch Antenna

technical field

The utility model relates to the field of radio communication, and more particularly, the utility model relates to a patch antenna, in particular to an integrated patch antenna.

Background technique

Compared with metal waveguides, microstrip transmission lines have the advantages of small size, light weight, wide frequency band, high reliability and low manufacturing cost. With the development of microwave low-loss dielectric materials, microstrip antennas based on microstrip transmission lines have been widely used.

At present, patch antennas usually include dielectric substrates, patch radiator arrays, feed networks and other microstrip integrated circuits. Currently, with the rapid development of large-scale multiple-input multiple-output technology, more microstrip integrated circuits need to be integrated in a limited space. Therefore, how to realize the high integration and miniaturization requirements of the overall antenna structure is a technical problem to be solved urgently by those skilled in the art in recent years.

Utility model content

Therefore, the purpose of the present invention is to provide a patch antenna capable of overcoming at least one defect in the prior art.

According to a first aspect of the present invention, a patch antenna is provided, the patch antenna includes a multi-layer printed circuit board, wherein a calibration network for the patch antenna, A patch radiator array and a feed network for the patch radiator array.

The integrated patch antenna array according to the various embodiments of the present invention is advantageous: the patch antenna integrates the patch radiator array, the feeding network and the calibration network on a single multilayer printed circuit board, which is beneficial for their The electrical connection between them is relatively simple to realize, thus realizing the integrated and miniaturized design concept of the patch antenna.

In some embodiments, the multilayer printed circuit board includes a plurality of dielectric substrates, wherein the patch radiator array and the calibration network are provided on different dielectric substrates, and the patch radiator array is provided with The dielectric substrate is above the dielectric substrate provided with the calibration network.

In some embodiments, the multilayer printed circuit board includes a first dielectric substrate and a second dielectric substrate underlying the first dielectric substrate, the first and second dielectric substrates having upper major surfaces and opposing the upper major surfaces, respectively The lower main surface of the first dielectric substrate, wherein a first metal pattern is provided on the upper main surface of the first dielectric substrate, the first metal pattern includes an array of patch radiators, and a first metal pattern is provided on the lower main surface of the second dielectric substrate. Two metal patterns, the second metal patterns include the calibration network.

In some embodiments, the first metal pattern further includes a first feed network for the array of patch radiators.

In some embodiments, the second metal pattern further includes a second feed network for the array of patch radiators.

In some embodiments, the second metal pattern further includes a coupler configured to electrically couple the calibration network with the second feed network.

In some embodiments, a first ground metal layer is provided between the first dielectric substrate and the second dielectric substrate.

In some embodiments, the second feed network is electrically connected to the first feed network via conductive elements passing through the second dielectric substrate, the first ground metal layer, and the first dielectric substrate.

In some embodiments, the multilayer printed circuit board further includes: a third dielectric substrate having an upper major surface and a lower major surface opposite the upper major surface, and the third dielectric substrate Below the second dielectric substrate, wherein a second ground metal layer is provided on the lower main surface of the third dielectric substrate.

In some embodiments, the patch antenna further includes a fourth dielectric substrate above the multilayer printed circuit board, and a parasitic patch radiator array is disposed on the fourth dielectric substrate.

In some embodiments, the fourth dielectric substrate is mechanically connected to the multilayer printed circuit board via connecting means.

In some embodiments, the calibration network includes a calibration port from which a calibration signal can be electrically coupled to the second feed network via corresponding signal transmission lines, power dividers and couplers.

In some embodiments, the first metal pattern further includes debug lines that are electrically connected to one end of a corresponding transmission line in the calibration network via respective conductive elements on both ends, respectively.

In some embodiments, the multilayer printed circuit board includes from top to bottom: a first dielectric substrate, a second dielectric substrate, a third dielectric substrate and a fourth dielectric substrate, each of which has an upper main surface and a The lower major surface opposite the upper major surface.

In some embodiments, an array of patch radiators is provided on the upper main surface of the first dielectric substrate, wherein a first ground metal layer is provided between the first dielectric substrate and the second dielectric substrate, wherein on the first dielectric substrate A first metal pattern is provided between the second dielectric substrate and the third dielectric substrate, and the first metal pattern includes a first feeding network for the corresponding patch radiator array, wherein the third dielectric substrate and the fourth A second metal pattern is disposed between the dielectric substrates, and the second metal pattern includes an alignment network.

In some embodiments, the second metal pattern further includes a second feed network for the array of patch radiators.

In some embodiments, the second metal pattern further includes a coupler configured to electrically couple the calibration network with the second feed network.

In some embodiments, the second feed network is electrically connected to the first feed network through the third dielectric substrate via corresponding conductive elements.

In some embodiments, a second ground metal layer is provided on the lower main surface of the fourth dielectric substrate.

In some embodiments, the multi-layer printed circuit board includes from top to bottom: a first dielectric substrate, a second dielectric substrate, a third dielectric substrate, a fourth dielectric substrate and a fifth dielectric substrate, each of which has An upper major surface and a lower major surface opposite the upper major surface.

In some embodiments, an array of patch radiators is provided on the upper main surface of the first dielectric substrate, wherein a first ground metal layer is provided between the first dielectric substrate and the second dielectric substrate, wherein on the first dielectric substrate A first metal pattern is provided between the second dielectric substrate and the third dielectric substrate, and the first metal pattern includes a first feeding network for the corresponding patch radiator array, wherein the third dielectric substrate and the fourth A second ground metal layer is provided between the dielectric substrates, wherein a second metal pattern is provided between the fourth dielectric substrate and the fifth dielectric substrate, and the second metal pattern includes a calibration network.

In some embodiments, the second metal pattern further includes a second feed network for the array of patch radiators.

In some embodiments, the second metal pattern further includes a coupler configured to electrically couple the calibration network with the second feed network.

In some embodiments, the second feed network is electrically connected to the first feed network via conductive elements passing through the fourth dielectric substrate, the second ground metal layer, and the third dielectric substrate.

In some embodiments, a third ground metal layer is provided on the lower main surface of the fifth dielectric substrate.

According to a second aspect of the present invention, a patch antenna is provided, wherein the patch antenna includes a multilayer printed circuit board, and the multilayer printed circuit board includes at least a first dielectric substrate and a second dielectric substrate , wherein the patch radiator array is arranged on the first dielectric substrate, and the calibration network for the patch antenna is arranged on the second dielectric substrate, wherein the first dielectric substrate is above the second dielectric substrate, and the multilayer The printed circuit board also includes a first feed network for the array of patch radiators.

In some embodiments, a second feed network is further provided on the second dielectric substrate, and the second feed network is electrically connected to the calibration network via a coupler.

In some embodiments, the calibration network and the second feed network comprise strip transmission lines.

In some embodiments, the calibration network and the second feed network comprise microstrip transmission lines.

In some embodiments, the first feed network includes a strip transmission line.

In some embodiments, the first feed network includes a microstrip transmission line.

Description of drawings

In the picture:

1 shows a schematic side view of a patch antenna according to a first embodiment of the present invention;

Figure 2 shows a schematic side view of the multilayer printed circuit board of the first embodiment of the patch antenna of Figure 1;

Figures 3a, 3b show schematic circuit diagrams of conductive patterns on the upper main surface of the first dielectric substrate of the multilayer printed circuit board in Figure 2;

FIG. 4 shows a schematic circuit diagram of the calibration network of the patch antenna of FIG. 1 together with the second feed network;

5 shows a schematic side view of a multilayer printed circuit board of a patch antenna according to a second embodiment of the present invention.

Detailed ways

Specific embodiments of the present invention will be described below with reference to the accompanying drawings, which illustrate several embodiments of the present invention. It should be understood, however, that the present invention may be presented in many different ways and is not limited to the embodiments described below; in fact, the embodiments described below are intended to make the disclosure of the present invention more complete, and The protection scope of the present invention is fully explained to those skilled in the art. It should also be understood that the embodiments disclosed herein can be combined in various ways to provide still further embodiments.

It should be understood that the terms in the specification are only used to describe specific embodiments, and are not intended to limit the present invention. All terms (including technical and scientific terms) used in the specification have the meanings commonly understood by those skilled in the art unless otherwise defined. Well-known functions or constructions may not be described in detail for brevity and/or clarity.

As used in this specification, the singular forms "a", "the" and "the" include the plural forms unless clearly indicated otherwise. The terms "comprising", "including" and "containing" are used in the specification to indicate the presence of a claimed feature, but not to exclude the presence of one or more other features. As used in this specification, the term "and/or" includes any and all combinations of one or more of the associated listed items.

In the specification, spatially relative terms such as "up," "down," "left," "right," "front," "rear," "high," "low," etc. may describe one feature versus another relationship in the attached drawing. It should be understood that spatially relative terms encompass different orientations of the device in use or operation in addition to the orientation shown in the figures. For example, when the device in the figures is turned over, features previously described as "below" other features may now be described as "above" the other features. The device may also be otherwise oriented (rotated 90° or at other orientations), in which case the relative spatial relationships will be interpreted accordingly.

It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

It will be understood that when an element is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present. It will also be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present. Other words used to describe the relationship between elements should be interpreted in a like fashion (ie, "between" versus "directly between", "adjacent" versus "directly adjacent" Wait).

It should be understood that the same reference numerals refer to the same elements throughout the drawings. In the drawings, the dimensions of certain features may be varied for clarity.

In Massive Multiple Input Multiple Output (Massive MIMO) antennas and/or beamforming antennas, additional circuitry is often required for this purpose due to uncontrollable errors in the design, manufacture or use of the radio frequency control system (eg RRU) or the antenna network. Compensate for phase and/or amplitude differences imparted by the antenna to RF signals input at different RF ports. This process is often referred to as "calibration".

Usually, the patch radiator and its feed network can be integrated on a first printed circuit board, and the calibration device is constructed as a separate second printed circuit board, the calibration device can for example include: A microstrip calibration circuit on the upper major surface of the substrate and a ground metal layer on the lower major surface of the dielectric substrate. In other cases, the calibration circuit may be implemented in a printed circuit board comprising two dielectric substrates, wherein a ground metal layer may be provided on the upper surface of the upper dielectric substrate and the lower surface of the lower dielectric substrate, and the calibration circuit may be provided on the two in the metal layer between the dielectric substrates. In either of the above two cases, additional connecting means, eg bolted connections, are required to securely connect the second printed circuit board comprising the calibration means and the first printed circuit board comprising the patch radiators to the radiators.

To calibrate the antenna, it is necessary to connect the microstrip calibration circuit on the calibration device to the feed network of the patch radiators by means of corresponding conductive elements. As a result, the design of the antenna system becomes complicated and occupies a large space. Therefore, there is a need to improve the high integration and miniaturization of the entire antenna system.

Next, the specific structure of the patch antenna according to the present invention will be explained in detail with reference to the accompanying drawings.

FIG. 1 shows a schematic side view of a patch antenna according to a first embodiment of the present invention. As shown in FIG. 1 , the patch antenna 1 includes a multilayer printed circuit board 2 . In the embodiment of FIG. 1 , the multi-layer printed circuit board 2 may have four metal layers separated by three-layer dielectric substrates, and the three-layer dielectric substrates are respectively a first dielectric substrate 201 and a second dielectric substrate from top to bottom. The substrate 202 and the third dielectric substrate 203 . In addition, the patch antenna 1 may further include a fourth dielectric substrate 204 provided separately from the multi-layer printed circuit board 2, on which a parasitic metal patch radiator array may be provided, and these parasitic metal patches radiate The radiator is configured to be electrically floating, and its function is to expand the working bandwidth of each patch radiator of the patch antenna 1 . In addition, the patch antenna 1 also includes a connecting device 4 , which includes a bolt 401 , a nut 402 , a sleeve 403 and a washer 404 . The connecting device 4 is configured to secure the multilayer printed circuit board 2 and the fourth dielectric substrate 204 together.

Next, the multilayer printed circuit board 2 of the patch antenna according to the first exemplary embodiment of the present invention will be explained in detail with reference to FIGS. 2 , 3 a , 3 b and 4 .

FIG. 2 shows a schematic side view of the multilayer printed circuit board 2 of the first embodiment of the patch antenna 1 according to the present invention. As shown in FIG. 2 , the multilayer printed circuit board 2 is, from top to bottom, a first dielectric substrate 201 , a second dielectric substrate 202 and an (optional) third dielectric substrate 203 respectively. Each of the dielectric substrates 201, 202, and 203 has an upper main surface and a lower main surface opposite to the upper main surface, respectively.

A patch radiator array (not shown in FIG. 2 ) and a first feeding network for the patch radiator array (not shown in FIG. 2 ) may be provided on the upper main surface of the first dielectric substrate 201 shown in detail). The first ground metal layer 5 is provided between the first dielectric substrate 201 (the lower main surface thereof) and the second dielectric substrate 202 (the upper main surface thereof).

A corresponding calibration network (not specifically shown in FIG. 2 ) may be provided on the lower major surface of the second dielectric substrate 202 . In addition, a second feed network (not specifically shown in FIG. 2 ) for the corresponding patch radiator array may also be provided on the lower main surface of the second dielectric substrate 202 . As can be seen in FIG. 2, the conductive pattern 11 on the second dielectric substrate 202 (which includes the alignment network and the second feed network) can be connected to the The first feeding network on the first dielectric substrate 201 is electrically connected.

In the embodiment of FIG. 2 , a third dielectric substrate 203 is provided, and the third dielectric substrate is below the second dielectric substrate 202 . A second ground metal layer 5 ′ is provided on the lower main surface of the third dielectric substrate 203 . Thereby, the calibration network and the second feed network on the lower main surface of the second dielectric substrate 202 are surrounded on both sides by the first and second ground metal layers 5, 5', respectively, so that the calibration network and the second feed network are respectively surrounded on both sides by the first and second ground metal layers 5, 5' The electrical network is constructed as a strip transmission line network. Stripline transmission lines can be advantageous because they can have reduced radiated signal loss and can shield radio frequency transmission lines from external radiation.

In other embodiments, the calibration network and the second feed network on the lower main surface of the second dielectric substrate 202 can also be formed as a microstrip transmission line network, for which an additional third dielectric substrate 203 is not required, that is, , the multilayer printed circuit board 2 in the patch antenna 1 according to the first embodiment of the present invention may only include the first dielectric substrate 201 and the second dielectric substrate 202 . Here, the third dielectric substrate 203 may be omitted.

Next, specific embodiments of the multilayer printed circuit board 2 of FIGS. 1 and 2 are described in detail with reference to FIGS. 3 a , 3 b and 4 .

Figures 3a, 3b show schematic circuit diagrams of the conductive patterns on the upper main surface of the first dielectric substrate 201 of the multilayer printed circuit board 2 in Figures 1 and 2 .

As shown in FIGS. 3 a and 3 b , a plurality of patch radiation elements 6 are constructed on the first dielectric substrate 201 . Each patch radiating element is constituted by a metal patch radiator 7 constructed on the upper main surface of the first dielectric substrate 201 and a metal portion corresponding to the patch radiator 7 on the first ground metal layer 5, respectively. The patch radiator 7 is constituted as a part of the conductive pattern 8 on the upper main surface of the first dielectric substrate 201 . And another part of the conductive pattern 8 may be configured as a first feeding network 9 for receiving and transmitting radio frequency signals from and to the corresponding patch radiators 7 .

As shown in Figure 3b, each patch radiator 7 may comprise a thin layer of metal (eg, copper), which may have any suitable shape, including rectangular, square or circular, among others. In the embodiment of Figures 3a and 3b, each patch radiator 7 is constructed as a square radiator whose length and width may correspond to approximately half the wavelength corresponding to the center frequency of the operating band for which the patch radiator 7 is intended.

As shown in Figs. 3a and 3b, every two adjacent patch radiators 7 in the vertical direction can be formed as a pair of patch radiators fed together in common. The patch radiator 7 can be fed by cross feeding, eg, positive and negative 45° feeding. Specifically, in the conductive pattern 8 on the upper main surface of the first dielectric substrate 201 , the radio frequency signal from the upstream feeding network reaches the connection terminal 10 in the first feeding network 9 from the upstream, and then starts from the connection terminal 10 It is transmitted to the negative 45° feed end of one patch radiator 7 of the pair of patch radiators 7 via the feed line and/or transmission line of the first length. At the same time, it is transmitted from the same connection terminal 10 to the negative 45° feed end of the other patch radiator 7 of the pair of patch radiators 7 via the feed line and/or transmission line of the second length, wherein, The difference between the first length and the second length may be about half of the wavelength corresponding to the center frequency, thereby improving the isolation between adjacent patch radiators 7 . The feeding mode of the patch radiator 7 on the positive 45° feed end is the same as the feeding mode on the negative 45° feed end, which will not be repeated here.

The thickness and/or dielectric constant of the material of the first dielectric substrate 201 may be selected based on the desired width of the first feed network 9 and the desired bandwidth of the patch radiator 7 . The first dielectric substrate 201 may include other functional elements in addition to the patch radiator 7 and the first feeding network 9 formed therein and/or mounted thereon, for example, a filter network or an active element (not shown) may be mounted. out).

The first ground metal layer 5 may include a continuous or discontinuous metal layer (eg, a copper layer) formed on the lower main surface of the first dielectric substrate 201 . In some embodiments, the first ground metal layer 5 may include one or more openings that may extend through the first ground metal layer 5 and the first dielectric substrate 201 as metallization holes PTH to couple to the first dielectric substrate 201 on the conductive pattern 8 on the upper main surface. The metallization holes PTH on the first ground metal layer 5 may also extend through the second dielectric substrate 202 to be coupled to the conductive patterns 11 on the lower main surface of the second dielectric substrate 202 , such as the calibration network 12 described in detail below and/or the second feed network 13 .

4 shows a schematic diagram of the calibration network 12 together with the second feeding network 13 on the lower main surface of the second dielectric substrate 202 of the multilayer printed circuit board 2 of the patch antenna according to the first embodiment of the present invention circuit diagram.

As shown in FIG. 4 , the calibration network 12 is generally indicated by a dashed box, and the calibration network 12 includes a calibration port 121 , a transmission line 122 and a power divider 123 . A remote radio unit (RRURemote Radio Unit) inputs a corresponding calibration signal to the calibration port 121 via a cable. The calibration signal is then demultiplexed from the calibration port 121 via the corresponding transmission line 122, the power divider 123 and the coupler 14 to the respective feed branches in the second feed network 13, for example via conductive elements ( Such as PTH) are electrically coupled to the first feeding network 9, respectively. In the embodiment of FIG. 4 , a coupler 14 is arranged between the calibration network 12 and the second feed network 13 , by means of which coupler 14 the calibration network 12 and the second feed network 13 are electrically coupled, that is to say, The calibration signal is electrically coupled to the second feed network 13 via the coupler 14 . As shown in FIG. 4 , the second feeding network 13 may further include a radio frequency port 131 and a transmission line 132 . The remote radio frequency unit can read the magnitude and/or phase of the radio frequency signal electrically coupled from the calibration signal to the radio frequency port 131 via the coupler 14 . Therefore, the calibration of the radio frequency control system can be realized through the S parameters of the radio frequency port 131 and the calibration port 121. In other words, the amplitude and/or phase of the radio frequency signal on the radio frequency port 131 and the calibration port 121 can be realized. calibration.

In addition, the remote radio frequency unit can input the radio frequency signal to the corresponding radio frequency port 131 . Then, the radio frequency signal is coupled from the radio frequency port 131 to the corresponding first feed via the corresponding transmission line 132 and the metallization hole PTH extending through the second dielectric substrate 202 , the first ground metal layer 5 and the first dielectric substrate 201 The connection terminal 10 of the network 13 thereby transmits the radio frequency signal to the corresponding patch radiator.

The calibration process can include the following steps:

First, the remote radio frequency unit transmits the calibration signal to each radio frequency port 131 via the calibration network (calibration port, power division network and coupler);

Then, the remote radio frequency unit reads the corresponding amplitude and/or phase of the radio frequency signal on each radio frequency port;

Finally, the remote radio frequency unit performs calibration based on the amplitude and/or phase of the radio frequency signal on the radio frequency port, that is, assigns different amplitude and/or phase weight values to each channel of the radio frequency signal.

In addition, as can be seen in conjunction with Fig. 3b and Fig. 4, the calibration network 12 also includes a "discontinuous" transmission line 15, one end of the "discontinuous" transmission line 15 (which is circled in Fig. 4) One end of the debug circuit 15' (which is circled in FIG. 3b) on the upper surface of the first dielectric substrate 201 is connected by means of the first metallization hole PTH, and the other end of the debug circuit 15' is connected by means of the first Two metallization holes PTH are connected to the other end of the discontinuous transmission line. Due to the tolerance of the pressing process and the device itself, the test results of the patch antenna may be different, so debugging is required, such as impedance matching or return loss debugging. The calibration network and the second feed network may be constructed as a stripline network in some embodiments, and these adjustments may be difficult due to the closed structure of the stripline. Because the stripline calibration network has ground metal layers on both sides, operators cannot easily access it. Therefore, it is advantageous to provide an additional debug line 15' because the debug line 15' is constructed in the form of a microstrip transmission line on the upper surface of the first dielectric substrate 201, for which the operator can easily access the debug line 15', eg The length, width, etc. of the debug lines 15' are changed in order, for example, to improve impedance matching.

Next, a schematic diagram of a second embodiment of the patch antenna according to the invention is explained with reference to FIG. 5 .

As shown in FIG. 5, the patch antenna includes a multilayer printed circuit board 2'. In the embodiment shown in FIG. 5 , the multilayer printed circuit board 2 ′ may include five metal layers and four dielectric substrates, namely, the first dielectric substrate 201 ′, the second dielectric substrate 202 ′, the second dielectric substrate 202 ′, the The third dielectric substrate 203' and the fourth dielectric substrate 204'. The dielectric substrates 201', 202', 203', and 204' have upper major surfaces and lower major surfaces opposite the upper major surfaces, respectively.

A corresponding patch radiator array 8' may be provided on the upper main surface of the first dielectric substrate 201'. A first ground metal layer 501 is provided between the first dielectric substrate 201' and the second dielectric substrate 202'. Different from the first embodiment, a first feeding network 9' for the patch radiator array is provided between the second dielectric substrate 202' and the third dielectric substrate 203'. A conductive pattern 11' (including a calibration network and a second feeding network) is provided between the third dielectric substrate 203' and the fourth dielectric substrate 204', and a second Ground metal layer 502 .

In some embodiments, the first feed network 9' may be electrically connected to the corresponding array of patch radiators by means of metallized holes PTH. In some embodiments, the first feed network 9' may also be electrically connected to the corresponding patch radiator array 8' by means of probes. The manner of electrical connection by means of metallized holes PTH or probes is equally applicable to the manner of connection between the first feeding network 9' and the second feeding network 13'. Those skilled in the art can also imagine other feasible ways to realize the electrical connection between the conductive patterns of each layer.

In some embodiments, the multilayer printed circuit board 2' in FIG. 5 may further include a fifth dielectric substrate and a sixth metal layer. In this embodiment, a ground metal layer may be provided between the third dielectric substrate and the fourth dielectric substrate. A calibration network and a second feed network may be provided between the fourth dielectric substrate and the fifth dielectric substrate. A ground metal layer may be provided on the lower surface of the fifth dielectric substrate. Thereby, the calibration network and the second feed network can be formed as a strip transmission line network.

It should be understood that the implementations of the patch antenna according to the various embodiments of the present invention may be various, and the above-mentioned embodiments are only exemplary. Advantageously, the patch radiator array, feed network and calibration network are integrated into one multilayer printed circuit board of the integrated patch antenna array. In some embodiments, more functional networks can be integrated into the multilayer printed circuit board of the patch antenna, wherein the design, quantity and arrangement positions of the feeding network and the calibration network can be varied. The patch radiator array and the feeding network and/or the calibration network can be provided on different dielectric substrates, and the dielectric substrate provided with the patch radiator array can be located on the dielectric substrate provided with the feeding network and/or the calibration network. above.

The integrated patch antenna array according to the various embodiments of the present invention is advantageous: the patch antenna integrates the patch radiator array, the feeding network and the calibration network on a single multilayer printed circuit board, which is beneficial for their The electrical connection between them is relatively simple to realize, thus realizing the integrated and miniaturized design concept of the patch antenna.

While some specific embodiments of the present disclosure have been described in detail by way of examples, those skilled in the art will appreciate that the above examples are provided for illustration only, and are not intended to limit the scope of the present disclosure. The various embodiments disclosed herein may be combined arbitrarily without departing from the spirit and scope of the present disclosure. It will also be understood by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present disclosure.

Claims (31)

1. A patch antenna, characterized in that the patch antenna comprises a multilayer printed circuit board, wherein a calibration network and a patch radiator for the patch antenna are integrated on the multilayer printed circuit board An array and a feed network for the array of patch radiators. 2 . The patch antenna according to claim 1 , wherein the multilayer printed circuit board comprises a plurality of dielectric substrates, wherein the patch radiator array and the calibration network are provided on different dielectric substrates. 3 . and the dielectric substrate provided with the patch radiator array is above the dielectric substrate provided with the calibration network. 3. The patch antenna according to claim 1 or 2, wherein the multilayer printed circuit board comprises a first dielectric substrate and a second dielectric substrate under the first dielectric substrate, the first and second dielectric substrates The substrates respectively have an upper main surface and a lower main surface opposite to the upper main surface, wherein a first metal pattern is provided on the upper main surface of the first dielectric substrate, and the first metal pattern includes a patch radiator array, A second metal pattern is provided on the lower major surface of the second dielectric substrate, the second metal pattern including the alignment network. 4. The patch antenna of claim 3, wherein the first metal pattern further comprises a first feed network for the patch radiator array. 5. The patch antenna of claim 3, wherein the second metal pattern further comprises a second feed network for the array of patch radiators. 6. The patch antenna of claim 5, wherein the second metal pattern further comprises a coupler configured to electrically couple the calibration network with the second feed network. 7. The patch antenna according to claim 5 or 6, wherein a first ground metal layer is provided between the first dielectric substrate and the second dielectric substrate. 8 . The patch antenna according to claim 7 , wherein the second feeding network is electrically connected to the first feeding network via a conductive element, and the conductive element passes through the second dielectric substrate and the first ground metal layer. 9 . and the first dielectric substrate. 9 . The patch antenna according to claim 3 , wherein the multilayer printed circuit board further comprises: a third dielectric substrate, the third dielectric substrate has an upper main surface and a surface opposite to the upper main surface. 10 . and the third dielectric substrate is below the second dielectric substrate, wherein a second ground metal layer is provided on the lower main surface of the third dielectric substrate. 10 . The patch antenna according to claim 3 , wherein the patch antenna further comprises a fourth dielectric substrate located above the multilayer printed circuit board, and a parasitic substrate is provided on the fourth dielectric substrate. 11 . Patch radiator array. 11. The patch antenna according to claim 10, wherein the fourth dielectric substrate is mechanically connected to the multilayer printed circuit board via a connecting device. 12. The patch antenna according to claim 6, wherein the calibration network comprises a calibration port from which the calibration signal can be connected to the second feed network via corresponding signal transmission lines, power dividers and couplers electrical coupling. 13 . The patch antenna according to claim 3 , wherein the first metal pattern further comprises a debug circuit, and the debug circuit is connected to a corresponding one of the calibration network via corresponding conductive elements on two ends respectively. 14 . One end of the transmission line is electrically connected. 14. The patch antenna according to claim 1 or 2, wherein the multilayer printed circuit board respectively comprises: a first dielectric substrate, a second dielectric substrate, a third dielectric substrate and a fourth dielectric substrate from top to bottom Dielectric substrates, each of which has an upper main surface and a lower main surface opposite to the upper main surface, respectively. 15 . The patch antenna according to claim 14 , wherein a patch radiator array is provided on the upper main surface of the first dielectric substrate, wherein a patch radiator array is provided between the first dielectric substrate and the second dielectric substrate. 16 . There is a first ground metal layer, wherein a first metal pattern is provided between the second dielectric substrate and the third dielectric substrate, the first metal pattern including the first feed network for the corresponding patch radiator array , wherein a second metal pattern is provided between the third dielectric substrate and the fourth dielectric substrate, and the second metal pattern includes a calibration network. 16. The patch antenna of claim 15, wherein the second metal pattern further comprises a second feed network for the array of patch radiators. 17. The patch antenna of claim 16, wherein the second metal pattern further comprises a coupler configured to electrically couple the calibration network with the second feed network. 18. The patch antenna according to claim 16, wherein the second feeding network is electrically connected to the first feeding network through the third dielectric substrate via corresponding conductive elements. 19. The patch antenna according to claim 15, wherein a second ground metal layer is provided on the lower main surface of the fourth dielectric substrate. 20. The patch antenna according to claim 1 or 2, wherein the multilayer printed circuit board respectively comprises: a first dielectric substrate, a second dielectric substrate, a third dielectric substrate, a fourth dielectric substrate from top to bottom A dielectric substrate and a fifth dielectric substrate, each of which has an upper main surface and a lower main surface opposite to the upper main surface, respectively. 21 . The patch antenna according to claim 20 , wherein a patch radiator array is provided on the upper main surface of the first dielectric substrate, wherein a patch radiator array is provided between the first dielectric substrate and the second dielectric substrate. 22 . There is a first ground metal layer, wherein a first metal pattern is provided between the second dielectric substrate and the third dielectric substrate, the first metal pattern including the first feed network for the corresponding patch radiator array , wherein a second ground metal layer is provided between the third dielectric substrate and the fourth dielectric substrate, wherein a second metal pattern is provided between the fourth dielectric substrate and the fifth dielectric substrate, and the second metal pattern Includes calibration network. 22. The patch antenna of claim 21, wherein the second metal pattern further comprises a second feed network for the array of patch radiators. 23. The patch antenna of claim 22, wherein the second metal pattern further comprises a coupler configured to electrically couple the calibration network with the second feed network. 24 . The patch antenna according to claim 23 , wherein the second feeding network is electrically connected to the first feeding network via a conductive element, and the conductive element passes through the fourth dielectric substrate and the second ground metal layer. 25 . and a third dielectric substrate. 25. The patch antenna according to claim 21, wherein a third ground metal layer is provided on the lower main surface of the fifth dielectric substrate. 26. A patch antenna, characterized in that the patch antenna comprises a multilayer printed circuit board, the multilayer printed circuit board at least comprises a first dielectric substrate and a second dielectric substrate, wherein the patch radiator array is provided on the first dielectric substrate, and the calibration network for the patch antenna is provided on the second dielectric substrate, wherein the first dielectric substrate is above the second dielectric substrate, and the multilayer printed circuit board further includes a The first feed network of the patch radiator array. 27. The patch antenna according to claim 26, wherein a second feeding network is further provided on the second dielectric substrate, and the second feeding network is electrically connected to the calibration network via a coupler. 28. The patch antenna of claim 27, wherein the calibration network and the second feed network comprise strip transmission lines. 29. The patch antenna of claim 27, wherein the calibration network and the second feed network comprise microstrip transmission lines. 30. The patch antenna of claim 26, wherein the first feed network comprises a strip transmission line. 31. The patch antenna of claim 26, wherein the first feed network comprises a microstrip transmission line.

Images