CN218416473U - VGA switcher - Google Patents

Abstract

A VGA switcher comprises 4 VGA multiplexers, VGA multichannel amplifiers, synchronous signal buffers, level conversion buffers, a control unit and a power supply unit; the control unit is connected with the VGA multiplexer and the level conversion buffer, the level conversion buffer is connected with the VGA multichannel amplifier through the synchronous signal buffer, the VGA multiplexer is connected with the VGA multichannel amplifier, the synchronous signal buffer and the level conversion buffer, and the power supply unit is used for supplying power for each unit. The VGA switcher of the utility model amplifies the signals from a plurality of computer video ports after receiving the signals, and switches the signals to a high-resolution data display device under the condition of keeping the original signal quality; meanwhile, the functions of amplifying and enhancing the peak value and level adjustment and equalization of the signal are provided, and each output is subjected to buffering processing, so that the definition and the strength of the original signal can be still maintained when the signal is gated.

Description

VGA switch

Technical Field

The utility model belongs to the field especially relates to a VGA switch.

Background

The VGA switcher is used for transmitting and switching high-resolution computer videos, supports 8-channel VGA input to be switched to a single-channel output channel, is directly connected with a computer video card or display equipment through a VGA cable, and is suitable for various system computer video transmission applications due to the fact that the 8-channel VGA switcher and the 1-channel VGA switcher are connected.

When multiplexed video signals are routed through a video device, a VGA video switcher is used. In the prior art, a plurality of paths of output are amplified and driven by transistors, but the dynamic range of a circuit is small and the high-frequency attenuation is large due to the low power voltage of the transistors. Therefore, the problem to be solved is that the distributor is designed to realize high fidelity transmission.

Disclosure of Invention

In view of this, the present invention provides a VGA switch, which uses an integrated chip as a video driver. The method has the characteristics of low bright chroma interference, low time delay, high switching speed and small differential gain and phase error.

In order to achieve the above purpose, the technical scheme of the utility model is realized like this:

a VGA switcher comprises 4 VGA multiplexers, VGA multichannel amplifiers, synchronous signal buffers, level conversion buffers, a control unit and a power supply unit; the control unit is connected with the VGA multiplexer and the level conversion buffer, the level conversion buffer is connected with the VGA multichannel amplifier through the synchronous signal buffer, the VGA multiplexer is connected with the VGA multichannel amplifier, the synchronous signal buffer and the level conversion buffer, and the power supply unit is used for supplying power for each unit.

Further, the VGA multiplexer is a 2.

Further, each input of the VGA multi-channel amplifier is connected to only one pair of multiplexer chips while buffering the analog R, G and B signals.

Furthermore, the H/V synchronous signal of the VGA multiplexer is buffered by a synchronous signal buffer and a level conversion buffer, and ESD protection is added to the R, G and B signals and the synchronous signal at the output end of the VGA multiplexer.

Furthermore, the DDCA and DDCB signals of the VGA multiplexer share a level shift buffer and are transmitted to the VGA output connector.

Furthermore, the control unit switches the states of EN and SEL pins of the 4 VGA multiplexer chips, and the external control supports serial port communication instructions.

Compared with the prior art, a VGA switch have following advantage: the VGA switcher of the utility model amplifies the signals from a plurality of computer video ports after receiving the signals, and switches the signals to a high-resolution data display device under the condition of keeping the original signal quality; meanwhile, the functions of amplifying and enhancing the peak value and level adjustment and equalization of the signal are provided, and each output is subjected to buffering processing, so that the definition and the strength of the original signal can be still maintained when the signal is gated.

Drawings

The accompanying drawings, which form a part hereof, are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention without undue limitation. In the drawings:

FIG. 1 is a block diagram of the system of the present invention;

FIG. 2 is a block diagram of the internal functionality of the multiplexer chip;

FIG. 3 is an enlarged block diagram of an RGB video signal;

FIG. 4 is a schematic diagram of a buffering circuit for Hsync signals;

FIG. 5 is a DDCA/DDCA level shifter circuit;

fig. 6 is a truth table diagram.

Detailed Description

It should be noted that, in the case of no conflict, the embodiments and features of the embodiments of the present invention may be combined with each other.

In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore, are not to be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate a number of the indicated technical features. Thus, a feature defined as "first," "second," etc. may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified.

In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected" and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art through specific situations.

The present invention will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.

The VGA signal comprises two parts, namely video signals R, G, B and synchronization signals HSYNC, VSYNC. In order to realize the 8-in 1-out switching function, the VGA switcher respectively gates 5 paths of signals (R, G, B, HSYNC and VSYNV) of 8-channel VGA input signals and then outputs the signals by one path, wherein after the HSYNC and the VSYNC synchronous signals pass through a signal driver after selected rows and fields, the output synchronous signals are respectively output after being driven; due to partial attenuation, the RGB signals need to be amplified by an extra amplifier and then output, and are combined into a VGA output signal.

The utility model is specifically shown in figure 1, and comprises 4 VGA multiplexers, VGA multichannel amplifiers, synchronous signal buffers, level conversion buffers, a control unit and a power supply unit; the control unit is connected with the VGA multiplexer and the level conversion buffer, the level conversion buffer is connected with the VGA multichannel amplifier through the synchronous signal buffer, the VGA multiplexer is connected with the VGA multichannel amplifier, the synchronous signal buffer and the level conversion buffer, and the power supply unit is used for supplying power for each unit.

Specifically, the 4 2. VGA multiplexer high speed analog switch has realized the switching task of all VGA videos, includes: switching/switching of R, G, B, H/V, and DDC (I2C).

The VGA multiplexer comprises a 3-path high-frequency RGB switch (about 950 MHz), a 2-path low-frequency DDC (display data control) signal clamping switch and a synchronous signal buffer; has an RGB bandwidth greater than 700MHz and a capacitance less than 7 pF. All outputs are provided with +/-15 kV electrostatic protection, and an external capacitor for electrostatic protection is not needed.

Meanwhile, the multiplexer can convert the low-level line and field signals into compatible logic levels under 5.0V according to VESA standard. The provided line and field signals may drive a dual load. DDC (display data control) switching, level clamping and ESD protection functions are also provided.

As shown in FIG. 2, the VGA multiplexer integrates three SPDT, 500MHz analog switch, two SPDT H/V signal switches, two SPDT DDC signal switches, 2 TTL compatible logic level converter, and a + -8 kV ESD protector. The RGB switch requires a wider frequency band and has a bandwidth larger than 900MHz under a 50 omega load; under the 75 omega load common to video systems, has a bandwidth of more than 600 MHz. The QSXGA format (2560 × 2048) requires a bandwidth of about 500MHz to guarantee that the waveform quality is maintained through the third harmonic.

Specifically, to help ensure signal quality, the RGB components of the VGA signals need to be amplified using VGA multi-channel amplifiers, each amplifier signal input being connected to only one pair of multiplexer chips, while the analog R, G and B signals are buffered.

In order to ensure signal quality, it is necessary to amplify the RGB video signal components in the VGA signal using a VGA multi-channel amplifier. Voltage feedback multiplexer-amplifiers combine low-disturbance switching, excellent video characteristics and fixed or adjustable gain; with a channel switching time of 25ns, the transient impact at switching is only 10mVP-P. The-3 dB bandwidth reaches 200MHz, the slew rate is 363V/mu s, the fixed gain of +2 times is obtained, and the short cable with the reverse termination can be driven. The VGA multi-channel amplifier maintains an open loop output impedance of 18 omega over the entire output voltage range, minimizing gain error and bandwidth variation under load, with differential gain and phase error of only 0.07% and 0.07 deg., respectively. As shown in fig. 3, VGA multi-channel amplifier parametric characterization:

(1) +5V single power supply

(2) -3dB Bandwidth 200MHz

(3) Slew rate of 363V/μ s

(4) 25ns channel switching time

(5) 20mVP-P ultra-low switching disturbance

Specifically, VGA H and V sync signals are also buffered by the sync signal buffer and the level shift buffer, and ESD protection needs to be added to R, G, B signals and sync signals at the VGA output. As shown in fig. 4, HVsync is a digital signal, and can be transmitted over long distances without substantial distortion by buffering with a buffer before the VGA output port.

As shown in FIG. 5, the level shift buffer can provide the required level shift function for DDCA/DDCB data transmission in VGA signals. The internal slew rate enhancement circuit has a 10mA sink current and a 15mA source current driver, thereby isolating the capacitive load from the lower current driver. In an open drain system, the slew rate enhancement circuit can employ a smaller pull-up resistor to speed up the data rate with a large bus load capacitance.

The chip has a tri-state output mode and thermal shutdown protection, and has a + -15 kV Human Body Model (HBM) ESD protection at the VCC side, thereby providing stronger protection for applications with external signal routing.

In particular, since the switch tree can ensure that more than one of the 4 VGA multiplexers are enabled at any given time, the DDCA and DDCB signals can share a level shift buffer for transmission to the VGA output connector.

Specifically, the control unit switches the states of EN and SEL pins of 4 multiplexer chips, the external control supports serial port communication instructions, and each unit of the module supplies power for a 5V single power supply.

The control unit realizes the switching function of 8 paths of VGA signals by gating the 4 multiplexers. The switching of VGA channels can be realized by sending out a control command through an external serial port.

EN, enable input, active low. And when the automobile runs normally, the automobile runs at a low speed. EN high is driven to disable the device. When the device is disabled, all I/O is high impedance and the charge pump is turned off.

SEL-selecting the logic inputs for switching the RGB, HV and DDC switches.

Each VGA multiplexer provides three SPDT switches for the standard VGA R, G and B signals, the truth table being shown in figure 6. The boosted gate drive voltage is generated by an internal charge pump to improve the performance of the RGB switch. The R, G and B analog switches are identical and any of the three switches can be used to route red, green or blue video signals.

The utility model discloses at concrete during operation, the VGA signal includes two parts, video signal R, G, B, synchronous signal HSYNC, VSYNC. In order to realize the 8-in 1-out switching function, the VGA switcher respectively gates 5 paths of signals (R, G, B, HSYNC and VSYNV) of 8-channel VGA input signals and then outputs the signals by one path, wherein after the HSYNC and the VSYNC synchronous signals pass through a signal driver after selected rows and fields, the output synchronous signals are respectively output after being driven; due to partial attenuation, the RGB signals need to be amplified by an extra amplifier and then output, and are combined into a VGA output signal.

The above description is only a preferred embodiment of the present invention, and should not be taken as limiting the invention, and any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (6)

1. A VGA switch, comprising: the device comprises 4 VGA multiplexers, VGA multichannel amplifiers, synchronous signal buffers, level conversion buffers, a control unit and a power supply unit; the control unit is connected with the VGA multiplexer and the level conversion buffer, the level conversion buffer is connected with the VGA multichannel amplifier through the synchronous signal buffer, the VGA multiplexer is connected with the VGA multichannel amplifier, the synchronous signal buffer and the level conversion buffer, and the power supply unit is used for supplying power for each unit.

2. A VGA switch as recited in claim 1, wherein: the VGA multiplexer is a 2.

3. A VGA switch as recited in claim 1, wherein: each input of the VGA multi-channel amplifier is connected to only one pair of multiplexer chips while buffering the analog R, G and B signals.

4. The VGA switch of claim 1, wherein: the H/V synchronous signal of the VGA multiplexer is buffered by a synchronous signal buffer and a level conversion buffer, and ESD protection is added to the R, G and B signals and the synchronous signal at the output end of the VGA multiplexer.

5. A VGA switch as recited in claim 1, wherein: and the DDCA and DDCB signals of the VGA multiplexer share the level conversion buffer and are transmitted to the VGA output end connector.

6. A VGA switch as recited in claim 1, wherein: the control unit switches states of EN pins and SEL pins of the 4 VGA multiplexer chips, and the external control supports serial port communication instructions.

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