CN2164574Y - Accumulating electronic counter - Google Patents

Abstract

The utility model relates to an accumulating electronic counter, comprising a casing body, a face frame, an eye hood, a counting circuit and a display circuit. The counting circuit comprises a frequency dividing circuit (2), a low three-position counting and sweeping circuit (3), a high three-position counting and sweeping circuit (11), and a high three-position nonsignificant zero blanking circuit (7) connected between the low three-position counting and sweeping circuit (3) and a high three-position segment code drive circuit (9). The display circuit comprises a segment code control circuit (4, 9), a bit code drive circuit (5, 10) and a semiconductor digital circuit (6, 8). The utility model has the advantages of good anti-interference ability, fast counting rate, small volume and strong universality. The accumulating electronic counter can be matched with various meters, such as flow quantity meter, measurement meter, metering meter, etc.

Description

Accumulating electronic counter

The utility model relates to a kind of counter, particularly about a kind of accumulation formula electronic counter.

Present mechanical counter and the slow per second of the counting rate of message register are less than 15 times, and easily block the word hiatus, quick abrasion, life-span is short, use poor anti jamming capability in the frequent occasion of vibration, restricted application, the patent No. is 86205202 electronic counter, though can overcome some shortcomings of mechanical counter, figure place showing is few, weak effect, counting rate is slow, per second 10 times, though the patent No. is 90209172 electronic counter certain antijamming capability is arranged, its adopts and staticly shows that power consumption is big, and its 6 figure place counting shows there is not the nonsignificant zero blanking function, do not satisfy actual use needs, the direct supporting use of difficult and various sensor.

The purpose of this utility model is at the existing deficiency of above-mentioned electronic counter, design the rare better anti-interference and very fast numerical ability of a kind of power consumption, and it is little to reach volume, highly versatile, the competitive accumulation formula of cost performance electronic counter.

The technical solution adopted in the utility model is, accumulation formula electronic counter, it is made up of housing, face frame, eyeshade, battery case, counting circuit and display circuit, counting circuit comprises low three countings and the sweep circuits of frequency dividing circuit, series connection frequency dividing circuit output terminal and is series at the Senior Three position counting and the sweep circuit of low three countings and sweep circuit output terminal, display circuit comprises the driving that is parallel to counting and sweep circuit output terminal, and Senior Three position nonsignificant zero blanking circuit is series at the input end of low three countings and sweep circuit output terminal and Senior Three bit driver circuit.

Signal input part is established shaping circuit to improve antijamming capability, and the result who establishes branch frequency counting circuit increases counting scale function, can be more easily with flow, measure, test the speed, instrument such as metering is supporting.If the effect of dynamic scan circuit is power saving, make the complete machine power consumption only about 20mA, and power regulator need not heat radiator, make adjunction supply voltage expanded range to 5～24V.Adopt dynamic scan can also make charactron 42 root segment sign indicating number lines be reduced to 14, make reliability improve reduced volume.The effect of Senior Three figure place nonsignificant zero blanking circuit is when count signal deficiency four figures, and Senior Three figure place nonsignificant zero is disappeared, and the demonstration of significant figure is more visual and clear.

Below accompanying drawing is made brief description.

Fig. 1 is the utility model circuit function block block diagram.

Fig. 2 implements circuit diagram for the utility model.

Fig. 3 is the utility model one-piece construction synoptic diagram

Fig. 4 is the utility model fragmentary cross-sectional view.

Among the above-mentioned figure, 1 is shaping circuit IC ₁(1/2 4001), 2 is frequency dividing circuit IC ₇, IC ₈(4526), 3 are low three countings and sweep circuit IC ₂(4553), 4 are low three figure place segment encode driving circuit IC ₃(4511), 5 are low three display circuits, and 6 is Senior Three figure place nonsignificant zero blanking circuit (1/2 4001), and 7 is Senior Three position display circuit, and 8 is Senior Three figure place segment encode driving circuit IC ₅(4511), 9 are Senior Three position counting and sweep circuit IC ₄(4553), 10 are the return-to-zero circuit, and 11 is standby power supply IC ₈(7805), 21 is the face frame, and 22 is eyeshade, and 23 are the return-to-zero button, and 24 is display circuit, and 25 is housing, and 26 is counting circuit, and 27 is the battery case cover plate, and 28 is standby dry cell, and 29 is bayonet socket, and 30 is charactron, and 31 is buckle.

Below in conjunction with accompanying drawing embodiment is done detailed theory.

The utility model comprises casing and movement two partly, and casing is by housing (25), face frame (21), eyeshade (22) and battery case cover plate (27), and housing (25) is connected with buckle (31) with bayonet socket (29) with face frame (21).

Movement comprises counting circuit (26), display circuit (24), return-to-zero button (23) and wiring board.

Shaping circuit (1) is by integrated circuit (IC) ₁, diode D ₁, D ₂, resistance R ₁, R ₂, R ₃, capacitor C ₁, C ₂Form, have amplitude limit, shaping and anti-interference function when count signal during from mechanical contact, can effectively be eliminated the miscount that contact chatter causes.

Frequency dividing circuit (2) is by ic chip ₇, IC ₈And resistance R _25～32Form IC ₇Input end CP meet IC ₁Output terminal, IC ₇Output terminal OC be connected to IC ₂Signal input part CP and IC ₈PE end and tieback go into IC ₇PE end, resistance R ₂₅～R ₂₈One end respectively with IC ₇D ₁～D ₄One end and control line 12,11,10,8 one ends join; IC ₈Input end CP and IC ₇Q ₄Be connected output terminal OC and IC ₇CF link to each other IC ₈Output terminal and V _DDBe connected IC with control line 9 ₈D ₁～D ₄End and resistance R ₂₉～R ₃₂One end and control line 16,15,14,13, join.Frequency dividing circuit adopts one-level (A type) or secondary (Type B) frequency divider, control end is arranged in counting circuit (26) end and stretches out housing outer (as accompanying drawing 4), counting circuit (26) plate end is printed with four (A types) or eight (Type B) fracture line, for the A type, four fracture line are respectively 8,10,11, No. 12 lines, and corresponding divide ratio is 2 ³, 2 ², 2 ¹, 2 ⁰, for example the user to need divide ratio be the frequency divider of N=3, be 3 frequency divisions as long as 11, No. 12 lines are communicated with simultaneously with No. 9 lines respectively; If will to make divide ratio is the frequency divider of N=12, as long as 8, No. 10 line is communicated with simultaneously with No. 9 lines respectively and is 12 frequency divisions, it is N=15 that A type frequency divider can obtain maximum divide ratio.Type B frequency divider fracture line are respectively line 8,10,11,12,13,14,15, No. 16, as long as wherein required fracture line link to each other with line 9, then can get the frequency divider of the arbitrary value between N=1～255.

Counting and sweep circuit (3,9) are respectively by IC ₂And IC ₄Form, by IC ₂And capacitor C ₃Form low three countings and sweep circuit (3), by IC ₄And capacitor C ₄Form Senior Three position counting and sweep circuit (9), capacitor C ₃, C ₄Receive IC respectively ₂, IC ₄Sheet internal oscillator control end C _A, C _BEnd, IC ₂Bit code output terminal DS ₁～DS ₃Respectively with resistance R ₁₁～R ₁₃One end links to each other, IC ₂Segment encode output terminal J ₁～J ₄Respectively with IC ₃A, B, C, D join IC ₄Bit code output terminal DS ₁～DS ₃Respectively with resistance R ₂₁～R ₂₃An end link to each other IC ₄Segment encode output terminal J ₁～J ₄Respectively with IC ₅A, B, C, D join.Low three countings and sweep circuit (3) and Senior Three position counting and sweep circuit (9) each have identical sweep circuit, low (height) three countings and sweep circuit IC ₂(IC ₄) C _A, C _BPin connects timing capacitor C ₃(C ₄) then just can produce sweep signal, this signal is worked as capacitor C as the synchronizing signal that segment encode drives and bit code drives ₃Or C ₄Value obtains the corresponding synchronous signal not simultaneously, and its control segment encode timesharing shows, also controls the touring in order demonstration of bit code.

By J ₁～J ₄Output binary-coded decimal signal is to IC ₃(IC ₅), through IC ₃(IC ₅) decoding formation segment encode drive signal, through R ₁～R ₁₀(R ₁₄～R ₂₀) drive charactron by IC ₂(IC ₄) DS ₁～DS ₃End output synchronization bit coded signal is through V ₁～V ₂(V ₄～V ₈) amplify that to go to control corresponding charactron timesharing luminous, form dynamic scan.

Display circuit (24) is made up of driving circuit (4,8) and LED light-emitting nixie tube, and wherein segment encode shows that dynamically low three figure place circuit are by integrated circuit (IC) ₃And resistance R ₄～R ₁₀Form; Segment encode shows that dynamically Senior Three figure place circuit is by integrated circuit (IC) ₅And resistance R ₁₄～R ₂₀Form, bit code shows that dynamically low three figure place circuit are by R ₁₁～R ₁₃With triode V ₁, V ₂, V ₃Form, bit code shows that dynamically Senior Three figure place circuit is by R ₂₁, R ₂₂, R ₂₃With triode V ₄, V ₅, V ₆Form IC ₃A～g end pass through resistance R respectively ₄～R ₁₀Join triode V with low three segment encode drive ends ₁～V ₃Emitter join with low three bit code drive ends respectively; IC ₅A～g end pass through resistance R respectively ₁₄～R ₂₀Join triode V with Senior Three position segment encode drive end ₄～V ₆Emitter join with Senior Three position bit code drive end respectively.

Senior Three position nonsignificant zero blanking circuit (6) is by integrated circuit (IC) ₉, resistance R ₂₄AN forms with button, by IC ₉S～R trigger that (1/2 4001) is formed, it puts 1 end (S) and low three counting circuit IC ₂Carry output terminal OF and the signal input part of IC4 link to each other zero setting (R) end and counting circuit IC ₂And IC ₄MR return-to-zero end link to each other output terminal of trigger (Q) and Senior Three bit driver circuit IC ₅Blanking control end BI link to each other; Resistance R ₂₄An end and IC ₂And IC ₄MR return-to-zero end link to each other other end ground connection; The termination V of return-to-zero button AN _DD, the other end and IC ₇, IC ₈Clear terminal Cr, IC ₂And IC ₄MR end and resistance R ₂₄One end phase also connects.

The Senior Three position nonsignificant zero blanking circuit course of work is as follows, when return-to-zero button AN=1, by IC ₉The trigger Q=0 that forms, IC ₅BI=0, IC ₅Do not work, so the Senior Three figure place does not show zero, and low three figure places show zero.When the count signal N 1≤N of place＜1000, IC ₂The no-carry pulse, output terminal OF=0, Q=0, the blanking of Senior Three figure place nonsignificant zero.When N=1000, IC ₂OF end output one positive pulse (making S=1) Q=1 then, IC ₅BI=1, IC ₅Work, counter show 001000, and promptly when N 〉=1000, six bit digital are demonstration simultaneously.

The return-to-zero circuit obtains high level signal by pushbutton switch AN, is high level 1 when AN engages, and makes IC ₂, IC ₄, IC ₇, IC ₈Zero clearing makes blanking circuit IC ₉State exchange, make IC ₅Do not work the blanking of Senior Three figure place nonsignificant zero.

Outage keeps data circuit by diode D ₃, D ₄, capacitor C ₅Form EP with power supply EP and select the 1.5V battery for use, it is latter half of to be installed on counter.D ₃, D ₄Be isolating diode, when outer power supply source EC outage, EP enters power supply state automatically, and all has data can make EP be 1.0～1.6V change the time and keep function.

The also well-designed wiring layout of the utility model, adopt double-sided PCB, select for use miniaturized element to cooperate embodiment to reach miniaturization, divide A type and Type B according to user's needs, A type volume is 25 * 50 * 80, the Type B volume is 29 * 78 * 78, also can be assembled into five, four, three or three and half counters by customer requirements.

Claims (7)

1, accumulation formula electronic counter, it is by housing (25), face frame (21), eyeshade (22), counting circuit (26) and display circuit (24) are formed, it is characterized in that counting circuit (26) comprises frequency dividing circuit (2), be series at low three countings and the sweep circuit (3) of frequency dividing circuit (2) output terminal and be series at Senior Three position counting and the sweep circuit (9) that hangs down three countings and sweep circuit (3) output terminal, display circuit (24) comprises the driving circuit (4 that is parallel to counting and sweep circuit output terminal, 8), Senior Three position nonsignificant zero blanking circuit (6) is series at low three countings and the output terminal of sweep circuit (3) and the input end of Senior Three bit driver circuit (8).

2, accumulation formula electronic counter according to claim 1 is characterized in that Senior Three figure place nonsignificant zero blanking circuit (6) is by integrated circuit (IC) ₉, resistance R ₂₄AN forms with button, by IC ₉S～R trigger that (1/2 4001) is formed, it puts 1 end (S) and low three counting circuit IC ₂Carry output terminal OF and IC ₄Signal input part CP link to each other zero setting (R) end and counting circuit IC ₂And IC ₄MR return-to-zero end link to each other output terminal of trigger (Q) and Senior Three bit driver circuit IC ₅Blanking control end BI link to each other resistance R ₂₄An end and IC ₂And IC ₄MR return-to-zero end link to each other other end ground connection, the termination V of return-to-zero button AN _DDThe other end and IC ₇, IC ₈Clear terminal Cr, IC ₂And IC ₄MR end and resistance R ₂₄One end phase also connects.

3, accumulation formula electronic counter according to claim 1 is characterized in that frequency dividing circuit (2) is by ic chip ₇, IC ₈(4526) and resistance R _25～32Form IC ₇Input end CP meet IC ₁Output terminal, IC ₇Output terminal OC be connected to IC ₂Signal input part CP and IC ₈PE end and tieback go into IC ₇PE end, resistance R ₂₅～R ₂₃One end respectively with IC ₇D ₁～D ₄One end and control line 12,11,10,8 one ends join; IC ₈Input end CP and IC ₇Q ₄Be connected output terminal OC and IC ₇CF link to each other IC ₈CF end and V _DDBe connected IC with control line 9 ₈D ₁～D ₄End and resistance R ₂₉～R ₃₂One end and control line 16,15,14,13, join.

4, according to claim 1 or 3 described accumulation formula electronic counters, it is characterized in that frequency dividing circuit (2) control end is positioned at the end of counting circuit (26), form the frequency divider of corresponding divide ratio by joining with line 9 more than one in control line 8,10,11,12 or 13,14,15,16 lines.

5, accumulation formula electronic counter according to claim 1 is characterized in that counting and sweep circuit (3,9) are respectively by IC ₂(4553) and IC ₄(4553) form, by IC ₂And capacitor C ₃Form low three countings and sweep circuit (3), by IC ₄And capacitor C ₄Form Senior Three position counting and sweep circuit (9), capacitor C ₃, C ₄Receive IC respectively ₂, IC ₄Sheet internal oscillator control end C _A, C _BEnd, IC ₂Bit code output terminal DS ₁～DS ₂Respectively with resistance R ₁₁～R ₁₃One end links to each other, IC ₂Segment encode output terminal J ₁～J ₄Respectively with IC ₃A, B, C, D join IC ₄Bit code output terminal DS ₁～DS ₂Respectively with resistance R ₂₁～R ₂₃An end link to each other IC ₄Segment encode output terminal J ₁～J ₄Respectively with IC ₅A, B, C, D join.

6, accumulation formula electronic counter according to claim 1 is characterized in that display circuit (24) is made up of driving circuit (4,8) and LED light-emitting nixie tube, and wherein segment encode shows that dynamically low three figure place circuit are by integrated circuit (IC) ₃(4511) and resistance R ₄～R ₁₀Form, segment encode shows that dynamically Senior Three figure place circuit is by integrated circuit (IC) ₅(4511) and resistance R ₁₄～R ₂₀Form, bit code shows that dynamically low three figure place circuit are by R ₁₁～R ₁₃With triode V ₁, V ₂, V ₃Form, bit code shows that dynamically Senior Three figure place circuit is by R ₂₁～R ₂₃With triode V ₄, V ₅, V ₆Form IC ₃A～g end pass through resistance R respectively ₄～R ₁₀Join triode V with low three segment encode drive ends ₁～V ₃Emitter join IC with low three bit code drive ends respectively ₅A～g end pass through resistance R respectively ₁₄～R ₂₀Join triode V with Senior Three position segment encode drive end ₄～V ₆Emitter join with Senior Three position bit code drive end respectively.

7, accumulation formula electronic counter according to claim 1 is characterized in that face frame (21) is connected with buckle (31) for corresponding bayonet socket (29) with housing (25).