CN203813751U - Pulse-triggered rapid-start zero-power-consumption standby circuit - Google Patents

Abstract

The utility mode discloses a pulse-triggered rapid-start zero-power-consumption standby circuit. The pulse-triggered rapid-start zero-power-consumption standby circuit comprises a PNP tube Q1 and an NPN tube Q2, wherein the emitting electrode and the collecting electrode of the PNP tube are connected with a power supply; the base electrode of the PNP tube Q1 is provided with a load input circuit and a load output circuit; the load output circuit is serially connected with a triggering switch SW and a resistor R1, a tail end of the circuit is connected with a load input terminal; the load output circuit comprises the NPN tube Q2, the collecting electrode of the NPN tube Q2 is connected with the base electrode of the PNP tube Q1, the base electrode of the NPN tube Q2 is connected with an output signal of the load, and the emitting electrode of the NPN tube Q2 is grounded. With the pulse-triggered rapid-start zero-power-consumption standby circuit, starting and standby of an electronic product are achieved through using a triggering pulse to control the conducting and cut-off of a triode. Multiple function control is achieved by one trigger switch button, so that cost is saved and operation is facilitated. The pulse-triggered rapid-start zero-power-consumption standby circuit has extremely low requirements on an MCU, the MCU is only needed to be capable of detecting a level and sending out a corresponding level, so that the circuit can be achieved by using a common single chip with high cost efficiency in the market, and therefore the research and development costs of a product are reduced.

Description

A pulse-triggered fast-start zero-power standby circuit

【Technical field】

The utility model relates to a standby circuit of an electronic product.

【Background technique】

In portable mobile devices and emergency products, reasonable management of battery power consumption is required to prevent the battery from running out due to the low current discharge state for a long time, so that the battery power can be effectively used. At present, many electrical appliances are in a standby state after the work procedure ends, and the electrical appliances will inevitably have a certain amount of standby consumption in the standby state, resulting in a loss of battery power. In addition, in the standby circuit with MCU design, in order to allow the MCU to quickly switch between sleep and wake-up, it will increase the difficulty of program development, and the increase in the amount of programs will also occupy a certain amount of storage space, which will affect the storage capacity of the MCU. There are certain requirements, which lead to an increase in the cost of the MCU used in the product.

【Content of invention】

Aiming at the above technical problems, the utility model provides a more practical circuit framework, which can realize zero power consumption standby, and has extremely low requirements on the MCU. The most common cost-effective stand-alone on the market can realize this circuit, thereby reducing product development costs. .

In order to realize the above technical purpose, the utility model is achieved through the following technical solutions:

A pulse-triggered quick-start zero-power standby circuit, comprising a PNP transistor Q1 and an NPN transistor Q2, the PNP transistor Q1 adopts a common base connection mode, its emitter and collector are respectively connected to a power supply, and the emitter and base A resistor is connected between the collector and the power supply connected to it; the base of the PNP tube Q1 is respectively provided with a load input circuit and a load output circuit; the load input circuit is connected in series with a trigger switch SW and a resistor R1, and the end of the circuit Connected to the input terminal of the load, and connected to the ground terminal through a resistor R2; the load output circuit includes an NPN transistor Q2, the collector of the NPN transistor Q2 is connected to the base of the PNP transistor Q1 through a resistor R3, and the base of the NPN transistor Q2 passes through The resistor R4 is connected to the output signal of the load, and the emitter of the NPN transistor Q2 is grounded.

This design uses a trigger switch to trigger the switching state of the circuit. When the trigger switch is pressed, Q1 is turned on, and the level of the load input terminal changes from low to high. After the load detects a high level, it outputs a high level to make Q2 turn on. Turn on the trigger switch, Q2 is on, and the load continues to work; press the trigger switch again, and the load input detects a level change and outputs a low level to cut off Q2, and the load stops working. It can be seen that the load is a component that receives a level signal and outputs a corresponding level signal.

Further, the power source connected to the collector of the PNP transistor Q1 is a regulated power source. The voltage stabilizing power supply is a power supply equipped with a voltage stabilizing circuit, and the voltage stabilizing circuit includes a voltage stabilizing chip.

Further, the resistor R2 is connected with a capacitor C1 in parallel, and the capacitor C1 has the functions of debounce and preventing misoperation.

Further, the resistors connected between the collector and the power supply connected are two parallel resistors R5, R6; R5, R6 can reduce the inrush current of electrolytic charging after Q1 is turned on, and R5, R6 can bear part of the regulator chip To avoid damage to the regulator chip due to fluctuations in the emitter input voltage.

Further, the load is MCU.

The utility model realizes the start-up and standby of the electronic product by controlling the conduction and cut-off of the triode by the trigger pulse, and the trigger switch button can realize multi-function control with one key, which saves cost and is convenient to operate; moreover, the requirement for the MCU is extremely low, and it only needs to be able to realize It is enough to detect the level and send out the corresponding level. The most common cost-effective stand-alone on the market can realize this circuit, thereby reducing the cost of product development.

【Description of drawings】

Fig. 1 is the circuit diagram of the utility model.

【Detailed ways】

The utility model is described in further detail below in conjunction with specific embodiments.

The pulse-triggered quick-start zero-power standby circuit shown in Figure 1 includes a S8550-type PNP transistor Q1 and an S8050-type NPN transistor Q2. The PNP transistor Q1 is connected in a common-base manner, and its emitter and collector are connected separately Power supply Vin and 5V0, Vin is greater than the conduction voltage of Q1, a 1K resistor R7 is connected between the emitter and the base, parallel resistors R5 and R6 are connected between the collector and 5V0; the bases of the PNP transistor Q1 are respectively equipped with load input circuit and load output circuit; the load input circuit has a trigger switch SW and a 5.6K resistor R1 in series, the end of the circuit is connected to the input terminal of the MCU, and is connected to the ground terminal through a 3k resistor R2, and SW is a micro switch; the load output The circuit includes NPN transistor Q2, the collector of NPN transistor Q2 is connected to the base of PNP transistor Q1 through 10k resistor R3, the base of NPN transistor Q2 is connected to the output signal of MCU through 22k resistor R4, and the emitter of NPN transistor Q2 is grounded.

The power supply 5V0 connected to the collector of the PNP transistor Q1 is a regulated power supply. The voltage stabilizing power supply is a power supply equipped with a voltage stabilizing circuit, and the voltage stabilizing circuit includes a HT7550 voltage stabilizing chip U1, the Vin port of the voltage stabilizing chip U1 is connected with capacitors C2 and C3, and the Vout port of the voltage stabilizing chip U1 is Capacitors C4 and C5 are connected; capacitors C2 and C4 are electrolytic capacitors, and C3 and C5 are ordinary capacitors.

The resistor R2 is connected with the capacitor C1 in parallel, and the capacitor C1 has the function of de-jittering and preventing misoperation.

The above-mentioned embodiments only express several implementations of the utility model, and the description thereof is relatively specific and detailed, but it should not be construed as limiting the patent scope of the utility model. It should be noted that those skilled in the art can make several modifications and improvements without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the scope of protection of the utility model patent should be based on the appended claims.

Claims (6)

1. A pulse-triggered quick-start zero-power standby circuit, characterized in that it comprises a PNP tube Q1 and an NPN tube Q2, and the PNP tube Q1 adopts a common-base connection mode, and its emitter and collector are respectively connected to a power supply, A resistor is connected between the emitter and the base, and a resistor is connected between the collector and the power supply connected to it; the base of the PNP transistor Q1 is respectively provided with a load input circuit and a load output circuit; the load input circuit is connected in series with a trigger switch SW And resistor R1, the end of the circuit is connected to the input terminal of the load, and connected to the ground terminal through a resistor R2; the load output circuit includes NPN transistor Q2, the collector of NPN transistor Q2 is connected to the base of PNP transistor Q1 through resistor R3, NPN The base of the tube Q2 is connected to the output signal of the load through the resistor R4, and the emitter of the NPN tube Q2 is grounded. 2. The pulse-triggered quick-start zero-power standby circuit according to claim 1, wherein the power supply connected to the collector of the PNP transistor Q1 is a regulated power supply. 3. The pulse-triggered quick-start zero-power standby circuit according to claim 1, characterized in that, the voltage-stabilizing power supply is a power supply equipped with a voltage-stabilizing circuit, and the voltage-stabilizing circuit includes a voltage-stabilizing chip . 4. The pulse-triggered quick-start zero-power standby circuit according to claim 1, characterized in that the resistor R2 is connected in parallel with a capacitor C1, and the capacitor C1 has the function of debounce and preventing misoperation. 5 . The pulse-triggered quick-start zero-power standby circuit according to claim 1 , wherein the resistors connected between the collector and the power supply connected thereto are two parallel resistors R5 and R6 . 6. The pulse-triggered quick-start zero-power standby circuit according to claim 1, wherein the load is an MCU.