CN203814020U - A dimmable LED driver chip with soft start and undervoltage lockout circuit - Google Patents

Abstract

The utility model belongs to the field of LED drivers and relates to a dimmable LED driver chip, in particular to a dimmable LED driver chip with a soft start and undervoltage lockout circuit. This chip is based on a current PWM mode DC-DC boost converter. The switch-type PWM dimming strategy is adopted inside the chip, which can smoothly adjust the brightness of the LED lamp in a wide range without dispersion without affecting the efficiency of the chip. In addition, the chip integrates a new type of soft-start circuit, which can suppress the inrush current and overshoot voltage at startup to protect the LED lamp and the driver chip from being damaged. Finally, the chip integrates a new type of UVLO circuit, which not only saves the chip area, but also ensures the stability of the LED driver chip when the power supply voltage changes, and ensures the reliability of the LED light.

Description

A dimmable LED driver chip with soft start and undervoltage lockout circuit

technical field

The utility model belongs to the field of LED drivers and relates to a dimmable LED driver chip, in particular to a dimmable LED driver chip with a soft start and undervoltage lockout circuit.

Background technique

With the development of society, the concept of energy saving is deeply rooted in the hearts of the people, and people are actively looking for high-efficiency light sources, which have achieved the purpose of energy saving. White light LED has become an excellent solid-state light source due to its high luminous efficiency, long service life, good environmental adaptability, smooth dimming performance and other advantages. White LEDs are widely used in off-line lighting, such as indoor lighting fixtures and backlights for liquid crystal displays. Usually multiple LED lamps are connected in series to ensure that the brightness of each LED lamp is the same, while improving the overall brightness. Since the luminous brightness of the LED is proportional to the current flowing through it, and has nothing to do with the voltage across it, the LED needs a constant current source for power supply when it is working.

The traditional LED driver is a DC-DC converter with constant current output, and its output current is a fixed value. The luminance of the driven LED must not be adjustable, which limits the application range of the LED; due to the inherent characteristics of the DC-DC control loop , when the driver starts, the control loop is in an unbalanced state, so that the system will generate overshoot voltage and surge current, which will easily damage the LED lamp and the LED driver chip; at the same time, during normal operation, because the voltage of the input power supply of the LED driver will change, When the input voltage is low, the LED driver will output wrong signals, and the LED light will be unreliable and may be damaged.

Utility model content

Aiming at the above-mentioned problems existing in traditional LED driver chips, an LED driver chip based on a current PWM mode DC-DC boost converter is provided. The driver chip integrates a new type of soft start circuit, which can suppress the surge current and overshoot voltage when the chip starts, and protect the driver chip and LED from damage; at the same time, it integrates a new type of undervoltage lockout circuit, which saves the chip area while , to ensure the reliability of the driver chip and LED lights when the input power voltage changes; it contains a sleep module, which can control the chip to enter sleep mode to save energy. The chip adopts a switch-type PWM digital dimming scheme, which realizes a wide range of dispersion-free and smooth adjustment of the brightness of the LED lamp without affecting the efficiency of the LED driver chip.

The above-mentioned technical problems of the utility model are mainly solved by the following technical solutions:

A dimmable LED driver chip with a soft start and undervoltage lockout circuit, characterized in that it includes: a control loop, a soft start loop, a compensation loop, and an auxiliary control module; the input end of the compensation loop is connected to the output end of the control loop, and the control The output terminal of the circuit is connected to the compensation input terminal of the compensation circuit; the voltage and current output terminals of the soft start circuit are connected to the soft start voltage and current input terminals of the control circuit, and the soft start circuit and the compensation circuit share the inductance current detection module; the auxiliary control module is enabled The output terminal is connected to the enabling terminal of other modules, and the enabling terminal of each module adopts a classic switch connection mode; the dimming output terminal of the auxiliary control module is connected to the dimming input terminal of the control circuit;

In the aforementioned dimmable LED driver chip with soft start and undervoltage lockout circuit, the LED driver chip includes the following six pins: power supply pin VIN, overvoltage protection input pin OVP, inductor current input pin LX, Voltage feedback pin FB, dimming signal input pin EN, and ground pin GND; among them: VIN, GND are common pins of all chip internal modules; LX pin is also used as the input pin of the inductor current detection module, and the control The output pin of the loop; the OVP pin is the voltage input pin of the soft start loop, the EN pin is the control signal input terminal of the auxiliary control module; the FB pin is the feedback signal input pin of the control loop.

A typical working circuit is connected as follows, the positive end of the power supply VDD is connected to the VIN pin, and the positive end of VDD is connected to the ground through the input capacitor C _IN ; the inductor L is connected between the VIN pin and the LX pin, and the LX pin is connected to the anode of the rectifier diode D , the cathode of the diode D is grounded through the output capacitor C _O , the voltage of the cathode of the diode D is the output voltage V _O ; V _O is connected to the OVP pin and the anode of the load LEDs at the same time, and the cathode of the LEDs is grounded through the feedback resistor R _F to drive the FB pin of the chip Connect to the negative pole of LEDs; the PWM dimming signal is connected to the chip through the EN pin.

In the aforementioned dimmable LED driver chip with soft start and undervoltage lockout circuit, the control loop includes a reference source and bias module, an error amplifier, a PWM comparator, a three-input AND, and a dimmable latch Module, N-type driver, power switch NM2; the topological connection is as follows: the voltage input terminal of the reference source and bias module is connected to the VIN pin, the reference voltage output terminal V _B0 is connected to the negative input terminal of the error amplifier EA; the feedback pin FB is connected to the error The positive input terminal of the amplifier EA, the positive input terminal of the EA is the feedback input terminal of the control loop, the output terminal of the error amplifier EA is connected to the negative input terminal of the PWM comparator, and the positive input terminal of the PWM comparator is the compensation input terminal of the control loop terminal, the output terminal of the PWM comparator is connected to the input terminal of the three-input AND gate AND; the other two input terminals of AND are respectively the soft-start voltage and current input terminals of the control circuit, and the output terminal of the AND is connected to the R input of the dimming latch module terminal, the S input terminal of the dimming latch module is connected to the output terminal of the oscillator module, the Dim input terminal of the dimming latch module is connected to the ENB input terminal of the dormancy module, and the Dim terminal is the dimming input terminal of the control loop; the dimming lock The output terminal Q of the storage module is connected to the input terminal of the N-type drive module; the output terminal of the N-type drive module is connected to the gate of the power switch NM2, the drain of NM2 is connected to the LX pin, the source of NM2 is grounded, and the drain of NM2 is is the output of the control loop.

The compensation loop includes a slope voltage module, a slope compensation module, and an inductor current detection module; the topological connection is as follows: the output terminal V _SENSE of the current detection module is connected to the current input terminal of the slope compensation module; the input terminal of the slope voltage module is connected to the oscillator module Output terminal, the output terminal of the slope voltage module is connected to the voltage input terminal of the slope compensation module; the output terminal of the slope compensation module is connected to the positive input terminal of the PWM comparator, the output terminal of the slope compensation module is the output terminal of the compensation circuit, and the inductor current detection module The input end of the compensation loop is the input end; the inductance current detection module includes a MOS transistor NM1, resistors _R1 and _R2 , the gate of the MOS transistor NM1 is connected to the output end of the N-type drive module, and the drain of the NM1 is connected to the LX pin , the drain of NM1 is the input end of the inductor current detection module, the source of NM1 is connected to one end of _R1 ; the other end of _R1 is grounded through _R2 , and the common end of _R1 and _R2 is the inductor current detection module Output V _SENSE ;

The soft start loop includes an overvoltage protection comparator, a soft start circuit, an overcurrent protection comparator, and an inductor current detection module; the topological connection is as follows: the output terminal V _SENSE of the inductor current detection module is connected to the negative input terminal of the overcurrent protection comparator , the output terminal of the overcurrent protection comparator is connected to the input terminal of the three-input AND gate AND; the input terminal of the inductor current detection module and the output terminal of the overcurrent protection comparator are respectively, the input terminal of the soft start circuit and the current output terminal; The clock input terminal of the startup circuit is connected to the output terminal of the oscillator module, the voltage input terminal is connected to the VIN pin, the voltage output terminal V _ST is connected to the positive input terminal of the overcurrent protection comparison; the reference source is connected to the reference voltage output terminal V _B1 of the bias module The positive input terminal of the overvoltage protection comparator, the OVP pin is grounded through the series connection of the resistor R _P1 and the resistor R _P2 , the common terminal of the resistor R _P1 and the resistor R _P2 is connected to the negative input terminal of the overvoltage protection comparator, the overvoltage protection comparator The output terminal of the device is the voltage output terminal of the soft start circuit connected with the input terminal of the AND gate AND;

The auxiliary control module includes an undervoltage lockout module and a dormancy control module; the topological connection is as follows: VIN is connected to the input terminal of the undervoltage lockout circuit, and the output signal UV of the undervoltage lockout circuit is connected to the control signal UV input terminal of the dormancy module; pin EN Connect to the input terminal of the Schmitt trigger Smit, the output terminal of Smit is connected to the input terminal of the reverse INV, the output terminal of INV is the dimming output terminal of the auxiliary control module, connected to the ENB input terminal of the dormancy module, and the clock input of the dormancy module The terminal is connected to the output terminal of the oscillator module; the SDB output terminal of the sleep module is connected to the enabling terminal of the reference source and bias module, and the SD output terminal is connected to the enabling terminals of other modules.

In the above-mentioned dimmable LED driver chip with soft start and undervoltage lockout circuit, the dimming latch module in the control loop adopts a switch-type PWM digital dimming mode, and the R input terminal of the dimming latch passes through The inverter INV1 is connected to the R input terminal of D flip-flop 1, the S input terminal of the dimming latch is connected to the S input terminal of D flip-flop 1 at the same time, and the input terminal of inverter INV2, and the output terminal of INV2 is connected to the NAND gate The input terminal of NAND1, the Dim input terminal of the dimming latch is connected to the input terminal of NAND gate NAND2; the Q output terminal of D flip-flop 1 is connected to the input terminal of NAND1, the output terminal of NAND1 is connected to the input terminal of NAND2, and the output terminal of NAND2 Terminal is the output terminal Q of the dimming latch.

In the above-mentioned dimmable LED driver chip with soft start and undervoltage lockout circuit, the internal topology of the soft start circuit is connected as follows: the drain of the N-type MOS transistor NMt is connected to the VIN pin, and the gate of the NMt Connect the OPA output terminal of the operational amplifier, the source of NMt is connected to the negative input terminal of OPA; the positive input terminal of OPA is connected to the reference source and the V _B1 output terminal of the bias module, and the resistors Rd0, Rd1, Rd2, Rd3, Rd4 are connected in series in sequence, The end of Rd4 is grounded, and the upper end of Rd0 is connected to the negative input terminal of OPA; the common terminal of R _d0 and R _d1 is the output terminal V _ST of the soft start circuit; the drain of the switch MOS transistor NM _d1 is connected to the resistor R _d0 and R _d1 The common terminal, the drain of the switching MOS transistor NM _d2 is connected to the common terminal of the resistors R _d1 and R _d2 , the drain of the switching MOS transistor NM _d3 is connected to the common terminal of the resistors R _d2 and R _d3 , and the drain of the switching MOS transistor NM _d4 is connected to The common terminal of resistors R _d3 and R _d4 ; the drain of NM _d1 is connected to the output terminal Q 1 of delay module ₁ , the drain of NM _d2 is connected to the output terminal Q 2 of delay module ₂ , and the drain of NM _d1 is connected to the output terminal of delay module 3 The output terminal Q ₃ and the drain of NM _d4 are connected to the output terminal Q ₄ of the delay module 4; the sources of NM _d1 , NM _d2 , NM _d3 , and NM _d4 are uniformly grounded. The enable terminal EN of delay module 1 is connected to the SD output terminal of the sleep module, the enable terminal of delay module 2 is connected to the output terminal Q _{1 of delay module 1} , and the enable terminal of delay module 3 is connected to the delay module 2 The output terminal _Q2 , the enabling terminal of the delay module 4 is connected to the output terminal Q3 of the delay module ₃ ; the clock input terminals Clk of the delay modules 1, 2, 3, and 4 are connected to the output terminal of the oscillator module.

In the above-mentioned dimmable LED driver chip with soft start and undervoltage lockout circuit, the internal topological connection of the undervoltage lockout module in the auxiliary control module is as follows: the reference source is connected to the output terminal V _BP of the bias module The gates of PMOS transistors PM _U1 and PM _U7 , the source of PM _U1 are connected to the VIN pin, the drain of PM _U1 is connected to the drain of NMOS transistor NM _U1 ; the source of NM _U1 is grounded, and the gate is connected to the reference source and bias The output terminal VB _U2 of the module, the drain of NM _U1 is connected to the gate of PMOS transistor PM _U3 , the source of PM _U3 is connected to the drain of PMOS transistor PM U2, the source of _{PM U2 is} connected to VIN pin, and the gate of PM _U2 is connected to The output terminal VB _U2 of the reference source and bias module; the drain of PM _U3 is connected to the source of the PMOS transistor PM _U4 , the gate of PM _U4 is connected to the output terminal of the inverter INV4, and the drain of PMu4 is connected to the NMOS transistor NM _U2 Drain; the source of NM _U2 is grounded, and the gate is connected to the output terminal V _BN of the reference source and bias module. The source of the PMOS transistor PM _U5 is connected to the VIN pin, the gate is connected to the reference source and the output terminal VB _U1 of the bias module, and the drain is connected to the source of the PMOS transistor PM _U6 ; the gate of PM _U6 is connected to the drain of NM _U1 , The drain is connected to the drain of NM _U2 . The source of PM _U7 is connected to the VIN pin, and the drain is connected to the drain of NMOS transistor NM _U3 ; the source of NM _U3 is grounded, and the gate is connected to the drain of NM _U2 . The source of the PMOS transistor PM _U8 is connected to the VIN pin, the gate is connected to the gate of the NMOS transistor NM _U4 and then connected to the drain of the NM _U3 , the drain is connected to the drain of the NM _U4 , and the source of the NM _U4 is connected to the NMOS transistor NM The drain of _U5 ; the source of NM _U5 is grounded, and the gate is connected to the gate of NM _U2 . The input terminal of the inverter INV4 is connected to the drain of the NM _U4 , and the output terminal is connected to the input terminal of the Schmitt trigger Smit2, and Smit2 outputs an undervoltage lockout signal UV.

In the above-mentioned dimmable LED driver chip with soft start and undervoltage lockout circuit, the oscillator module is constructed with a five-stage ring oscillator with a constant current source charging and discharging the capacitor; the reference source and bias module adopt The classic triode is used as a bandgap reference source for temperature compensation; the slope voltage module in the compensation loop is constructed using a classic comparator-based slope voltage oscillator; the slope compensation module is constructed using a classic OTA amplifier.

Therefore, the utility model has the following advantages: 1. The application circuit structure is simple, and only 5 peripheral devices are required to work; 2. The dormancy function is beneficial to reduce power consumption; 3. While not affecting the efficiency of the drive chip, The LED brightness can be adjusted smoothly without dispersion in a wide range. 4. The surge current and overshoot voltage are suppressed when starting, effectively protecting the LED lamp and the driver chip from being damaged; 5. When the input power voltage changes, the LED lamp and The work of the driving core has high reliability.

Description of drawings

Figure 1 is a schematic diagram of a typical working circuit of the designed LED driver chip.

Accompanying drawing 2 shows the connection diagram of the internal functional modules of the designed LED driver chip.

Figure 3 is a schematic diagram of the designed internal dimming circuit and sleep module of the LED driver chip.

Figure 4 is a schematic diagram of the soft-start circuit inside the designed LED driver chip.

Figure 5 is a schematic diagram of the undervoltage lockout circuit inside the designed LED driver chip.

specific implementation plan

The technical solutions of the present utility model will be further specifically described below through the embodiments and in conjunction with the accompanying drawings. the

Example:

In order to explain the purpose, technical solutions and advantages of the utility model more clearly, the utility model will be further described below in conjunction with the accompanying drawings and examples.

Figure 1 shows the typical working circuit of the designed dimmable LED driver with soft start and undervoltage lockout circuit. It is characterized in that the LED driver chip includes the following six pins: power supply pin VIN, overvoltage protection input pin OVP, inductor current input pin LX, voltage feedback pin FB, dimming signal input pin EN, ground pin GND . The positive end of the power supply VDD is connected to the VIN pin to supply power to the chip. The positive end of VDD is grounded through the input capacitor C _IN , _which can filter out high-frequency noise in VDD; the inductor L is connected between the VIN pin and the LX pin. The LX pin is connected to the anode of the rectifier diode D, and the cathode of the diode D is connected to the ground through the output capacitor C _O. The voltage at the cathode of the diode D is the output voltage V _O ; V _{O is} connected to the OVP pin to provide the basis for overvoltage protection for the chip to limit The upper limit of the output voltage; Vo is connected to the positive pole of the load LEDs (multiple LEDs in series), the negative pole of the LEDs is grounded through the feedback resistor R _F , the negative pole of the LEDs is connected to the FB pin of the driver chip, and the voltage of the resistor RF is used as feedback to ensure the output of the driver chip The current is stable at the designed value; the PWM dimming signal is connected to the chip through the EN pin, and it is also used as a sleep control signal. The value of the constant current output by the chip is determined by the RF and the reference voltage inside the chip. By changing the RF, the amplitude of the output current is changed to drive multiple LED lights. It can be seen from Figure 1 that the designed LED driver chip only needs 5 peripheral devices to realize the driving of LED lights, which reduces the difficulty and cost of use. After testing, it is found that the output driving capability of the designed driver chip reaches 1~1000mA, while maintaining a high conversion efficiency, and in a wide range, realizes smooth adjustment of LED brightness without dispersion.

Accompanying drawing 2 shows the connection diagram of the internal functional modules of the designed LED driver chip, which is characterized in that the basic structure of the driver chip is a current PWM mode DC-DC boost converter. Its main topology consists of four parts: control loop, soft start loop, compensation loop, and auxiliary control module. The input terminal of the compensation circuit is connected to the output terminal of the control circuit, and the output terminal of the control circuit is connected to the compensation input terminal of the compensation circuit; the voltage and current output terminals of the soft start circuit are connected to the soft start voltage and current input terminals of the control circuit, and the soft start circuit and the compensation circuit Shared inductor current detection module; the enable output terminal of the auxiliary control module is connected to the enable terminal of other modules, and the enable terminal of each module adopts a classic switch connection mode; the dimming output terminal of the auxiliary control module is connected to the dimming input of the control circuit terminal; VIN, GND are the common pins of all the internal modules of the chip; the LX pin is also used as the input pin of the inductor current detection module and the output pin of the control loop; the OVP pin is the voltage input pin of the soft start loop, The EN pin is the control signal input terminal of the auxiliary control module; the FB pin is the feedback signal input pin of the control loop. The error amplifier compares the RF voltage with the reference voltage VB ₀ to obtain an error signal, and the control loop converts the error signal into a drive signal with a variable duty cycle to drive the power switch tube NM2 to obtain the required output DC current; the control loop works at In the current PWM mode, when the duty is greater than 50%, the system will generate sub-harmonic oscillation, and the compensation loop suppresses the sub-harmonic oscillation to ensure the stability of the control loop; when the system is just started, the error amplifier is in an unbalanced state, and the system works at In the state of the maximum duty cycle, surge current and overshoot voltage will be generated, which may damage the LED lamp and driver chip. The soft start circuit can eliminate the surge current and overshoot voltage to ensure the safety of the LED lamp and driver chip; The input voltage VDD will change. When VDD is lower than a certain value, the chip will output a wrong signal, and the LED light will not work reliably. The undervoltage lockout module can turn off the driver chip when VDD is too low, ensuring the reliability of the LED light and the driver chip. sex.

The control loop consists of seven parts: reference source and bias module, error amplifier, PWM comparator, three-input AND gate AND, dimming latch module, N-type driver, and power switch NM2. The topological connection of the control loop is as follows: the voltage input terminal of the reference source and the bias module is connected to the VIN pin, the reference voltage output terminal VB ₀ is connected to the negative input terminal of the error amplifier; the feedback pin FB is connected to the positive input terminal of the error amplifier EA, and the EA The positive input terminal of the control loop is the feedback input terminal of the control loop, the output terminal of the error amplifier is connected to the negative input terminal of the PWM comparator, the positive input terminal of the PWM comparator is the compensation input terminal of the control loop, and the output terminal of the PWM comparator is connected to The input terminal of the three-input AND gate AND; the other two input terminals of AND are the soft-start voltage and current input terminals of the control circuit respectively, and the output terminal of AND is connected to the R input terminal of the dimming latch module, and the S terminal of the dimming latch module The input terminal is connected to the output terminal of the oscillator module, the Dim input terminal of the dimming latch module is connected to the ENB input terminal of the dormancy module, and the Dim terminal is the dimming input terminal of the control loop; the output terminal Q of the dimming latch module is connected to the N type The input terminal of the drive module; the N-type drive module outputs the drive signal and outputs it to the gate of the power switch NM2, the drain of NM2 is connected to the LX pin, the source of NM2 is grounded, and the drain of NM2 is the output terminal of the control loop . The control loop realizes converting the input voltage VDD into a constant current I _O output.

The compensation loop consists of three parts: a slope voltage module, a slope compensation module, and an inductor current detection module. The inductor current detection module is composed of NMOS transistor NM1, resistors R ₁ and R ₂ , the gate of MOS transistor NM1 is connected to the output terminal of the N-type drive module, the drain of NM1 is connected to the LX pin, and the drain of NM1 is the inductor current detection The input terminal of the module, the source of NM1 is connected to one end of _R1 ; the other end of _R1 is grounded through _R2 , and the common end of _R1 and _R2 is the output terminal V _SENSE of the inductor current detection module. V _SENSE is connected to the current input terminal of the slope compensation module; the input terminal of the slope voltage module is connected to the output terminal of the oscillator module, and the output terminal of the slope voltage module is connected to the voltage input terminal of the slope compensation module; the output terminal of the slope compensation module is connected to the PWM comparator The positive input end of the slope compensation module is the output end of the compensation loop, and the input end of the inductor current detection module is the input end of the compensation loop.

The soft start circuit consists of four parts: overvoltage comparator, soft start circuit, overcurrent protection comparator, and inductor current detection module. Its topological connection is as follows: the output terminal V _SENSE of the inductor current detection module is connected to the negative input terminal of the overcurrent protection comparator, and the output terminal of the overcurrent protection comparator is connected to the input terminal of the three-input AND gate AND; the input terminal of the inductor current detection module The output terminals of the overcurrent protection comparator are respectively the input terminal of the soft start circuit and the current output terminal; the clock input terminal of the soft start circuit is connected to the output terminal of the oscillator module, the voltage input terminal of the soft start circuit is connected to the VIN pin, and the voltage The output terminal V _ST is connected to the positive input terminal of the overcurrent protection comparator; the reference voltage output terminal V _B1 of the reference source and bias module is connected to the positive input terminal of the overvoltage protection comparator, and the OVP pin is connected in series with the resistor R _P1 and R _P2 Grounded, the common terminal of resistors R _P1 and R _P2 is connected to the negative input terminal of the overvoltage protection comparator, and the output terminal of the overvoltage protection comparator is the voltage output terminal of the soft start circuit and connected to the input terminal of the AND gate AND. The overvoltage protection comparator limits the amplitude of the output voltage, and the overcurrent protection comparator limits the peak value of the inductor current.

The topological connection of the auxiliary control module is as follows: VIN is connected to the input terminal of the undervoltage lockout circuit, the output signal UV of the undervoltage lockout circuit is connected to the input terminal of the control signal UV of the dormancy module; the pin EN is connected to the input terminal of the Schmitt trigger Smit, The output terminal of Smit is connected to the input terminal of reverse INV, the output terminal of INV is connected to the ENB input terminal of the sleep module, the clock input terminal of the sleep module is connected to the output terminal of the oscillator module; the SDB output signal of the sleep module is used for reference source and bias Shutdown of the module, SD output signal to shut down other modules (the connection between SD, SDB and other modules is drawn in the attached figure).

Figure 3 is a schematic diagram of the designed internal dimming circuit and sleep module of the LED driver chip. The dimming latch adopts switching PWM digital dimming scheme, and its internal connection is as follows. The R input terminal of the dimming latch is connected to the R input terminal of the D flip-flop 1 through the inverter INV1, and the S input terminal of the dimming latch is connected to the S input terminal of the D flip-flop 1 and the input terminal of the inverter INV2 at the same time. The output terminal of INV2 is connected to the input terminal of NAND gate NAND1, the input terminal of dimming latch Dim is connected to the input terminal of NAND gate NAND2; the Q output terminal of D flip-flop 1 is connected to the input terminal of NAND1, and the output terminal of NAND1 is connected to NAND2 The input terminal of NAND2 is the output terminal Q of the dimming latch. This dimming method changes the average value (duty cycle) of the output current, not the amplitude, which will not cause dispersion of the light emitted by the LED lamp, and will not affect the efficiency of the LED lamp. The internal connection of the sleep module is as follows: the ENB input terminal is connected to the S input terminal of D flip-flop 2 and the enable terminal EN of the counter at the same time, the clock input terminal of the counter is connected to the output terminal of the oscillator module, and the output terminal of the counter is connected to D flip-flop 2 The R input terminal of the D flip-flop 2 is connected to the input terminal of the inverter INV3 and the NAND gate NAND3 at the same time, the other input terminal of NAND3 is connected to the UV input terminal of the sleep module, INV3 outputs the SDB signal, and NAND3 outputs the SD signal . When EN is grounded and lasts for more than 4ms, the LED driver chip is completely turned off. When the undervoltage lockout signal is valid, the SD signal turns off all modules except the reference source and bias module, and the chip is locked and the output current is 0.

Accompanying drawing 4 shows the schematic diagram of the internal soft-start circuit of the designed LED driver chip. The drain of the N-type MOS transistor NMt is connected to the VIN pin, the source of the NMt is connected to the negative input terminal of the OPA; the positive input terminal of the OPA is connected to the reference source and the V _B1 output terminal of the bias module, and the resistors Rd0, Rd1, Rd2, Rd3 and Rd4 are connected in series, the end of Rd4 is grounded, and the end of Rd0 is connected to the negative input terminal of OPA; the common terminal of _Rd0 and _Rd1 is the output terminal V _ST of the soft start circuit; the drain of the switch MOS transistor NM _d1 is connected to The common terminal of resistors _Rd0 and _Rd1 , the drain of switch MOS transistor _NMd2 is connected to the common terminal of resistors _Rd1 and _Rd2 , the drain of switch MOS transistor _NMd3 is connected to the common terminal of resistors _Rd2 and _Rd3 , and the switch MOS The drain of NM _d4 is connected to the common terminal of resistors R _d3 and R _d4 ; the drain of NM _d1 is connected to the output terminal Q ₁ of delay module 1, the drain of NM _d2 is connected to the output terminal Q 2 of delay module ₂ , and the drain of NM _d1 is connected to the output terminal Q 1 of delay module 2. The pole is connected to the output terminal Q ₃ of the delay module 3 , the drain of the NM _d4 is connected to the output terminal Q 4 of the delay module ₄ ; the sources of the NM _d1 , NM _d2 , NM _d3 , and NM _d4 are uniformly grounded. The enable terminal EN of delay module 1 is connected to the SD output terminal of the sleep module, the enable terminal of delay module 2 is connected to the output terminal Q _{1 of delay module 1} , and the enable terminal of delay module 3 is connected to the delay module 2 The output terminal _Q2 , the enabling terminal of the delay module 4 is connected to the output terminal Q3 of the delay module ₃ ; the clock input terminals Clk of the delay modules 1, 2, 3, and 4 are connected to the output terminal of the oscillator module. When the circuit is started, Q _m will change from 1 to 0 in turn, the switching tube NM _dm will turn on and off in turn, and V _ST will generate a rising ladder voltage with 5 steps. Since the peak value of the inductor current is limited by the overcurrent protection comparator and V _ST , the current on the inductor is also in a step shape, and no surge current will be generated. At the same time, the charging speed of the output capacitor _CO is limited, so that it will not The output generates an overshoot voltage.

Figure 5 is a schematic diagram of the undervoltage lockout circuit of the LED driver chip shown: the reference source and the output terminal V _BP of the bias module are connected to the gates of the PMOS transistors PM _U1 and PM _U7 , and the source of PM _U1 is connected to the VIN pin. The drain of PMU1 is connected to the drain of NMOS transistor NM _U1 ; the source of NM _U1 is grounded, the gate is connected to the reference source and the output terminal VB _U2 of the bias module, the drain of NM _U1 is connected to the gate of PMOS transistor PM _U3 , PM The source of _U3 is connected to the drain of the PMOS transistor PM _U2 , the source of PM _U2 is connected to the VIN pin, the gate of PM _U2 is connected to the reference source and the output terminal VB _U2 of the bias module; the drain of PM _U3 is connected to the PMOS transistor PM _U4 The source of _PMu4 , the gate of PMu4 is connected to the output terminal of inverter INV4, the drain of PMu4 is connected to the drain of NMOS transistor NM _U2 ; the source of NM _U2 is grounded, and the gate is connected to the reference source and the output terminal of the bias module V _BN . The source of the PMOS transistor PM _U5 is connected to the VIN pin, the gate is connected to the reference source and the output terminal VB _U1 of the bias module, and the drain is connected to the source of the PMOS transistor PM _U6 ; the gate of PM _U6 is connected to the drain of NM _U1 , The drain is connected to the drain of NM _U2 . The source of PM _U7 is connected to the VIN pin, and the drain is connected to the drain of NMOS transistor NM _U3 ; the source of NM _U3 is grounded, and the gate is connected to the drain of NM _U2 . The source of the PMOS transistor PM _U8 is connected to the VIN pin, the gate is connected to the gate of the NMOS transistor NM _U4 and then connected to the drain of the NM _U3 , the drain is connected to the drain of the NM _U4 , and the source of the NM _U4 is connected to the NMOS transistor NM The drain of _U5 ; the source of NM _U5 is grounded, and the gate is connected to the gate of NM _U2 . The input terminal of the inverter INV4 is connected to the drain of the NM _U4 , and the output terminal is connected to the input terminal of the Schmitt trigger Smit2, and Smit2 outputs an undervoltage lockout signal UV. When the input voltage VDD is lower than VB _U1 +V _TH5 , the chip is locked and the output current is 0. When the input voltage rises back to VB _U2 +V _TH2 , the under-voltage lockout state is released to drive the chip to work normally, and the LED lights normally glow. V _TH2 and V _TH5 are the threshold voltages of PM _U2 and PM _U5 respectively.

The specific embodiments described herein are only examples to illustrate the spirit of the present invention. Those skilled in the technical field to which the utility model belongs can make various modifications or supplements to the described specific embodiments or adopt similar methods to replace them, but they will not deviate from the spirit of the utility model or go beyond the appended claims defined range.

Claims (5)

1. the Dimmable LED with soft start and undervoltage lockout circuit drives a chip, it is characterized in that, comprising: control loop, soft start loop, compensation circuit and auxiliary control module; The input termination control loop output of compensation circuit, the compensation input of control loop output termination compensation circuit; The voltage in soft start loop, soft start voltage, the current input terminal that current output terminal connects control loop, soft start loop and compensation circuit share inductive current detection module; The Enable Pin that enables to export other modules of termination of auxiliary control module, each module Enable Pin adopts classical switching regulator connected mode; The light modulation input of the light modulation output termination control loop of auxiliary control module;

This Dimmable LED drive chip comprise following six roots of sensation pin: power pins VIN, overvoltage protection input pin OVP, inductive current input pin LX, Voltage Feedback pin FB, dim signal input pin EN, pin GND; Wherein: VIN, GND is the common pin of all chip internal modules; The LX pin while is as the input pin of inductive current detection module, and the output pin of control loop; OVP pin is the voltage input pin in soft start loop, and EN pin is the control signal input of auxiliary control module; FB pin is the feedback signal input pin of control loop.

2. a kind of Dimmable LED with soft start and undervoltage lockout circuit according to claim 1 drives chip, it is characterized in that, described control loop comprises a reference source and biasing module, error amplifier, PWM comparator, three input AND, tunable optical latch module, N-type driver, power switch NM2; Topology connects as follows: the voltage input end of a reference source and biasing module connects VIN pin, reference voltage output end V _b0connect the negative input end of error amplifier EA; Feedback pin FB connects the positive input terminal of error amplifier EA, the positive input terminal of EA is the feedback input end of control loop, the negative input end of the output termination PWM comparator of error amplifier EA, the positive input terminal of PWM comparator is the compensation input of control loop, the input of the output termination three value and gate AND of PWM comparator; Other two inputs of AND are respectively soft start voltage, the current input terminal of control loop, the R input of the output termination light modulation latch module of AND, the output of the S input termination oscillator module of light modulation latch module, the ENB input of the Dim input termination sleep block of light modulation latch module, Dim end is the light modulation input of control loop; The output Q of light modulation latch module connects the input of N-type driver module; The grid of the output termination power switch NM2 of N-type driver module, the drain electrode of NM2 connects LX pin, the source ground of NM2, the drain electrode of NM2 is the output of control loop;

Described compensation circuit comprises ramp voltage module, slope compensation module, inductive current detection module; Topology connects as follows: the output V of current detection module _sENSEconnect the current input terminal of slope compensation module; The output of the input termination oscillator module of ramp voltage module, the voltage input end of the output termination slope compensation module of ramp voltage module; The positive input terminal of the output termination PWM comparator of slope compensation module, the output of slope compensation module is the output of compensation circuit, the input of inductive current detection module is compensation circuit input; Described inductive current detection module comprises metal-oxide-semiconductor NM1, resistance R ₁and R ₂, the grid of metal-oxide-semiconductor NM1 connects the output of N-type driver module, and the drain electrode of NM1 connects LX pin, and the drain electrode of NM1 is the input of inductive current detection module, and the source electrode of NM1 meets R ₁one end; R ₁the other end pass through R ₂ground connection, R ₁with R ₂common port be the output V of inductive current detection module _sENSE;

Described soft start loop comprises overvoltage protection comparator, soft starting circuit, overcurrent protection comparator, inductive current detection module; Topology connects as follows: the output V of inductive current detection module _sENSEtake over the negative input end of stream protection comparator, the input of the output termination three value and gate AND of overcurrent protection comparator; The output of the input of inductive current detection module and overcurrent protection comparator is respectively, the input in soft start loop and current output terminal; The input end of clock of soft starting circuit connects the output of oscillator module, and voltage input end connects VIN pin, voltage output end V _sTtake over stream protective ratio compared with positive input terminal; The reference voltage output end V of a reference source and biasing module _b1take over the positive input terminal of pressing protection comparator, OVP pin passes through resistance R _p1with resistance R _p2ground connection after series connection, resistance R _p1with resistance R _p2common port take over press protection comparator negative input end, the output of overvoltage protection comparator be soft start loop Voltage-output termination with door AND input;

Described auxiliary control module comprises under-voltage locking module, dormancy control module; Topology connects as follows: VIN connects the input of undervoltage lockout circuit, and the output signal U V of undervoltage lockout circuit connects the control signal UV input of sleep block; Pin EN connects the input of Schmidt trigger Smit, the input of the reverse INV of output termination of Smit, the output of INV is the ENB input of the light modulation output termination sleep block of auxiliary control module, and the input end of clock of sleep block connects the output of oscillator module; The Enable Pin of sleep block SDB output termination a reference source and biasing module, the Enable Pin of all the other modules of SD output termination.

3. a kind of Dimmable LED with soft start and undervoltage lockout circuit according to claim 2 drives chip, it is characterized in that, in described control loop, light modulation latch module adopts switching regulator PWM digital dimming mode, light modulation latch R input connects the R input of d type flip flop 1 by inverter INV1, light modulation latch S input connects the S input of d type flip flop 1 simultaneously, input with inverter INV2, the input of the output termination NAND gate NAND1 of INV2, the input of the Dim input termination NAND gate NAND2 of light modulation latch; The input of the Q output termination NAND1 of d type flip flop 1, the input of the output termination NAND2 of NAND1, the output of NAND2 is the output Q of light modulation latch.

4. a kind of Dimmable LED with soft start and undervoltage lockout circuit according to claim 2 drives chip, it is characterized in that, the inner topology of described soft starting circuit connects as follows: the drain electrode of N-type metal-oxide-semiconductor NMt connects VIN pin, the grid of NMt connects operational amplifier OPA output, and the source electrode of NMt connects the negative input end of OPA; The positive input termination a reference source of OPA and the V of biasing module _b1output, resistance R d0, Rd1,, Rd2, Rd3, Rd4 connect successively, the end ground connection of Rd4, the negative input end of the upper termination OPA of Rd0; R _d0with R _d1common port be the output V of soft starting circuit _sT; Switch MOS pipe NM _d1drain electrode connecting resistance R _d0with R _d1common port, switch MOS pipe NM _d2drain electrode connecting resistance R _d1with R _d2common port, switch MOS pipe NM _d3drain electrode connecting resistance R _d2with R _d3common port, switch MOS pipe NM _d4drain electrode connecting resistance R _d3with R _d4common port; NM _d1drain electrode meets the output Q of time delay module 1 ₁, NM _d2drain electrode meets the output Q of time delay module 2 ₂, NM _d1drain electrode meets the output Q of time delay module 3 ₃, NM _d4drain electrode meets the output Q of time delay module 4 ₄; NM _d1, NM _d2, NM _d3, NM _d4source class unify ground connection; The Enable Pin EN of time delay module 1 connects the SD output of sleep block, the output Q that enables termination time delay module 1 of time delay module 2 ₁, the output Q that enables termination time delay mould 2 of time delay module 3 ₂, the output Q that enables termination time delay module 3 of time delay module 4 ₃; The input end of clock Clk of time delay module 1,2,3,4 connects the output of oscillator module.

5. a kind of Dimmable LED with soft start and undervoltage lockout circuit according to claim 1 drives chip, it is characterized in that, the under-voltage locking inside modules topology in described auxiliary control module connects as follows: the output V of a reference source and biasing module _bPmeet PMOS pipe PM _u1with PM _u7grid, PM _u1source electrode meet VIN pin, PM _u1drain electrode meet NMOS pipe NM _u1drain electrode; NM _u1source ground, grid meets the output VB of a reference source and biasing module _u2, NM _u1drain electrode meet PMOS pipe PM _u3grid, PM _u3source electrode meet PMOS pipe PM _u2drain electrode, PM _u2source electrode meet VIN pin, PM _u2grid meet the output VB of a reference source and biasing module _u2; PM _u3drain electrode meet PMOS pipe PM _u4source electrode, PM _u4grid connect the output of inverter INV4, the drain electrode of PMu4 meets NMOS pipe NM _u2drain electrode; NM _u2source ground, grid meets the output V of a reference source and biasing module _bN; PMOS manages PM _u5source electrode connect VIN pin, grid meets the output VB of a reference source and biasing module _u1, drain electrode meets PMOS pipe PM _u6source electrode; PM _u6grid meet NM _u1drain electrode, drain electrode meets NM _u2drain electrode; PM _u7source electrode connect VIN pin, drain electrode meets NMOS pipe NM _u3drain electrode; NM _u3source ground, grid meets NM _u2drain electrode; PMOS manages PM _u8source electrode connect VIN pin, grid and NMOS pipe NM _u4grid be connected after meet NM _u3drain electrode, drain electrode and NM _u4drain electrode be connected, NM _u4source electrode meet NMOS pipe NM _u5drain electrode; NM _u5source ground, grid meets NM _u2grid; The input termination NM of inverter INV4 _u4drain electrode, the input of output termination Schmidt trigger Smit2, Smit2 output under-voltage locking signal UV.