CN203787409U - A semiconductor packaging structure - Google Patents

Abstract

The utility model relates to a semiconductor packaging structure, and belongs to the technical field of semiconductor packaging. The semiconductor packaging structure comprises a supporting body (1), the front surface of the supporting body (1) is provided with a groove (7), the front surface of the supporting body (1) and the bottom surface of the groove (7) are provided with conductive plating (6), the bottom surface of the groove (7) is provided with a chip (3) via solder (4), the front surface of the supporting body (1) is provided with a conversion plate (2) via the solder (4), the conversion plate (2) is positioned above the chip (3), and the bottom surface of the conversion plate (2) is connected with the front surface of the chip (3) via the solder (4). According to the semiconductor packaging structure, corresponding arrangement can be made according to an interface position of a printed circuit board of a client, and since the packaging structure is provided with the conversion plate, compared with the conventional packaging structure, the testing mode is more flexible.

Description

A semiconductor packaging structure

technical field

The utility model relates to a semiconductor packaging structure, which belongs to the technical field of semiconductor packaging.

Background technique

The problems that integrated circuits and power device packaging have been facing are mainly the rigid layout of output points and the unavoidable heat dissipation of power devices. The existing operation methods all adopt the method of wire bonding or flip-chip; the former operation process is lengthy, and must be encapsulated with plastic encapsulation, so the efficiency is low, and it leads to problems caused by these processes; the latter operation The flip-chip equipment required for the process is expensive, and the production speed is slow and inefficient. In addition, the products produced by the existing process lack flexibility.

Contents of the invention

The purpose of this utility model is to overcome the above-mentioned shortcomings and provide a semiconductor packaging structure, which can be arranged according to the interface position of the customer's printed circuit board. In addition, because the packaging structure has a conversion board, compared with the traditional packaging structure, The way of testing is more flexible. the

The purpose of this utility model is achieved in the following way: a semiconductor package structure, which includes a carrier, the front of the carrier is provided with a groove, the front of the carrier and the bottom of the groove are provided with a conductive coating, the bottom of the groove is A chip is provided on the upper surface through solder, and a conversion board is provided on the front side of the carrier through solder, the conversion board is located above the chip, and the bottom surface of the conversion board is connected to the front surface of the chip through solder.

At least one side around the groove is provided with an opening for heat convection with the outside.

A notch or a hole is opened on at least one side of the groove.

The peripheral area of the carrier is provided with an insulating layer.

The solder is conductive solder or non-conductive solder.

The chip is an integrated circuit chip, a discrete device chip or a combination thereof.

The conversion board is made of silicon substrate, metal, ceramics, pre-encapsulated substrate or printed circuit board material.

One side of the conversion board is arranged with welding points connected with the chip and the carrier, and the other side is arranged with output points.

The conversion plate adopts a double-layer or more than double-layer structure.

Protrusions or grooves are arranged on the bottom surface of the conversion plate.

The material of the carrier is metal, ceramic or pre-encapsulated substrate.

A protection layer is arranged around the chip.

Chips are stacked on the chip, and the upper and lower chips are electrically connected through a conversion board and solder.

Compared with the prior art, the utility model has the following beneficial effects:

1. In the utility model, the chip is in close contact with the carrier board, so the efficiency of heat conduction is greatly enhanced;

2. The distance between the chip welding surface and the output surface of the utility model is very short, so the electrical conduction efficiency is greatly improved;

3. The characteristics of the conversion board described in the utility model can make a very flexible circuit arrangement, and can be arranged according to the interface position of the customer's printed circuit board, so the flexibility of the output is ever-changing;

4. Multiple grooves can be set in the groove of the carrier of the utility model, so that more chips can be integrated, and at the same time, the problem of solder overflow will be obviously solved;

5. Compared with the flip-chip packaging process, the utility model can achieve product performance equivalent to the flip-chip process without flip-chip equipment;

6. Compared with the traditional packaging, the utility model does not need plastic sealing compound, so the process is greatly reduced, and the cost and efficiency of the whole process will be relatively improved;

7. There are openings for heat convection between the chip and the outside world around the groove of the utility model to balance the temperature inside and outside the package, so as to reflect the high heat dissipation characteristics of the utility model.

Description of drawings

FIG. 1 is a schematic diagram of a semiconductor packaging structure of the present invention.

FIG. 2 is a cross-sectional view of a semiconductor packaging structure of the present invention.

Fig. 3 is a layout diagram of the output surface of the conversion board in a preferred example of a semiconductor package structure of the present invention.

FIG. 4 is a layout diagram of a chip welding surface of a converter board in a preferred example of a semiconductor package structure of the present invention.

Fig. 5 is a schematic diagram of a multi-layer board, one of the applications of the conversion board in the semiconductor packaging structure of the present invention.

FIG. 6 and FIG. 7 are schematic diagrams of other two types of conversion boards of a semiconductor packaging structure of the present invention.

Fig. 8 and Fig. 9 are diagrams of opening types of a carrier of a semiconductor packaging structure of the present invention.

FIG. 10 is a schematic diagram of chip stacking combination of a semiconductor packaging structure of the present invention.

in:

Carrier 1

Conversion board 2

chip 3

Solder 4

insulation layer 5

Conductive coating 6

Groove 7

opening 8

Welding area 9

Through hole 10

Insulation area 11

Gap 12

Hole 13.

Detailed ways

Referring to Fig. 1 and Fig. 2, a semiconductor packaging structure of the present invention includes a carrier 1, a groove 7 is opened on the front of the carrier 1, and a conductive coating 6 is provided on the front of the carrier 1 and the bottom of the groove 7 , the bottom surface of the groove 7 is provided with a chip 3 through the solder 4, at least one side of the groove 7 is provided with an opening 8 for heat convection with the outside world, and the front of the carrier 1 is provided with a conversion plate 2 through the solder 4, The conversion board 2 is located above the chip 3, and the bottom surface of the conversion board 2 and the front of the chip 3 are connected by solder 4. When the customer needs or the products are short-circuited due to the short distance, the periphery of the carrier 1 The area may also be provided with an insulating layer 5 .

The chip 3 includes a drain (Drain), a source (Sours), and a gate (Gate). The bottom surface of the groove of the carrier 1 is a base island surface, and a conductive plating layer 6 is provided on the base island surface and the front welding surface. Dot solder paste (solder) on the conductive plating layer 6 of the groove base island of the carrier 1, chip 3 is mounted and combined with the solder paste to make the drain and the carrier conduct, the source, gate and carrier of the chip 3 1. Implant an appropriate amount of solder paste on the front welding surface to combine with the chip welding surface of the conversion board 2. The G pole, D pole, and S pole of the conversion board 2 are connected to the output surface of the conversion board according to the penetration method of the end customer.

In a preferred example, the chip size is 3.8 mm (length) × 2.8 mm (width) × 0.1 mm (thickness). In order to apply this structure to achieve better manufacturability, the series specifications of the carrier 1: 4.0 mm (length) × 3.0 mm (width)×0.2mm (thickness), groove specification: 3.5mm (groove length)×3.0 mm (groove width)×0.15 mm (groove depth), opening depth is 0.05 mm.

Referring to FIG. 3 , the output surface of the conversion board includes a welding area 9 and an insulating area 11 , and a through hole 10 is provided in the welding area 9 . The elasticity or flexibility of the conversion board lies in that the customer does not need to arrange the printed circuit board according to the distribution of the chip electrodes in this embodiment, and the customer only needs to provide the layout specification requirements of the electrodes of the printed circuit board. All requirements can be met.

Referring to FIG. 4 , the distribution of G, D, and S on the chip welding surface of the conversion board is more sufficient when it is combined with the chip in a planar shape.

Referring to Fig. 5, when two or more integrated circuit chips and discrete device chips are loaded into the carrier groove, the output of the conversion board will be more complicated than in this embodiment, so the multi-layer structure of the conversion board can reach infinite The feature of free output, the chip soldering surface and the output surface of the conversion board are conducted through the connection.

Referring to Fig. 6 and Fig. 7, the bottom surface of the conversion board is provided with protrusions or grooves, which can be adjusted accordingly according to the thickness of the chip.

Referring to Fig. 8 and Fig. 9, in order to form heat convection with the outside world, a gap 12 or a hole 13 for heat convection with the outside world can be provided on at least one side of the groove 7 instead of the opening 8, and the two can also exist at the same time.

Referring to FIG. 10 , when the chip is very thin, the chip 3 can be stacked in the groove 7 , and the upper and lower chips 3 are electrically connected through the conversion board 2 and the solder 4 .

Claims (10)

1. a semiconductor package, it is characterized in that: it comprises supporting body (1), described supporting body (1) front offers groove (7), described supporting body (1) front and groove (7) bottom surface are provided with conductive coating (6), described groove (7) is provided with chip (3) by scolder (4) on bottom surface, described supporting body (1) is positive is provided with change-over panel (2) by scolder (4), described change-over panel (2) is positioned at chip (3) top, between described change-over panel (2) bottom surface and chip (3) front, is connected by scolder (4).

2. a kind of semiconductor package according to claim 1, is characterized in that: described groove (7) has the opening (8) being provided with extraneous thermal convection around at least on one side.

3. a kind of semiconductor package according to claim 1 and 2, is characterized in that: described groove (7) has at least and on a side, offers gap (12) or hole (13).

4. a kind of semiconductor package according to claim 1 and 2, is characterized in that: described supporting body (1) outer peripheral areas is provided with insulating barrier (5).

5. a kind of semiconductor package according to claim 1 and 2, is characterized in that: described chip (3) adopts integrated circuit (IC) chip, discrete device chip or their combination.

6. a kind of semiconductor package according to claim 1 and 2, is characterized in that: the material of described change-over panel (2) is silicon substrate, metal, pottery, seals base material or printed circuit board material in advance.

7. a kind of semiconductor package according to claim 1 and 2, is characterized in that: described change-over panel (2) adopts double-deck or double-deck above structure.

8. a kind of semiconductor package according to claim 1 and 2, is characterized in that: described change-over panel (2) is provided with projection or groove on bottom surface.

9. a kind of semiconductor package according to claim 1 and 2, is characterized in that: described chip (3) is provided with protective layer around.

10. a kind of semiconductor package according to claim 1 and 2, is characterized in that: the upper closed assembly of described chip (3) has chip (3), between upper and lower chip (3), is electrically connected by change-over panel (2) and scolder (4).