CN203433407U - Usb clock generating circuit - Google Patents
Usb clock generating circuit Download PDFInfo
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- CN203433407U CN203433407U CN201320573449.8U CN201320573449U CN203433407U CN 203433407 U CN203433407 U CN 203433407U CN 201320573449 U CN201320573449 U CN 201320573449U CN 203433407 U CN203433407 U CN 203433407U
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Abstract
The utility model discloses a USB clock generating circuit used for generating a work clock of a USB main machine. The USB clock generating circuit comprises an inner oscillator, a controllable frequency divider, a frequency multiplier, a USB main machine interface and a frequency division controller; the USB main machine interface and USB peripherals are in configuration response according to the clock provided by the frequency multiplier; the frequency division controller is respectively connected with the USB main machine interface and the controllable frequency divider, the USB main machine interface is used for transmitting results of the configuration response between the USB main machine interface and the USB peripherals to the frequency division controller, and the frequency division controller is used for adjusting the frequency dividing ratio of the controllable frequency divider within a set frequency division range according to the response results fed back by the USB main machine interface, and after the frequency dividing ratio of the controllable frequency divider is adjusted, the frequency division controller controls the controllable frequency divider to carry out frequency division according to a fixed frequency dividing ratio. The USB clock generating circuit provided by the utility model can generate and configure a proper work clock for the USB main machine interface, thereby achieving high precision communication between the USB main machine interface and the USB peripherals without needing an external crystal oscillator.
Description
Technical field
The utility model relates to USB communication field, relates more specifically to a kind of USB clock generation circuit.
Background technology
USB is the abbreviation of English Universal Serial BUS, and Chinese implication is " USB (universal serial bus) ".USB is because its communication speed is fast, interface is simple, apply the advantages such as convenient, current PC, MP4, mobile phone, PDA(Personal Digital Assistant have been become, palm PC), one of the indispensable standard interface of the electronic equipment such as digital camera, printer, scanner, at aspects such as information communication and data transmission, obtained application widely.
Conventional communication system often all needs a relatively accurate clock source separately, utilize this clock source, in communication system inside, through logics such as frequency division or frequencys multiplication, produce the required major clock of communication system work again, the data stream of transmission is analyzed, gathered, to reach the object of data communication.USB communication system is no exception, in the high speed communication (communication speed reaches 480MHz and is high speed communication) of USB, and have relatively high expectations (± 0.5 ‰) of system to data transmission clock accuracy.Therefore, USB communication system is the clock scheme of external crystal oscillator in USB agent structure normally, outside produces the chip internal of the USB of clock (for example 12MHz) input accurately agent structure by crystal oscillator, chip internal, again by logic module frequencys multiplication such as PLL, produces the required high speed operation clock 480MHz of final system.
Due to crystal oscillator, the chip of USB agent structure just at least needs vacant two pins to crystal oscillator, like this, in the relatively less electronic product of some pins, just cannot adopt USB communication system to carry out communication.For example, in the electronic product of conventional SIM card and so on, pin generally only has 4～7, due to the needs of other systemic-function, makes cannot additionally reallocate two pins to crystal oscillator at all, thereby cannot adopt USB agent structure to carry out communication at all.
Moreover, along with the development of manufacture craft and the raising of designing technique, the more and more miniaturization of the volume of electronic product, and the pin of electronic product is also in continuous minimizing.And the relative SOC(System on of the volume of crystal oscillator element Chip, system level chip) chip is still larger, will restrict like this development of the high integration of compact of product.Thereby crystal oscillator becomes the application of restriction USB agent structure chip and the key factor of development.
Certainly, the chip internal of USB agent structure also can pass through RC/LC oscillator generated clock, and the system that offers is used.But due to the impact of RC/LC oscillator process deviation or other factors, final chip internal oscillator generated clock exists conventionally with design object ± 20% deviation, cannot meet the accuracy requirement that system is transmitted.
Therefore, be necessary to provide a kind of and improvedly for carry out the USB clock generation circuit of normal communication for USB communication system, overcome above-mentioned defect.
Utility model content
The purpose of this utility model is to provide a kind of USB clock generation circuit, the technical solution of the utility model, by produce a suitable work clock of configuration for usb host interface, makes just can make usb host interface and USB peripheral hardware carry out high-precision communication without external crystal-controlled oscillation.
For achieving the above object, of the present utility modelly provide a kind of USB clock generation circuit, for generation of the work clock of usb host, it comprises: internal oscillator, controllable frequency divider, frequency multiplier, usb host interface and frequency dividing control device; Described internal oscillator produces the clock with fixed frequency; Described controllable frequency divider is connected with described internal oscillator, and the clock that described internal oscillator is produced carries out frequency division by the frequency dividing ratio of setting; Described frequency multiplier is connected with described controllable frequency divider, and described frequency multiplier is pressed fixedly overtones band frequency multiplication by the clock after described controllable frequency divider frequency division; Described usb host interface is connected with described frequency multiplier, and described frequency multiplier is sent to described usb host interface by the clock after frequency multiplication, and clock and USB peripheral hardware that described usb host interface provides according to frequency multiplier are configured response; Described frequency dividing control device is connected with described usb host interface and described controllable frequency divider respectively, the result that described usb host interface is configured response by itself and USB peripheral hardware is sent to described frequency dividing control device, described frequency dividing control device is according to the response results of described usb host interface feedback, within the scope of the frequency dividing ratio of setting, regulate the frequency dividing ratio of described controllable frequency divider, and after the frequency dividing ratio of described controllable frequency divider has regulated, described frequency dividing control device is controlled described controllable frequency divider and is carried out frequency division by fixing frequency dividing ratio.
Preferably, described internal oscillator is RC oscillator or LC oscillator.
Preferably, described frequency dividing control device, according to the response results of described usb host interface feedback, regulates the frequency dividing ratio of described controllable frequency divider within the scope of the frequency dividing ratio of setting by sequential control from big to small.
Preferably, described frequency dividing control device records the response results of described usb host interface feedback under each clock, under all clocks of described usb host interface in frequency multiplier output, complete after a configuration response of taking turns with USB peripheral hardware, the all response results of described frequency dividing control device in taking turns according to one record the effective length of the clock of usb host interface and the response of USB peripheral configuration, and described frequency dividing control device is determined the fixedly frequency dividing ratio of described controllable frequency divider according to frequency dividing ratio corresponding to the midrange of described effective length.
Compared with prior art, a kind of USB clock generation circuit of the present utility model, because described frequency dividing control device is according to the response results of described usb host interface feedback, within the scope of the frequency dividing ratio of setting, regulate the frequency dividing ratio of described controllable frequency divider, and after the frequency dividing ratio of described controllable frequency divider has regulated, described frequency dividing control device is controlled described controllable frequency divider and is carried out frequency division by fixing frequency dividing ratio, thereby after all frequency dividing ratios within the scope of frequency dividing ratio are all used, described frequency dividing control device selects most suitable frequency dividing ratio as the fixedly frequency dividing ratio of controllable frequency divider according to the response results of described usb host interface feedback within the scope of frequency dividing ratio, thereby can meet setting requirement by the clock frequency of exporting after frequency divider frequency division described in making, also by the clock after described frequency multiplier frequency multiplication, can make described usb host interface and USB peripheral hardware normally carry out communication, and guaranteed the precision of communication.
By following description also by reference to the accompanying drawings, it is more clear that the utility model will become, and these accompanying drawings are used for explaining the utility model.
Accompanying drawing explanation
Fig. 1 is the structural representation that the utility model USB clock generation circuit is connected with USB peripheral hardware.
Embodiment
With reference now to accompanying drawing, describe embodiment of the present utility model, in accompanying drawing, similarly element numbers represents similar element.As mentioned above, the utility model provides a kind of USB clock generation circuit, USB clock generation circuit of the present utility model, by produce a suitable work clock of configuration for usb host interface, makes just can make usb host interface and USB peripheral hardware carry out high-precision communication without external crystal-controlled oscillation.
Please refer to Fig. 1, Fig. 1 is the structural representation that the utility model USB clock generation circuit is connected with USB peripheral hardware.USB clock generation circuit of the present utility model comprises internal oscillator, controllable frequency divider, frequency multiplier, frequency dividing control device and usb host interface; Described internal oscillator is connected with described controllable frequency divider, to produce the clock with fixed frequency, and sends the clock of generation to described controllable frequency divider; Described controllable frequency divider is connected with described frequency multiplier and frequency dividing control device respectively, and the clock that described controllable frequency divider produces described internal oscillator under the control of described frequency dividing control device carries out frequency division, and the clock after frequency division is sent to described frequency multiplier; Described frequency multiplier is connected with usb host interface, and described frequency multiplier by fixed frequency frequency multiplication, is sent to described usb host interface by the clock after frequency multiplication by the clock after described controllable frequency divider frequency division; Described usb host interface is configured response according to the clock and the USB peripheral hardware that receive, wherein, described usb host interface and USB peripheral hardware success configuration response, the frequency that is the clock exported by described frequency multiplier determines, if the frequency of the clock of described frequency multiplier output is in the scope of described SUB peripheral hardware success response, described usb host interface and USB peripheral hardware can successful configuration response, otherwise can not successful configuration response, and described usb host interface can the different response results of corresponding generation according to different configuration result; Described frequency dividing control device is connected with described controllable frequency divider and usb host interface respectively, the result that described usb host interface is configured according to itself and USB peripheral hardware (whether successful configuration response), in the frequency dividing ratio scope (frequency dividing ratio scope defaults in frequency dividing control device according to the error characteristics of internal oscillator) of setting, regulate the frequency dividing ratio of described controllable frequency divider, and after the frequency dividing ratio of described controllable frequency divider has regulated, described frequency dividing control device is controlled described controllable frequency divider and is carried out frequency division by fixing frequency dividing ratio.
Particularly, in preferred implementation of the present utility model, described internal oscillator is RC oscillator or LC oscillator, because RC oscillator or LC oscillator structure are simple, volume little and can production requirement the clock of frequency, therefore adopt RC oscillator or LC oscillator can not affect the development of the high integration of compact of USB system product; The clock of described RC oscillator or the output of LC oscillator is high frequency clock, be generally 300MHz, and the clock that described RC oscillator or LC oscillator produce has certain error, conventionally error maximum can reach ± 20%, also the scope of the clock of output is between 240MHz to 360MHz, and it is also 240-360 that the error of the clock of corresponding RC oscillator or the output of LC oscillator makes frequency dividing ratio scope default in described frequency dividing control device; The phase place of the clock that wherein said RC oscillator or LC oscillator produce can design according to the accuracy requirement of design, is generally four phase places, eight phase places, 16 phase places etc.Described controllable frequency divider is connected with described RC oscillator or LC oscillator, frequency dividing control device and frequency multiplier respectively, described controllable frequency divider is carried out frequency division by setting requirement to the clock of described RC oscillator or the output of LC oscillator, and the clock after frequency division is sent to described frequency multiplier; Wherein, the frequency dividing ratio of described controllable frequency divider can be by described frequency dividing control device regulating and controlling.Described frequency multiplier is also connected with described usb host interface, the clock that described frequency multiplier produces described controllable frequency divider frequency division is fixed the frequency multiplication of ratio, thereby produce a 480MHz high frequency clock, for described usb host interface provides work clock, make described usb host interface can normally carry out high speed communication; Significantly, there is error in the high frequency clock producing due to described RC oscillator or LC oscillator, therefore, after described controllable frequency divider frequency division, the clock of exporting through described frequency multiplier is again the clock of 480MHz accurately, also need, by described frequency dividing control device, the frequency dividing ratio of controllable frequency divider is specifically regulated to calibration, to guarantee the clock of the exportable 480MHz accurately of described frequency multiplier.In specific embodiment of the utility model, described controllable frequency divider, frequency multiplier, usb host interface and frequency dividing control device form a backfeed loop, thereby in use, frequency dividing control device is according to the frequency dividing ratio of response results regulating and controlling controllable frequency divider within the scope of frequency dividing ratio, and the response results that described frequency dividing control device is exported according to described usb host interface is by the frequency dividing ratio of controllable frequency divider described in sequential control from big to small, until described usb host interface under all clocks of frequency multiplier output, complete one take turns with the configuration response of USB peripheral hardware (be also each frequency division ratio be used once) within the scope of frequency dividing ratio after, the all response results of described frequency dividing control device in taking turns according to one record the effective length of the clock of usb host interface and the response of USB peripheral configuration, and described frequency dividing control device is determined the fixedly frequency dividing ratio of described controllable frequency divider according to frequency dividing ratio corresponding to the midrange of described effective length, at the device of frequency dividing control described in the utility model, at described usb host interface, under all clocks, complete after a configuration response of taking turns with USB peripheral hardware, just determine described usb host interface can with the clock effective length (also determining the fixedly frequency dividing ratio of controllable frequency divider) of USB peripheral hardware success configuration response, can effectively avoid because of the accident sudden change of a certain whole circuit of the moment, the frequency of one of them clock of described frequency multiplier output being fallen in the effective length of clock, and the effective length that is recorded and divided mistakenly clock by described frequency dividing control device, after taking turns configuration response by complete one, determine again the effective length of clock, can imitate the clock frequency in the improper scattered effective length that drops on clock of removing outside effective length, improve the degree of accuracy of the utility model USB clock generation circuit work.By above-mentioned repeatedly re-adjustments and selection, make the clock of the accurate and stable 480MHz of described frequency multiplier output, thus under the control of this clock described usb host interface can be accurately and USB carry out the high speed communication of various packets between transfering to other localities.
Below in conjunction with Fig. 1, a specific implementation process of the utility model USB clock generation circuit is described;
This clock generation circuit adopts the LC oscillator of a 300MHz, and this LC oscillator generates the clock of eight phase places, offers controllable frequency divider, for carrying out fractional frequency division; Wherein the frequency error of this clock may be larger, and maximum possible is ± 20%.Therefore the frequency dividing ratio scope of controllable frequency divider is also 300 ± 20%, be also 240-360, and concrete frequency division ratio take 1/8 as a step.Controllable frequency divider is carried out frequency division by the clock of LC oscillator input, generates the clock of an about 1MHz, exports to frequency multiplier, then frequency multiplication is to about 480MHz, offers usb host interface and uses.Described frequency dividing control device, according to the response results of described usb host interface feedback, regulates the frequency dividing ratio of described controllable frequency divider in frequency dividing ratio scope 240-360 by sequential control from big to small.; just start; the frequency dividing ratio that frequency dividing control device configures to described controllable frequency divider is 360; frequency multiplier generates corresponding clock and offers usb host interface; usb host interface is configured response according to this clock and USB peripheral hardware; and response results is fed back to frequency dividing control device, complete a configuration response under clock; Then, frequency dividing control device according to the result configuration frequency dividing ratio of previous response is
give described controllable frequency divider, frequency multiplier generates corresponding clock usb host interface is provided, and usb host interface is configured response according to this clock and USB peripheral hardware, and response results is fed back to frequency dividing control device, completes again a configuration response under clock; So repeat, the frequency dividing ratio of frequency dividing control device configuration is followed successively by
with
for single order reduces, until frequency dividing ratio is 240.So, with
on basis for single order, within the scope of the frequency dividing ratio of 240-360, usb host interface is carried out once to complete scanning with the configuration response of USB peripheral hardware under corresponding clock, the all response results of frequency dividing control device in taking turns according to one record the effective length of the clock of usb host interface and the response of USB peripheral configuration, and described frequency dividing control device determines according to frequency dividing ratio corresponding to the midrange of described effective length the frequency dividing ratio of controlling described controllable frequency divider; For example, the midrange of the effective length of clock is 480MHz, the frequency dividing ratio of the controllable frequency divider that this midrange is corresponding is 300, determine the 300 fixedly frequency dividing ratios that are controllable frequency divider, and in the follow-up work process of USB clock generation circuit of the present utility model, the frequency dividing ratio of all controlling described controllable frequency divider by described frequency dividing control device is 300, to guarantee allowing usb host carry out normal communication with USB peripheral hardware.
Above combination most preferred embodiment is described the utility model, but the utility model is not limited to the embodiment of above announcement, and should contain the various modifications of carrying out according to essence of the present utility model, equivalent combinations.
Claims (4)
1. a USB clock generation circuit, the work clock for generation of usb host, is characterized in that, comprising:
Internal oscillator, described internal oscillator produces the clock with fixed frequency;
Controllable frequency divider, described controllable frequency divider is connected with described internal oscillator, and the clock that described internal oscillator is produced carries out frequency division by the frequency dividing ratio of setting;
Frequency multiplier, described frequency multiplier is connected with described controllable frequency divider, and described frequency multiplier is pressed fixedly overtones band frequency multiplication by the clock after described controllable frequency divider frequency division;
Usb host interface, described usb host interface is connected with described frequency multiplier, and described frequency multiplier is sent to described usb host interface by the clock after frequency multiplication, and clock and USB peripheral hardware that described usb host interface provides according to frequency multiplier are configured response;
Frequency dividing control device, described frequency dividing control device is connected with described usb host interface and described controllable frequency divider respectively, the result that described usb host interface is configured response by itself and USB peripheral hardware is sent to described frequency dividing control device, described frequency dividing control device is according to the response results of described usb host interface feedback, within the scope of the frequency dividing ratio of setting, regulate the frequency dividing ratio of described controllable frequency divider, and after the frequency dividing ratio of described controllable frequency divider has regulated, described frequency dividing control device is controlled described controllable frequency divider and is carried out frequency division by fixing frequency dividing ratio.
2. USB clock generation circuit as claimed in claim 1, is characterized in that, described internal oscillator is RC oscillator or LC oscillator.
3. USB clock generation circuit as claimed in claim 1, it is characterized in that, described frequency dividing control device, according to the response results of described usb host interface feedback, regulates the frequency dividing ratio of described controllable frequency divider within the scope of the frequency dividing ratio of setting by sequential control from big to small.
4. USB clock generation circuit as claimed in claim 1, it is characterized in that, described frequency dividing control device records the response results of described usb host interface feedback under each clock, under all clocks of described usb host interface in frequency multiplier output, complete after a configuration response of taking turns with USB peripheral hardware, the all response results of described frequency dividing control device in taking turns according to one record the effective length of the clock of usb host interface and the response of USB peripheral configuration, and described frequency dividing control device is determined the fixedly frequency dividing ratio of described controllable frequency divider according to frequency dividing ratio corresponding to the midrange of described effective length.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320573449.8U CN203433407U (en) | 2013-09-16 | 2013-09-16 | Usb clock generating circuit |
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| CN201320573449.8U CN203433407U (en) | 2013-09-16 | 2013-09-16 | Usb clock generating circuit |
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| CN203433407U true CN203433407U (en) | 2014-02-12 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103455085A (en) * | 2013-09-16 | 2013-12-18 | 四川和芯微电子股份有限公司 | Circuit and method for generating USB host work clock |
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- 2013-09-16 CN CN201320573449.8U patent/CN203433407U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103455085A (en) * | 2013-09-16 | 2013-12-18 | 四川和芯微电子股份有限公司 | Circuit and method for generating USB host work clock |
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Granted publication date: 20140212 Termination date: 20190916 |
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| CF01 | Termination of patent right due to non-payment of annual fee |