CN203386099U - Band-gap reference circuit and television set - Google Patents

Abstract

The utility model discloses a bandgap reference circuit and a television set provided with the bandgap reference circuit. The circuit reference voltage generating module includes a reference voltage output terminal and a control voltage output terminal; The adjustment module of the circuit power supply rejection ratio and the startup module for starting the regulation module; the input terminal of the startup module is connected with the reference voltage output terminal of the reference voltage generating module and the output terminal of the regulation module, and the output terminal of the startup module is connected with the input terminal of the regulation module connected to the output terminal of the reference voltage generating module; the starting module outputs the starting voltage to the regulating module, and the regulating module starts the regulating module to run according to the starting voltage; after the regulating module is started, the output current is sent to the reference voltage generating module; the reference voltage generating module outputs according to the current The control voltage is sent to the adjustment module, and the adjustment module adjusts the magnitude of the current output to the reference voltage generation module according to the control voltage.

Description

Band gap reference circuit and TV set

technical field

The utility model relates to the technical field of integrated circuits, in particular to a bandgap reference circuit for generating constant voltage and a television set with the bandgap reference circuit.

Background technique

Accurate reference voltage sources play a very important role in AD, DA, comparators, power management chips and other analog circuits. Currently, there are many techniques for generating reference sources in the field of analog chip design, among which bandgap reference circuits are widely used to generate constant voltages as reference voltages. Bandgap voltage reference (Bandgap voltage reference) is to use a voltage and the temperature coefficient of the triode to offset each other to achieve a temperature-independent voltage reference. However, in addition to being independent of temperature changes, the reference voltage must also be independent of the input voltage. In the current design of the bandgap reference circuit, when the input voltage swing is too large, the output reference voltage will be affected. The circuit cannot realize a constant output reference voltage, resulting in poor stability of the circuit.

Utility model content

The main purpose of the utility model is to provide a bandgap reference circuit, aiming at improving the power supply rejection ratio of the bandgap reference circuit, stabilizing the reference voltage output by the circuit, and improving the stability of the circuit.

The utility model provides a bandgap reference circuit, the reference voltage generation module includes a reference voltage output terminal and a control voltage output terminal; the bandgap reference circuit also includes an adjustment module and a starting station for improving the power supply rejection ratio of the bandgap reference circuit The starting module of the regulating module; the input terminal of the starting module is connected with the reference voltage output terminal of the reference voltage generating module and the output terminal of the regulating module, and the output terminal of the starting module is connected with the input terminal of the regulating module and the output terminal of the reference voltage generating module connected; the starting module outputs the starting voltage to the regulating module, and the regulating module starts the regulating module to run according to the starting voltage; after the regulating module starts, the output current is sent to the reference voltage generating module; The current outputs the control voltage to the adjustment module, and the adjustment module adjusts the magnitude of the current output to the reference voltage generation module according to the control voltage.

Preferably, the adjustment module includes a mirroring unit, a first current generating unit and a second current generating unit; the mirroring unit includes a first input terminal, a second input terminal and an output terminal; the input terminal of the first current generating unit is connected to To the output terminal of the starting module and the control voltage output terminal of the reference voltage generating module, the output terminal is connected to the first input terminal of the mirroring unit; the input terminal of the second current generating unit is connected to the input terminal of the first current generating unit, The output terminal is connected to the second input terminal of the mirroring unit; the output terminal of the mirroring unit is connected to the reference voltage output terminal of the reference voltage generating module and the input terminal of the starting module; the starting module outputs the starting voltage to the regulating module, and the first current generates The module and the second current generating module start to operate according to the startup voltage and generate the first current and the second current respectively, and then output the first current and the second current to the mirror unit; the mirror unit generates the first current and the second current according to the first current and the The second current outputs a mirrored current to a reference voltage generating module; the reference source voltage generating module outputs a control voltage to the first current generating unit and the second current generating unit according to the mirrored current, so as to adjust the first current and the second current generating unit. magnitude of the second current.

Preferably, the reference voltage generation module includes an operational amplifier, a first resistor, a second resistor, a third resistor, a first bipolar junction transistor, a second bipolar junction transistor, and the first bipolar junction transistor The base and collector of the transistor are grounded, the emitter is connected to the reference voltage output terminal through the first resistor and the second resistor, the base and collector of the second bipolar junction transistor are grounded, and the emitter is connected to the reference voltage through the third resistor The voltage output terminal is connected; the common connection terminal of the first resistor and the second resistor is connected to the negative input terminal of the operational amplifier, and the common connection terminal of the third resistor and the emitter of the second bipolar junction transistor is connected to The positive input terminal of the operational amplifier, the output terminal of the operational amplifier is the control voltage output terminal.

Preferably, the first current generating unit includes a fourth resistor and a first field effect transistor, the first field effect transistor is an N-channel field effect transistor, and the gate of the first field effect transistor serves as the first current The input terminal of the generating unit, the source of the first field effect transistor is grounded through the fourth resistor, and the drain of the first field effect transistor is used as the output terminal of the first current generating unit.

Preferably, the second current generating unit includes a fifth resistor and a second field effect transistor, the second field effect transistor is an N-channel field effect transistor, and the gate of the second field effect transistor is used as the gate of the second current generating unit. The input terminal is also connected to the output terminal of the starting module, the source of the second field effect transistor is grounded through the fifth resistor, and the drain of the second field effect transistor is used as the output terminal of the second current generating unit.

Preferably, the mirror unit includes a third field effect transistor, a fourth field effect transistor, a fifth field effect transistor, a sixth field effect transistor and a seventh field effect transistor; the gate, the drain of the third field effect transistor pole, the gate of the fourth field effect transistor and the gate of the fifth field effect transistor are connected to the first input terminal; the source of the third field effect transistor, the source of the sixth field effect transistor, the seventh field effect transistor The source of the transistor is connected to an external DC power supply; the drain of the fourth field effect transistor, the gate of the sixth field effect transistor and the gate of the seventh field effect transistor are connected to the second input terminal; the fourth field effect transistor The source of the effect transistor is connected to the drain of the sixth field effect transistor, the source of the fifth field effect transistor is connected to the drain of the seventh field effect transistor, and the drain is connected to the output end of the mirror unit .

Preferably, the startup module includes an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor, an eleventh field effect transistor, a twelfth field effect transistor, a thirteenth field effect transistor, a fourteenth field effect transistor Field effect transistors, fifteenth field effect transistors, sixteenth field effect transistors, capacitors and inverters; the eighth field effect transistors and ninth field effect transistors are cascoded, and the source of the eighth field effect transistors It is connected to an external DC power supply, the drain is connected to the source of the tenth field effect transistor, the drain of the ninth field effect transistor is connected to the source of the eleventh field effect transistor, the gate of the tenth field effect transistor, the tenth field effect transistor The gates of the four field effect transistors are connected to the input terminals of the start-up module and grounded through capacitors, the drains of the tenth field effect transistor and the fourteenth field effect transistor are connected to the input terminals of the inverter, and the drains of the fourteenth field effect transistors are connected to the input terminals of the inverter. The gate of the eleventh field effect transistor is connected to the output terminal of the inverter, the drain is connected to the drain and the gate of the fifteenth field effect transistor and the gate of the sixteenth field effect transistor, and the fourteenth field effect transistor The source of the FET, the source of the fifteenth FET and the source of the sixteenth FET are grounded, the twelfth FET and the thirteenth FET are cascoded, the source of the twelfth and the The gate and the drain are connected to the drain of the sixteenth field effect transistor, and the drain of the thirteenth field effect transistor is connected to the output terminal of the start-up module.

The utility model also provides a TV set, which has a bandgap reference circuit, and the circuit includes a reference voltage generation module for generating a reference voltage, and the reference voltage generation module includes a reference voltage output terminal and a control voltage output terminal; The bandgap reference circuit also includes an adjustment module for improving the power supply rejection ratio of the bandgap reference circuit and a starting module for starting the adjustment module; the input terminal of the starting module is connected to the reference voltage output terminal of the reference voltage generation module and the output of the adjustment module terminal connection, the output terminal of the starting module is connected with the input terminal of the regulating module and the output terminal of the reference voltage generating module; the starting module outputs the starting voltage to the regulating module, and the starting voltage starts the regulating module; the reference voltage generates The module outputs the control voltage to the adjustment module, and then controls the current in the adjustment module. The adjustment module adjusts the current according to the control voltage and outputs the adjustment current to the reference voltage generation module, so as to stabilize the reference voltage output by the reference voltage module.

The utility model connects an adjustment module for improving the power supply rejection ratio of the bandgap reference circuit and a start-up module for triggering the adjustment module on the basis of the existing reference circuit generation module. The activation module triggers activation of the regulation module. When the input power supply voltage changes, the current in the regulation module will change accordingly, which causes the current input to the reference voltage generation module to change. At the same time, the reference voltage generation module will output the control voltage to the adjustment module according to the current size input to the reference voltage generation module, adjust the current size in the adjustment module, and then adjust the current input to the reference voltage generation module, thereby suppressing The influence of the change of the input power supply voltage on the output reference voltage is eliminated, and the power supply rejection ratio of the bandgap reference circuit is improved.

Description of drawings

Fig. 1 is a structural block diagram of the utility model bandgap reference circuit module;

Fig. 2 is a structural block diagram of the adjustment module in Fig. 1;

Fig. 3 is a structural schematic diagram of an embodiment of the utility model bandgap reference circuit;

FIG. 4 is a schematic structural diagram of an embodiment of the starting module in FIG. 3 .

The realization of the purpose of the utility model, functional characteristics and advantages will be further described in conjunction with the embodiments and with reference to the accompanying drawings.

Detailed ways

The technical solution of the present utility model will be further described below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described here are only used to explain the utility model, and are not intended to limit the utility model.

The utility model proposes a bandgap reference circuit.

Referring to Fig. 1, Fig. 1 is a structural block diagram of the bandgap reference circuit module of the present invention. The bandgap reference circuit provided by this embodiment includes a reference voltage generation module 1 for generating a reference voltage, and the reference voltage generation module 1 includes a reference voltage output terminal vref and a control voltage output terminal OP_out; the bandgap reference circuit also includes a function for increasing the bandgap The adjustment module 2 of the power supply rejection ratio of the reference circuit and the startup module 3 of the startup regulation module 2; the input terminal of the startup module 3 is connected with the reference voltage output terminal vref of the reference voltage generation module 1 and the output terminal of the regulation module 2, and the output of the startup module 3 The terminal is connected to the input terminal of the regulation module 2 and the output terminal of the reference voltage generation module 1; the startup module 3 outputs the startup voltage to the regulation module 2, and the regulation module 2 starts the regulation module 2 to run according to the startup voltage; the regulation module 2 outputs after startup The current is supplied to the reference voltage generation module 1; the reference voltage generation module 3 outputs a control voltage to the adjustment module 2 according to the current, and the adjustment module 2 adjusts the current output to the reference voltage generation module 1 according to the control voltage.

It should be noted that the bandgap reference circuit produces a constant voltage, and the voltage value hardly changes with the input voltage and temperature. When the swing of the power supply voltage is too large, the self-regulation of the circuit can still ensure that the output voltage value is almost constant. Thereby improving the power supply rejection ratio (Power Supply Rejection Ratio). Such voltages are often used in AD, DA, comparators, power management chips, etc. To further illustrate, the reference voltage generation module 1 includes two output terminals, one of which is a reference voltage output vref for outputting a reference voltage, and the output reference voltage is used for triggering the start-up module 3 and the final voltage used. The other terminal is a control voltage output terminal OP_out for outputting a control voltage, and the output control voltage is used for controlling and regulating the current of the module 2 .

In this embodiment, the reference voltage generation module 1 generates a reference voltage, the reference voltage output terminal vref of this module is connected to the input terminal of the starting module 3 , and the control voltage output terminal OP_out of this module is connected to the adjustment module 2 . When the external input DC power supply VCC rises from 0 to VCC, the reference voltage generated by the reference voltage generating module 1 is first output to the starting module 3 to trigger the starting module 3 . After the starting module 3 is triggered, the starting module 3 starts to work, thereby starting the regulating module 2 . It should be noted that after the adjustment module 2 is activated, the activation module 3 will stop working until the next trigger source comes. When the voltage of the input power source changes, if the adjustment module 2 is not connected to the circuit, the current of the reference voltage generation module 1 will change accordingly, so that the output reference voltage will also change accordingly, thus affecting the stability of the reference voltage sex.

The adjustment module 2 is connected to this circuit, and when the input power supply voltage increases, the current in the adjustment module 2 will increase, thereby causing the current in the input reference voltage generation module 1 to increase. The reference voltage generation module 1 will control the voltage output terminal OP_out to output the control voltage to the adjustment module 2 according to the current flowing into the reference voltage generation module 1, so as to control and reduce the current in the adjustment module 2, so that the input reference voltage generation module 1 The current decreases, thereby reducing the reference voltage output by the reference voltage generating module 1 , thereby suppressing the influence of the increase of the input voltage on the output reference voltage. When the input power supply voltage decreases, the current in the regulation module 2 will decrease, thus causing the current in the input reference voltage generating module 1 to decrease. The reference voltage generation module 1 outputs the control voltage to the adjustment module 2 according to the magnitude of the current flowing into the reference voltage generation module 1, and increases the current in the adjustment module 2, thereby increasing the current input to the reference voltage generation module 1, thereby suppressing Effect of increasing input supply voltage on output reference voltage.

The utility model connects an adjustment module 2 for improving the power supply rejection ratio of the bandgap reference circuit and a starting module 3 that triggers the adjustment module 2 on the basis of the existing reference circuit generation module 1 . The starting module 3 triggers the starting regulation module 2 . When the input power supply voltage changes, the current in the regulation module 2 will change accordingly, which causes the current input to the reference voltage generating module 1 to change. At the same time, the reference voltage generation module 1 will output the control voltage to the adjustment module 2 according to the current size input to the reference voltage generation module 1, adjust the current size in the adjustment module 2, and then adjust the input to the reference voltage generation module 1 The current, thereby suppressing the influence of the change of the input power supply voltage on the output reference voltage, and improving the power supply rejection ratio of the bandgap reference circuit.

Referring to FIG. 2 , FIG. 2 is a structural block diagram of the adjustment module in FIG. 1 . Specifically, the adjustment module 2 includes a mirroring unit 21, a first current generating unit 22 and a second current generating unit 23; the mirroring unit 21 includes a first input terminal, a second input terminal and an output terminal; the input of the first current generating unit 22 terminal is connected to the output terminal of the starting module 3 and the control voltage output terminal of the reference voltage generating module 1, and the output terminal is connected to the first input terminal of the mirror unit 21; the input terminal of the second current generating unit 23 is connected to the first current generating unit The input end of 22, the output end is connected to the second input end of mirroring unit 21; The output end of mirroring unit 21 is connected with the reference voltage output end of reference voltage generation module 1 and the input end of starting module 3; Starting module 3 outputs starting voltage To the regulating module 2, the first current generating module 22 and the second current generating module 23 start to operate according to the starting voltage and generate the first current and the second current respectively, and then output the first current and the second current to the mirror unit 21; The unit 21 outputs the mirror current to the reference voltage generation module 1 according to the first current and the second current; the reference source voltage generation module 1 outputs the control voltage to the first current generation unit 22 and the second current generation unit 23 according to the mirror current, so as to The magnitudes of the first current and the second current are adjusted.

In this embodiment, both the first current generating unit 22 and the second current generating unit 23 are connected to the starting module 3 , and the starting module 3 starts the first current generating unit 22 and the second current generating unit 23 . And the reference voltage generation module 1 outputs the control voltage to the first current generation unit 22 and the second current generation unit 23, so that the current in the first current generation unit 22 is equal to the current in the second current generation unit 23, and at the same time can be controlled by The voltage regulates the magnitude of the currents of the first current generating unit 22 and the second current generating unit 23 . Furthermore, the mirroring unit 21 is respectively connected to the first current generating unit 22 and the second current generating unit 23 and the mirroring unit 21 is connected to the reference voltage generating module 1 . The mirroring unit 21 mirrors the currents generated by the first current generating unit 22 and the second current generating unit 23 to obtain a current for outputting to the reference voltage generating module 1 . Therefore, the current input by the mirroring unit 21 to the reference voltage generating module 1 is equal to the currents in the first current generating unit 22 and the second current generating unit 23 . If the control voltage output by the reference voltage generating module 1 changes, the currents in the first current generating unit 22 and the second current generating unit 23 change simultaneously, resulting in a change in the current input from the mirroring unit 21 to the reference voltage generating module 1 . It should be noted that the control voltage changes with the current input to the reference voltage generating module 1 changes.

Referring to FIG. 3 , FIG. 3 is a structural diagram of an embodiment of the bandgap reference circuit of the present invention. Specifically, the reference voltage generating module 1 includes an operational amplifier OP, a first resistor R1, a second resistor R2, a third resistor R3, a first bipolar junction transistor Q101, a second bipolar junction transistor Q102, and a first bipolar junction transistor Q102. The base and the collector of the junction transistor Q101 are grounded, the emitter is connected to the reference voltage output terminal vref through the first resistor R1 and the second resistor R2, the base and the collector of the second bipolar junction transistor Q102 are grounded, and the emitter The third resistor R3 is connected to the reference voltage output terminal vref; the common connection terminal of the first resistor R1 and the second resistor R2 is connected to the negative input terminal of the operational amplifier OP, and the third resistor R3 and the second bipolar junction transistor Q102 emit The common connection terminal of the pole is connected to the positive input terminal of the operational amplifier OP, and the output terminal of the operational amplifier OP is the control voltage output terminal OP_out.

In this embodiment, both the first BJT Q101 and the second BJT Q102 are PNP transistors. The reference voltage generating module 1 includes two output terminals, one is a reference voltage output terminal vref, and the other is a control voltage output terminal OP_out. The reference voltage output terminal vref outputs the reference voltage, and the control voltage output terminal OP_out outputs the control voltage. When the input voltages at both ends of the operational amplifier OP are approximately equal, the output of the operational amplifier OP is relatively stable, that is, the output control voltage is relatively stable, so that the currents of the first current generating unit 22 and the second current generating unit 23 are stable. The current input by the mirroring unit 21 to the reference voltage generating module 1 varies with the first current generating unit 22 and the second current generating unit 23 . Therefore, it can be deduced that the current input to the reference voltage generating module 1 is stable, so that the output reference voltage is relatively stable.

Specifically, the first current generating unit 22 includes a fourth resistor R4 and a first field effect transistor Q1, the first field effect transistor Q1 is an N-channel field effect transistor, and the gate of the first field effect transistor Q1 is used as the first current generator The input terminal of the unit 22 , the source of the first field effect transistor Q1 is grounded through the fourth resistor R4 , and the drain of the first field effect transistor Q1 is used as the output terminal of the first current generating unit 22 .

In this embodiment, the first field effect transistor Q1 is an N-channel field effect transistor. The gate of the first field effect transistor Q1 is connected to the control voltage output terminal OP_out of the reference voltage generating module 1 and also connected to the starting module 3 . The start-up module 3 outputs a voltage to the gate of the first FET Q1 , so that the gate-source voltage difference (V _GS ) is greater than the turn-on voltage of the first FET Q1 , thereby triggering and starting the first current generating unit 22 . The drain current of the first field effect transistor Q1 serves as the trunk current of the first current generating unit 22 . The control voltage output terminal OP_out of the reference voltage generation module 1 outputs the control voltage to the gate of the first field effect transistor Q1 as the voltage of the gate of the first field effect transistor Q1 . Those skilled in the art should know that the drain current of the NMOS transistor is proportional to the gate-source voltage difference (V _GS ). In this embodiment, the first field effect transistor Q1 is an N-channel enhancement type MOS transistor. The larger the V _GS , the larger the drain current. Therefore, when the control voltage output by the reference voltage generating module 1 changes, the drain current also changes accordingly, so that the current in the first current generating unit 22 changes. Therefore, the magnitude of the current of the first current generating unit 22 can be adjusted by adjusting the magnitude of the control voltage of the reference voltage generating module 1 .

Specifically, the second current generating unit 23 includes a fifth resistor R5 and a second field effect transistor Q2, the second field effect transistor Q2 is an N-channel field effect transistor, and the gate of the second field effect transistor Q2 serves as the second current generating unit The input terminal of 23 is also connected to the output terminal of the starting module 3, the source of the second field effect transistor Q2 is grounded through the fifth resistor R5, and the drain of the second field effect transistor Q2 is used as the output of the second current generating unit 23 end.

In this embodiment, the circuit structure, principle and beneficial effects of the second current generating unit 23 are substantially the same as those of the first current generating unit 22 in the previous embodiment, and will not be repeated here. Please refer to the first current generating unit 22 to understand the second current generating unit 23 .

Specifically, the mirror unit 21 includes a third field effect transistor Q3, a fourth field effect transistor Q4, a fifth field effect transistor Q5, a sixth field effect transistor Q6, and a seventh field effect transistor Q7; the gate of the third field effect transistor Q3 The electrode, the drain, the gate of the fourth field effect transistor Q4 and the gate of the fifth field effect transistor Q5 are connected to the first input terminal; the source of the third field effect transistor Q3 and the source of the sixth field effect transistor Q6 , the source of the seventh field effect transistor Q7 is connected to the external DC power supply VCC; the drain of the fourth field effect transistor Q4, the gate of the sixth field effect transistor Q6 and the gate of the seventh field effect transistor Q7 are connected to the The second input terminal; the source of the fourth field effect transistor Q4 is connected to the drain of the sixth field effect transistor Q6, the source of the fifth field effect transistor Q5 is connected to the drain of the seventh field effect transistor Q7, and the drain is connected to the drain of the seventh field effect transistor Q7. The output terminal of the mirror unit 21 is connected.

In this embodiment, the third FET Q3 , the fourth FET Q4 , the fifth FET Q5 , the sixth FET Q6 and the seventh FET Q7 are all P-channel FETs. The starting module 3 triggers and starts the first current generating unit 22 and the second current generating unit 23 . The first field effect transistor Q1 and the second field effect transistor Q2 are turned on. It is known that the source of the third field effect transistor Q3 is connected to the external DC power supply VCC, and the gate of the third field effect transistor Q3 is connected to the drain of the first field effect transistor Q1. The first FET Q1 is turned on, so that the voltage difference between the source and the gate of the third FET Q3 is greater than the turn-on voltage, so that the third FET Q3 is turned on. The source of the sixth field effect transistor Q6 is connected to the external DC power supply VCC, and the gate of the sixth field effect transistor Q6 is connected to the drain of the second field effect transistor Q2. The second field effect transistor Q2 is turned on, so that the voltage difference between the source and the gate of the sixth field effect transistor Q6 is greater than the turn-on voltage, so that the third field effect transistor Q3 is turned on. Similarly, it can be analyzed that the fourth FET Q4 , the fifth FET Q5 , and the seventh FET Q7 are all turned on, which will not be repeated here. According to the above structure description, the third FET Q3 , the fourth FET Q4 , the fifth FET Q5 , the sixth FET Q6 and the seventh FET Q7 are cascode structures. Therefore, the current flowing through the fifth FET Q5 and the seventh FET Q7 is equal to the current flowing through the fourth FET Q4 and the sixth FET Q6 . It should be noted that the current flowing through the fourth FET Q4 and the sixth FET Q6 is equal to the current of the second current generating unit 23; the current flowing through the fifth FET Q5 and the seventh FET Q7 It is equal to the current input to the reference voltage generation module 1. Therefore, the above structure makes the current input to the reference voltage generating module 1 equal to the current of the second current generating unit 23 . When the current in the second current generating unit 23 changes, the current input to the reference voltage generating module 1 will change accordingly.

Referring to FIG. 4 , FIG. 4 is a schematic structural diagram of an embodiment of the starting module in FIG. 3 . Specifically, the starting module 3 includes an eighth field effect transistor Q8, a ninth field effect transistor Q9, a tenth field effect transistor Q10, an eleventh field effect transistor Q11, a twelfth field effect transistor Q12, a thirteenth field effect transistor Q13, the fourteenth field effect transistor Q14, the fifteenth field effect transistor Q15, the sixteenth field effect transistor Q16, the capacitor C and the inverter I1; the eighth field effect transistor Q8 and the ninth field effect transistor Q9 share a common source Gate, the source of the eighth field effect transistor Q8 is connected to the external DC power supply VCC, the drain is connected to the source of the tenth field effect transistor Q10, the drain of the ninth field effect transistor Q9 is connected to the eleventh field effect transistor Q11 The source is connected, the gate of the tenth field effect transistor Q10, the gate of the fourteenth field effect transistor Q14 are connected to the input terminal of the start-up module 3, and grounded through the capacitor C, the drain of the tenth field effect transistor Q10, the gate of the fourteenth field effect transistor Q14 The drain of the fourteenth field effect transistor Q14 is connected to the input end of the inverter I1, the gate of the eleventh field effect transistor Q11 is connected to the output end of the inverter I1, and the drain is connected to the output end of the fifteenth field effect transistor Q15. The drain, the gate, and the gate of the sixteenth field effect transistor Q16 are connected, the source of the fourteenth field effect transistor Q14, the source of the fifteenth field effect transistor Q15, and the source of the sixteenth field effect transistor Q16 Grounding, the twelfth field effect transistor Q12 and the thirteenth field effect transistor Q13 are cascoded, the source of the twelfth field effect transistor Q12 is connected to the external DC power supply VCC, and the gate and drain are connected to the sixteenth field effect transistor Q13. The drain of the transistor Q16 and the drain of the thirteenth field effect transistor Q13 are connected to the output end of the starting module 3 .

In this embodiment, it should be noted that the eighth field effect transistor Q8, the ninth field effect transistor Q9, the tenth field effect transistor Q10, the eleventh field effect transistor Q11, the twelfth field effect transistor Q12 and the tenth field effect transistor The three field effect transistors Q13 are all P-channel field effect transistors. The fourteenth field effect transistor Q14, the fifteenth field effect transistor Q15 and the sixteenth field effect transistor Q16 are N-channel field effect transistors.

When starting module 3 works:

When vref is at a low level, the bias voltage bias acts on the eighth field effect transistor Q8 and the ninth field effect transistor Q9, so that the eighth field effect transistor Q8 and the ninth field effect transistor Q9 are turned on. The tenth field effect transistor Q10 is turned on, and the fourteenth field effect transistor Q14 is turned off. Therefore, the input terminal of the inverter I1 is at a high level, so the output terminal of the inverter I1 is at a low level, and the eleventh field effect transistor Q11 is turned on. At this time, OP_out has an output, and the startup module 3 is working. It should be noted that when the startup module 3 is working, only the fourteenth field effect transistor Q14 is in the off state, and other MOS transistors are in the on state.

When starting module 3 does not work:

When vref rises to the point that the tenth field effect transistor Q10 is turned off and the fourteenth field effect transistor Q14 is turned on. At this time, the input terminal of the inverter I1 is at low level, the output terminal of the inverter I1 is at high level, and the eleventh field effect transistor Q11 is turned off, so OP_out has no output, and the startup module 3 does not work. To further illustrate, when the start-up module 3 is not working, the fourteenth field effect transistor Q14 is in the conduction state, other MOS transistors are not working, and no current flows.

The utility model also provides a TV set, which includes a bandgap reference circuit. As a matter of course, the TV set of this embodiment adopts the above-mentioned technical solution of the bandgap reference circuit, and the TV set is connected to the power supply rejection ratio of the bandgap reference circuit on the basis of the existing reference circuit generation module 1. The regulating module 2 and the starting module 3 that triggers the regulating module 2. The starting module 3 triggers the starting regulation module 2 . When the input power supply voltage changes, the current in the regulation module 2 will change accordingly, which causes the current input to the reference voltage generating module 1 to change. At the same time, the reference voltage generation module 1 will output the control voltage to the adjustment module 2 according to the current size input to the reference voltage generation module 1, adjust the current size in the adjustment module 2, and then adjust the input to the reference voltage generation module 1 The current, thereby suppressing the influence of the change of the input power supply voltage on the output reference voltage, improving the power supply rejection ratio of the bandgap reference circuit, thereby increasing the circuit stability of the TV.

The above are only preferred embodiments of the present utility model, and are not therefore limiting the patent scope of the present utility model. All equivalent structural transformations made by using the utility model specification and accompanying drawings are directly or indirectly used in other related technologies. Fields are all included in the scope of patent protection of the utility model in the same way.

Claims (8)

1. a band-gap reference circuit, comprise the reference voltage generation module that produces reference voltage, and described reference voltage generation module comprises reference voltage output end and controls voltage output end; It is characterized in that, described band-gap reference circuit also comprises the adjustment module for improving the band-gap reference circuit Power Supply Rejection Ratio and starts the startup module of described adjustment module; Described startup module input is connected with the reference voltage output end of reference voltage generation module and the output terminal of adjustment module, and the output terminal that starts module is connected with the output terminal of reference voltage generation module with the input end of adjustment module; Described startup module output trigger voltage is to described adjustment module, and described adjustment module starts the adjustment module operation according to described trigger voltage; Adjustment module outputs current to the reference voltage generation module after starting; Described reference voltage generation module is controlled voltage to adjustment module according to described electric current output, and described adjustment module exports the size of current of described reference voltage generation module to according to described control voltage-regulation.

2. band-gap reference circuit as claimed in claim 1, is characterized in that, described adjustment module comprises mirror image unit, the first current generating unit and the second current generating unit; Described mirror image unit comprises first input end, the second input end and output terminal; The input end of the first current generating unit is connected to the output terminal of startup module and the control voltage output end of reference voltage generation module, and output terminal is connected to the first input end of mirror image unit; The input end of described the second current generating unit is connected to the input end of the first current generating unit, and output terminal is connected to the second input end of mirror image unit; The output terminal of mirror image unit is connected with the input end that starts module with the reference voltage output end of reference voltage generation module; Start module output trigger voltage to adjustment module, described the first current generating module and the second current generating module start operation and produce respectively the first electric current and the second electric current according to trigger voltage, then export described the first electric current and the second electric current to mirror image unit; Described mirror image unit according to described the first electric current and the second electric current outgoing mirror image current to the reference voltage generation module; Described reference voltage generation module is controlled voltage to described the first current generating unit and the second current generating unit, to regulate the size of described the first electric current and the second electric current according to described image current output.

3. band-gap reference circuit as claimed in claim 1, it is characterized in that, described reference voltage generation module comprises amplifier, the first resistance, the second resistance, the 3rd resistance, the first bipolar junction transistor, the second bipolar junction transistor, the base stage of described the first bipolar junction transistor and grounded collector, emitter is connected with reference voltage output end with the second resistance through the first resistance, the base stage of described the second bipolar junction transistor and grounded collector, emitter is connected with reference voltage output end through the 3rd resistance; The public connecting end of described the first resistance and the second resistance is connected to the negative input end of described amplifier, the public connecting end of described the 3rd resistance and the second bipolar junction transistor emitter is connected to the positive input terminal of described amplifier, and the output terminal of described amplifier is for controlling voltage output end.

4. band-gap reference circuit as claimed in claim 2, it is characterized in that, described the first current generating unit comprises the 4th resistance and the first field effect transistor, described the first field effect transistor is N channel field-effect pipe, and the grid of described the first field effect transistor is as the input end of the first current generating unit, the source electrode of described the first field effect transistor is through the 4th resistance eutral grounding, and the drain electrode of described the first field effect transistor is as the output terminal of the first current generating unit.

5. band-gap reference circuit as claimed in claim 2, it is characterized in that, described the second current generating unit comprises the 5th resistance and the second field effect transistor, described the second field effect transistor is N channel field-effect pipe, the grid of the second field effect transistor is as the input end of the second current generating unit, also with the output terminal of described startup module, be connected, the source electrode of the second field effect transistor is through described the 5th resistance eutral grounding simultaneously, and the drain electrode of the second field effect transistor is as the output terminal of the second current generating unit.

6. band-gap reference circuit as claimed in claim 2, is characterized in that, described mirror image unit comprises the 3rd field effect transistor, the 4th field effect transistor, the 5th field effect transistor, the 6th field effect transistor and the 7th field effect transistor; The grid of the grid of described the 3rd field effect transistor, drain electrode, the 4th field effect transistor and the grid of the 5th field effect transistor are connected in described first input end; The source electrode of the source electrode of the source electrode of the 3rd field effect transistor, the 6th field effect transistor, the 7th field effect transistor is connected in external dc power; The grid of the grid of the drain electrode of described the 4th field effect transistor, the 6th field effect transistor and the 7th field effect transistor is connected in described the second input end; The source electrode of the 4th field effect transistor is connected with the drain electrode of the 6th field effect transistor, and the source electrode of described the 5th field effect transistor is connected with the drain electrode of described the 7th field effect transistor, and drain electrode is connected with the output terminal of described mirror image unit.

7. band-gap reference circuit as claimed in claim 1, it is characterized in that, described startup module comprises the 8th field effect transistor, the 9th field effect transistor, the tenth field effect transistor, the 11 field effect transistor, the 12 field effect transistor, the 13 field effect transistor, the 14 field effect transistor, the 15 field effect transistor, the 16 field effect transistor, electric capacity and phase inverter, described the 8th field effect transistor, the 9th field effect transistor cascade, the source electrode of the 8th field effect transistor is connected with external dc power, drain electrode is connected with the source electrode of the tenth field effect transistor, the drain electrode of the 9th field effect transistor is connected with the source electrode of the 11 field effect transistor, the grid of the tenth field effect transistor, the grid of the 14 field effect transistor is connected with the input end of described startup module, and through capacity earth, the drain electrode of the tenth field effect transistor, the drain electrode of the 14 field effect transistor is connected to the input end of phase inverter, the grid of the 11 field effect transistor is connected with the output terminal of reverser, the drain electrode of drain electrode and the 15 field effect transistor, the grid of grid and the 16 field effect transistor connects, the source electrode of the 14 field effect transistor, the source electrode of the 15 field effect transistor and the source ground of the 16 field effect transistor, the 12 field effect transistor and the 13 field effect transistor cascade, dozenth source electrode is connected with external dc power, grid is connected the drain electrode of the 16 field effect transistor with drain electrode, the drain electrode of the 13 field effect transistor is connected with the output terminal of described startup module.

8. a televisor, is characterized in that, comprises the described band-gap reference circuit of 1 to 7 any one.

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