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CN203217048U - An embedded system test and analysis platform for linear array CCD devices - Google Patents

An embedded system test and analysis platform for linear array CCD devices Download PDF

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Publication number
CN203217048U
CN203217048U CN 201320255390 CN201320255390U CN203217048U CN 203217048 U CN203217048 U CN 203217048U CN 201320255390 CN201320255390 CN 201320255390 CN 201320255390 U CN201320255390 U CN 201320255390U CN 203217048 U CN203217048 U CN 203217048U
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China
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unit
dvi
linear array
array ccd
embedded system
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孔成
王鑫
何振宇
何晨
杨苏文
陈炜
王欣
沙浪
王玥
徐立中
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Hohai University HHU
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Hohai University HHU
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Abstract

The utility model relates to an embedded system testing/analyzing platform of a linear array charge coupled device (CCD). The embedded system testing/analyzing platform includes the following components of: a linear array CCD image source; a decoding chip which is connected with the linear array CCD image source; a storage unit which is connected with the decoding chip and is use for storing image decoding data; an FPGA unit which is connected with the storage unit and is used for providing pixel, synchronization and control signals for displaying images; a DVI encoding array unit which is connected with the FPGA unit and comprises a plurality of DVI encoders, wherein the plurality of DVI encoders are correspondingly connected with a plurality of display units respectively through DVI data lines; and an ARM unit which is connected with the display units, the FPGA unit and the storage unit, and is used for controlling image playback and detecting the number of the display units so as to control image segmentation of the FPGA unit. The embedded system testing/analyzing platform of the linear array CCD of the utility model is used for detecting the pixels of high-resolution images, such that whether the pixels are lost or not can be judged.

Description

一种线阵CCD器件的嵌入式系统测试分析平台An embedded system test and analysis platform for linear array CCD devices

技术领域 technical field

本实用新型涉及一种线阵CCD器件的嵌入式系统测试分析平台。 The utility model relates to an embedded system test and analysis platform of a linear array CCD device.

背景技术 Background technique

近几年激光和光学技术发展迅速,涉及领域也逐渐扩大。电荷耦合器件(CCD)是光电传感器里比较热门的一种器件,线阵CCD器件是将许多像素单元排列成一线,拍摄过程是将对象沿CCD线的阵垂直方向做一维相对运动从而扫描出一幅二维图像,由于线阵CCD器件的像素很高,在远距离拍摄时,很小的一个目标通常只有几个像素大小,但是图像的每个目标都可能具有一定的意义,不能丢失,所以需要一套测试分析平台对线阵CCD器件的拍摄结果进行精确测试分析。 In recent years, laser and optical technologies have developed rapidly, and the fields involved have gradually expanded. Charge-coupled device (CCD) is a relatively popular device in photoelectric sensors. A linear array CCD device arranges many pixel units in a line. The shooting process is to scan the object along the vertical direction of the CCD line in one-dimensional relative motion. For a two-dimensional image, due to the high pixel of the linear array CCD device, when shooting at a long distance, a small target is usually only a few pixels in size, but each target in the image may have a certain meaning and cannot be lost. Therefore, a test and analysis platform is needed to accurately test and analyze the shooting results of the linear array CCD device.

实用新型内容 Utility model content

本实用新型要解决的技术问题是提供一种线阵CCD器件的嵌入式系统测试分析平台,该嵌入式系统测试分析平台解决了对高精度的线阵CCD器件的像素点进行精确测试分析的技术问题。 The technical problem to be solved by the utility model is to provide an embedded system test and analysis platform for linear array CCD devices. question.

为了解决上述技术问题,本实用新型提供了一种1、一种线阵CCD器件的嵌入式系统测试分析平台,包括: In order to solve the above-mentioned technical problems, the utility model provides a kind of 1, an embedded system test and analysis platform of a linear array CCD device, comprising:

线阵CCD图像源,与该线阵CCD图像源相连的用于对图像信号进行解码的解码芯片,与该解码芯片相连的用于存储图像解码数据的存储单元,与该存储单元相连的用于提供显示图像的像素、同步、控制信号的FPGA单元,与该FPGA单元相连的DVI编码阵列单元,该DVI编码阵列单元包括若干DVI编码器; A line array CCD image source, a decoding chip connected to the line array CCD image source for decoding image signals, a storage unit connected to the decoding chip for storing image decoding data, and a storage unit connected to the storage unit for An FPGA unit that provides pixels for displaying images, synchronization, and control signals, and a DVI encoding array unit connected to the FPGA unit, the DVI encoding array unit includes several DVI encoders;

所述若干DVI编码器通过DVI数据线分别与若干显示单元对应相连; The plurality of DVI encoders are correspondingly connected to a plurality of display units through DVI data lines;

与所述各显示单元、FPGA单元、存储单元相连的用于控制图像回放,及检测显示单元的数量,以控制所述FPGA单元分割图像的ARM单元。 An ARM unit connected to each display unit, FPGA unit and storage unit for controlling image playback and detecting the number of display units to control the FPGA unit to divide images.

本实用新型的上述技术方案相比现有技术具有以下优点: (1)通过存储单元能够对线阵CCD图像源拍摄的数据进行回放检测,以测试线阵CCD器件的性能;(2)通过与若干DVI编码器相连的显示单元、ARM单元,可以对高分辨率图像的像素进行检测、分析,以判断是否存在像素丢失的情况。 Compared with the prior art, the above-mentioned technical solution of the utility model has the following advantages: (1) through the storage unit, the data captured by the linear array CCD image source can be replayed and detected, so as to test the performance of the linear array CCD device; The display unit and ARM unit connected to several DVI encoders can detect and analyze the pixels of high-resolution images to determine whether there is pixel loss.

附图说明 Description of drawings

为了使本实用新型的内容更容易被清楚的理解,下面根据的具体实施例并结合附图,对本实用新型作进一步详细的说明,其中 In order to make the content of the utility model easier to understand clearly, the utility model will be further described in detail according to the specific embodiments below in conjunction with the accompanying drawings, wherein

图1为本实用新型的线阵CCD器件的嵌入式系统测试分析平台的结构框图。 Fig. 1 is a structural block diagram of an embedded system test and analysis platform of a linear array CCD device of the present invention.

具体实施方式 Detailed ways

下面结合附图及实施例对本发明进行详细说明: Below in conjunction with accompanying drawing and embodiment the present invention is described in detail:

见图1,一种线阵CCD器件的嵌入式系统测试分析平台,包括: See Figure 1, an embedded system test and analysis platform for linear array CCD devices, including:

线阵CCD图像源,与该线阵CCD图像源相连的用于对图像信号进行解码的解码芯片,与该解码芯片相连的用于存储图像解码数据的存储单元,与该存储单元相连的用于提供显示图像的像素、同步、控制信号的FPGA单元,与该FPGA单元相连的DVI编码阵列单元,该DVI编码阵列单元包括若干DVI编码器; A line array CCD image source, a decoding chip connected to the line array CCD image source for decoding image signals, a storage unit connected to the decoding chip for storing image decoding data, and a storage unit connected to the storage unit for An FPGA unit that provides pixels for displaying images, synchronization, and control signals, and a DVI encoding array unit connected to the FPGA unit, the DVI encoding array unit includes several DVI encoders;

所述若干DVI编码器通过DVI数据线分别与若干显示单元对应相连; The plurality of DVI encoders are correspondingly connected to a plurality of display units through DVI data lines;

与所述各显示单元、FPGA单元、存储单元相连的用于控制图像回放,及检测显示单元的数量,以控制所述FPGA单元分割图像的ARM单元。 An ARM unit connected to each display unit, FPGA unit and storage unit for controlling image playback and detecting the number of display units to control the FPGA unit to divide images.

所述FPGA单元提供分割图像对应的图像的像素、同步、控制信号。 The FPGA unit provides pixels, synchronization, and control signals of images corresponding to the segmented images.

所述线阵CCD图像源通过CAMERA_LINK接口与解码芯片相连,该解码芯片采用DS90CR286,FPGA采用Xilinx公司的Spartan系列芯片,DVI解码器采用SII1162芯片,DVI数据线采用DVI-D线缆,ARM芯片采用S3C2440A,显示单元可以采用液晶显示屏,或者大屏幕液晶电视。 The linear array CCD image source is connected with the decoding chip through the CAMERA_LINK interface, the decoding chip adopts DS90CR286, the FPGA adopts the Spartan series chip of Xilinx Company, the DVI decoder adopts the SII1162 chip, the DVI data line adopts the DVI-D cable, and the ARM chip adopts For S3C2440A, the display unit can be a liquid crystal display or a large-screen LCD TV.

显然,上述实施例仅仅是为清楚地说明本实用新型所作的举例,而并非是对本实用新型的实施方式的限定。对于所属领域的普通技术人员来说,在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。而这些属于本实用新型的精神所引伸出的显而易见的变化或变动仍处于本实用新型的保护范围之中。 Apparently, the above-mentioned embodiments are only examples for clearly illustrating the utility model, rather than limiting the implementation of the utility model. For those of ordinary skill in the art, other changes or changes in different forms can be made on the basis of the above description. It is not necessary and impossible to exhaustively list all the implementation manners here. And these obvious changes or variations derived from the spirit of the present invention are still within the protection scope of the present invention.

Claims (1)

1. the embedded system test analysis platform of a line array CCD device is characterized in that comprising:
The linear array CCD image source, the decoding chip that being used for of linking to each other with this linear array CCD image source decodes to picture signal, the storage unit that is used for the memory image decoded data that links to each other with this decoding chip, the pixel that link to each other with this storage unit be used for providing shows image, synchronously, the FPGA unit of control signal, the DVI encoding array unit that links to each other with this FPGA unit, this DVI encoding array unit comprises some DVI scramblers;
Described some DVI scramblers are corresponding with some display units continuous respectively by the DVI data line;
What link to each other with described each display unit, FPGA unit, storage unit is used for the control image reproducing, and detects the quantity of display unit, to control the ARM unit of described FPGA unit split image.
CN 201320255390 2013-05-10 2013-05-10 An embedded system test and analysis platform for linear array CCD devices Expired - Fee Related CN203217048U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107613260A (en) * 2017-09-29 2018-01-19 北京航天福道高技术股份有限公司 A kind of IMAQ analysis system and method
CN110226095A (en) * 2016-10-20 2019-09-10 Y软股份公司 The general automation of embedded system is tested

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110226095A (en) * 2016-10-20 2019-09-10 Y软股份公司 The general automation of embedded system is tested
CN107613260A (en) * 2017-09-29 2018-01-19 北京航天福道高技术股份有限公司 A kind of IMAQ analysis system and method

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Granted publication date: 20130925

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