CN203217048U - An embedded system test and analysis platform for linear array CCD devices - Google Patents
An embedded system test and analysis platform for linear array CCD devices Download PDFInfo
- Publication number
- CN203217048U CN203217048U CN 201320255390 CN201320255390U CN203217048U CN 203217048 U CN203217048 U CN 203217048U CN 201320255390 CN201320255390 CN 201320255390 CN 201320255390 U CN201320255390 U CN 201320255390U CN 203217048 U CN203217048 U CN 203217048U
- Authority
- CN
- China
- Prior art keywords
- unit
- dvi
- linear array
- array ccd
- embedded system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000003709 image segmentation Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 2
- 102100026816 DNA-dependent metalloprotease SPRTN Human genes 0.000 description 1
- 101710175461 DNA-dependent metalloprotease SPRTN Proteins 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
Images
Landscapes
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
技术领域 technical field
本实用新型涉及一种线阵CCD器件的嵌入式系统测试分析平台。 The utility model relates to an embedded system test and analysis platform of a linear array CCD device.
背景技术 Background technique
近几年激光和光学技术发展迅速,涉及领域也逐渐扩大。电荷耦合器件(CCD)是光电传感器里比较热门的一种器件,线阵CCD器件是将许多像素单元排列成一线,拍摄过程是将对象沿CCD线的阵垂直方向做一维相对运动从而扫描出一幅二维图像,由于线阵CCD器件的像素很高,在远距离拍摄时,很小的一个目标通常只有几个像素大小,但是图像的每个目标都可能具有一定的意义,不能丢失,所以需要一套测试分析平台对线阵CCD器件的拍摄结果进行精确测试分析。 In recent years, laser and optical technologies have developed rapidly, and the fields involved have gradually expanded. Charge-coupled device (CCD) is a relatively popular device in photoelectric sensors. A linear array CCD device arranges many pixel units in a line. The shooting process is to scan the object along the vertical direction of the CCD line in one-dimensional relative motion. For a two-dimensional image, due to the high pixel of the linear array CCD device, when shooting at a long distance, a small target is usually only a few pixels in size, but each target in the image may have a certain meaning and cannot be lost. Therefore, a test and analysis platform is needed to accurately test and analyze the shooting results of the linear array CCD device.
实用新型内容 Utility model content
本实用新型要解决的技术问题是提供一种线阵CCD器件的嵌入式系统测试分析平台,该嵌入式系统测试分析平台解决了对高精度的线阵CCD器件的像素点进行精确测试分析的技术问题。 The technical problem to be solved by the utility model is to provide an embedded system test and analysis platform for linear array CCD devices. question.
为了解决上述技术问题,本实用新型提供了一种1、一种线阵CCD器件的嵌入式系统测试分析平台,包括: In order to solve the above-mentioned technical problems, the utility model provides a kind of 1, an embedded system test and analysis platform of a linear array CCD device, comprising:
线阵CCD图像源,与该线阵CCD图像源相连的用于对图像信号进行解码的解码芯片,与该解码芯片相连的用于存储图像解码数据的存储单元,与该存储单元相连的用于提供显示图像的像素、同步、控制信号的FPGA单元,与该FPGA单元相连的DVI编码阵列单元,该DVI编码阵列单元包括若干DVI编码器; A line array CCD image source, a decoding chip connected to the line array CCD image source for decoding image signals, a storage unit connected to the decoding chip for storing image decoding data, and a storage unit connected to the storage unit for An FPGA unit that provides pixels for displaying images, synchronization, and control signals, and a DVI encoding array unit connected to the FPGA unit, the DVI encoding array unit includes several DVI encoders;
所述若干DVI编码器通过DVI数据线分别与若干显示单元对应相连; The plurality of DVI encoders are correspondingly connected to a plurality of display units through DVI data lines;
与所述各显示单元、FPGA单元、存储单元相连的用于控制图像回放,及检测显示单元的数量,以控制所述FPGA单元分割图像的ARM单元。 An ARM unit connected to each display unit, FPGA unit and storage unit for controlling image playback and detecting the number of display units to control the FPGA unit to divide images.
本实用新型的上述技术方案相比现有技术具有以下优点: (1)通过存储单元能够对线阵CCD图像源拍摄的数据进行回放检测,以测试线阵CCD器件的性能;(2)通过与若干DVI编码器相连的显示单元、ARM单元,可以对高分辨率图像的像素进行检测、分析,以判断是否存在像素丢失的情况。 Compared with the prior art, the above-mentioned technical solution of the utility model has the following advantages: (1) through the storage unit, the data captured by the linear array CCD image source can be replayed and detected, so as to test the performance of the linear array CCD device; The display unit and ARM unit connected to several DVI encoders can detect and analyze the pixels of high-resolution images to determine whether there is pixel loss.
附图说明 Description of drawings
为了使本实用新型的内容更容易被清楚的理解,下面根据的具体实施例并结合附图,对本实用新型作进一步详细的说明,其中 In order to make the content of the utility model easier to understand clearly, the utility model will be further described in detail according to the specific embodiments below in conjunction with the accompanying drawings, wherein
图1为本实用新型的线阵CCD器件的嵌入式系统测试分析平台的结构框图。 Fig. 1 is a structural block diagram of an embedded system test and analysis platform of a linear array CCD device of the present invention.
具体实施方式 Detailed ways
下面结合附图及实施例对本发明进行详细说明: Below in conjunction with accompanying drawing and embodiment the present invention is described in detail:
见图1,一种线阵CCD器件的嵌入式系统测试分析平台,包括: See Figure 1, an embedded system test and analysis platform for linear array CCD devices, including:
线阵CCD图像源,与该线阵CCD图像源相连的用于对图像信号进行解码的解码芯片,与该解码芯片相连的用于存储图像解码数据的存储单元,与该存储单元相连的用于提供显示图像的像素、同步、控制信号的FPGA单元,与该FPGA单元相连的DVI编码阵列单元,该DVI编码阵列单元包括若干DVI编码器; A line array CCD image source, a decoding chip connected to the line array CCD image source for decoding image signals, a storage unit connected to the decoding chip for storing image decoding data, and a storage unit connected to the storage unit for An FPGA unit that provides pixels for displaying images, synchronization, and control signals, and a DVI encoding array unit connected to the FPGA unit, the DVI encoding array unit includes several DVI encoders;
所述若干DVI编码器通过DVI数据线分别与若干显示单元对应相连; The plurality of DVI encoders are correspondingly connected to a plurality of display units through DVI data lines;
与所述各显示单元、FPGA单元、存储单元相连的用于控制图像回放,及检测显示单元的数量,以控制所述FPGA单元分割图像的ARM单元。 An ARM unit connected to each display unit, FPGA unit and storage unit for controlling image playback and detecting the number of display units to control the FPGA unit to divide images.
所述FPGA单元提供分割图像对应的图像的像素、同步、控制信号。 The FPGA unit provides pixels, synchronization, and control signals of images corresponding to the segmented images.
所述线阵CCD图像源通过CAMERA_LINK接口与解码芯片相连,该解码芯片采用DS90CR286,FPGA采用Xilinx公司的Spartan系列芯片,DVI解码器采用SII1162芯片,DVI数据线采用DVI-D线缆,ARM芯片采用S3C2440A,显示单元可以采用液晶显示屏,或者大屏幕液晶电视。 The linear array CCD image source is connected with the decoding chip through the CAMERA_LINK interface, the decoding chip adopts DS90CR286, the FPGA adopts the Spartan series chip of Xilinx Company, the DVI decoder adopts the SII1162 chip, the DVI data line adopts the DVI-D cable, and the ARM chip adopts For S3C2440A, the display unit can be a liquid crystal display or a large-screen LCD TV.
显然,上述实施例仅仅是为清楚地说明本实用新型所作的举例,而并非是对本实用新型的实施方式的限定。对于所属领域的普通技术人员来说,在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。而这些属于本实用新型的精神所引伸出的显而易见的变化或变动仍处于本实用新型的保护范围之中。 Apparently, the above-mentioned embodiments are only examples for clearly illustrating the utility model, rather than limiting the implementation of the utility model. For those of ordinary skill in the art, other changes or changes in different forms can be made on the basis of the above description. It is not necessary and impossible to exhaustively list all the implementation manners here. And these obvious changes or variations derived from the spirit of the present invention are still within the protection scope of the present invention.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320255390 CN203217048U (en) | 2013-05-10 | 2013-05-10 | An embedded system test and analysis platform for linear array CCD devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320255390 CN203217048U (en) | 2013-05-10 | 2013-05-10 | An embedded system test and analysis platform for linear array CCD devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203217048U true CN203217048U (en) | 2013-09-25 |
Family
ID=49206573
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201320255390 Expired - Fee Related CN203217048U (en) | 2013-05-10 | 2013-05-10 | An embedded system test and analysis platform for linear array CCD devices |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203217048U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107613260A (en) * | 2017-09-29 | 2018-01-19 | 北京航天福道高技术股份有限公司 | A kind of IMAQ analysis system and method |
| CN110226095A (en) * | 2016-10-20 | 2019-09-10 | Y软股份公司 | The general automation of embedded system is tested |
-
2013
- 2013-05-10 CN CN 201320255390 patent/CN203217048U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110226095A (en) * | 2016-10-20 | 2019-09-10 | Y软股份公司 | The general automation of embedded system is tested |
| CN107613260A (en) * | 2017-09-29 | 2018-01-19 | 北京航天福道高技术股份有限公司 | A kind of IMAQ analysis system and method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104750451B (en) | Splicer and splice displaying system | |
| US11694114B2 (en) | Real-time deployment of machine learning systems | |
| CN102929572B (en) | A kind of realize the seamless spliced method of the many projections of giant-screen and splicing fusion device | |
| CN108307190A (en) | Method, apparatus for testing display and computer program product | |
| CN110336973B (en) | Information processing method and device, electronic device and medium | |
| US20120075409A1 (en) | Image segmentation system and method thereof | |
| CN113705665A (en) | Training method of image transformation network model and electronic equipment | |
| EP3998931A1 (en) | Real-time deployment of machine learning systems | |
| US8194146B2 (en) | Apparatuses for capturing and storing real-time images | |
| CN102098544B (en) | Image display method of television wall | |
| CN203217048U (en) | An embedded system test and analysis platform for linear array CCD devices | |
| CN110809885A (en) | Image sensor defect detection | |
| US20240007611A1 (en) | Stereoscopic display device for matching polarized viewing angles and video streams and stereoscopic display method thereof | |
| CN105578179B (en) | The system and method for detecting DMD display frame rates | |
| TW200720643A (en) | Scintillation measuring method of display device and scintillation measuring device | |
| CN112135123A (en) | Video quality detection method and device | |
| CN103108169A (en) | Mobile terminal which display video frame rate in real time and achieving method thereof | |
| KR101849853B1 (en) | High speed transmission apparatus of large volume image data | |
| US9927225B2 (en) | Measuring dynamic displacement | |
| US20170116697A1 (en) | Digital watermark information detecting device and digital watermark information detecting method | |
| CN116016901B (en) | Resolution testing method, device, equipment and storage medium | |
| CN116520987A (en) | VR content problem detection method, device, equipment and storage medium | |
| CN110533577A (en) | Fisheye image correction method and device | |
| CN103475819B (en) | Ultra-high definition intelligent video camera and image data splicing method thereof | |
| CN113610779B (en) | Vibrating mirror state detection method, device, equipment and computer readable storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130925 Termination date: 20140510 |