The low-noise voltage-controlled oscillator biasing circuit
Technical field
The utility model relates to a kind of low-noise voltage-controlled oscillator biasing circuit.
Background technology
As shown in Figure 1, traditional biasing circuit is generally finished dividing potential drop by resistance, but owing to the noise of the bleeder circuit that is comprised of series resistance R4, R5 is relatively large, need to carry out filtering at the outside large electric capacity (capacitor C 4 among Fig. 1) that increases of biasing circuit, the output pin that this has increased biasing circuit has increased circuit cost.
The utility model content
The purpose of this utility model is to overcome the deficiencies in the prior art, a kind of Novel low noise voltage controlled oscillator biasing circuit is provided, adopt BJT pipe and the height of base stage and collector electrode short circuit to be worth poly resistance as partial pressure unit, the biasing circuit output noise is less, and needn't externally add filter capacitor, only need to add little electric capacity in biasing circuit inside and get final product, can effectively reduce the pin of chip, reduce cost.
The purpose of this utility model is achieved through the following technical solutions: the low-noise voltage-controlled oscillator biasing circuit, be used in conjunction with voltage controlled oscillator, for the voltage controlled oscillator in the frequency source circuit provides biasing, it is by constant voltage source, bleeder circuit and filter capacitor C1 form, described bleeder circuit comprises the successively resistance R 1 of series connection, the first bipolar junction transistor BJT1 and the second bipolar junction transistor BJT2, resistance R 1 is connected with the collector electrode of the first bipolar junction transistor BJT1, the emitter of the first bipolar junction transistor BJT1 is connected with the collector electrode of the second bipolar junction transistor BJT2, the collector electrode of the first bipolar junction transistor BJT1 and its base stage are joined, and the collector electrode of the second bipolar junction transistor BJT2 and its base stage are joined;
The first dividing potential drop output branch road in parallel between the base stage of resistance R 1 and the first bipolar junction transistor BJT1; The second dividing potential drop output branch road in parallel between the base stage of the emitter of the first bipolar junction transistor BJT1 and the second bipolar junction transistor BJT2; After exporting branch road and the second dividing potential drop is exported branch circuit parallel connection, the first dividing potential drop is connected in series with filter capacitor C1.
Further, described resistance R 1 is high value poly resistance.
Further, be respectively equipped with switch on described the first dividing potential drop output branch road and the second dividing potential drop output branch road.
The emitter of the second bipolar junction transistor BJT2 and filter capacitor C1 be ground connection respectively.
The beneficial effects of the utility model are:
The structure that the BJT pipe of employing base stage and collector electrode short circuit is connected with high value poly resistance is as partial pressure unit, compare with traditional biasing circuit that carries out dividing potential drop by the resistance series connection, the biasing circuit output noise is less, and needn't externally add filter capacitor, only needing to add little electric capacity in biasing circuit inside gets final product, can effectively reduce the pin of chip, reduce cost.
Description of drawings
Fig. 1 is traditional bias circuit construction schematic diagram;
Fig. 2 is the utility model bias circuit construction schematic diagram;
Fig. 3 is the utility model biasing circuit and traditional resistor biasing circuit of divided voltage output voltage noise curve comparison diagram.
Embodiment
Below in conjunction with accompanying drawing the technical solution of the utility model is described in further detail, but protection range of the present utility model is not limited to the following stated.
As shown in Figure 2, the low-noise voltage-controlled oscillator biasing circuit, be used in conjunction with the LC voltage controlled oscillator, for the LC voltage controlled oscillator in the frequency source circuit provides the voltage bias point, it is comprised of constant voltage source LDO_VDD, bleeder circuit and filter capacitor C1, described bleeder circuit comprises high value poly resistance R 1, the first bipolar junction transistor BJT1 and the second bipolar junction transistor BJT2 of successively series connection, and high value poly resistance R 1 is carried out dividing potential drop with the bleeder circuit that the BJT pipe is composed in series to the voltage that LDO exports.High value poly resistance R 1 is connected with the collector electrode of the first bipolar junction transistor BJT1, the emitter of the first bipolar junction transistor BJT1 is connected with the collector electrode of the second bipolar junction transistor BJT2, the collector electrode of the first bipolar junction transistor BJT1 and its base stage are joined, and the collector electrode of the second bipolar junction transistor BJT2 and its base stage are joined;
The first dividing potential drop output branch road in parallel between the base stage of high value poly resistance R 1 and the first bipolar junction transistor BJT1, the first dividing potential drop output branch road output voltage point DC1, the first dividing potential drop is exported branch road and is provided with K switch G1; The second dividing potential drop output branch road in parallel between the base stage of the emitter of the first bipolar junction transistor BJT1 and the second bipolar junction transistor BJT2, the second dividing potential drop output branch road output voltage point DC2, the second dividing potential drop is exported branch road and is provided with K switch G2.Control by K switch G1 and KG2 is the voltage DC of output bias circuit optionally, and the selection of electrical voltage point DC1 and electrical voltage point DC2 is mainly interval based on the linear change of the capacitance of variable capacitance.
After exporting branch road and the second dividing potential drop is exported branch circuit parallel connection, the first dividing potential drop is connected in series with filter capacitor C1.
The emitter of the second bipolar junction transistor BJT2 and filter capacitor C1 be ground connection respectively.
As seen in Figure 3: under same LDO output voltage condition, the output voltage noise of biasing circuit that the utility model adopts (about-17dB) is starkly lower than the output voltage noise (about-15dB) of traditional employing electric resistance partial pressure configuration biases circuit.