CN203135827U - Drive circuit used for driving power transistor - Google Patents
Drive circuit used for driving power transistor Download PDFInfo
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- CN203135827U CN203135827U CN 201220753760 CN201220753760U CN203135827U CN 203135827 U CN203135827 U CN 203135827U CN 201220753760 CN201220753760 CN 201220753760 CN 201220753760 U CN201220753760 U CN 201220753760U CN 203135827 U CN203135827 U CN 203135827U
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Abstract
The utility model discloses a drive circuit used for driving power transistors. The drive circuit comprises a converter. The converter comprises a first transistor and a second transistor which are in series connection between a power supply end and a reference end, and is used to receive a first signal and generate a second signal according to the first signal, thereby utilizing the second signal to selectively control the states of the power transistors based on the ratio of a first leakage current of the first transistor and a second leakage current of the second transistor.
Description
Technical field
The utility model relate generally to electronic circuit more particularly, relates to for the transistorized drive circuit of driving power.
Background technology
Supply voltage offers external loading by power circuit.In general, power circuit can comprise high side power MOS transistor (high side power MOS transistor) and the low limit power MOS transistor (low side power MOS transistor) of series connection.The high side power MOS transistor can be coupled in for the power end that receives supply voltage and be used for providing between the output of supply voltage to external loading.Low limit power MOS transistor can be coupled in described output and be used for receiving between the reference edge of reference voltage, and wherein reference voltage is lower than supply voltage.These two kinds of power MOS transistors can be unlocked or close, thereby selectively supply voltage are offered external loading.
Figure 1 shows that for a kind of conventional ADS driving circuit 10 that drives high side power PMOS transistor 11.As shown in Figure 1, high side power PMOS transistor 11 is coupled between power end 12 and the output 13, and the grid of high side power PMOS transistor 11 is couple to control end 14 for receiving operation signal V
OpResistance 15 is coupled between the grid and power end 12 of high side power PMOS transistor 11.As operation signal V
OpIn electronegative potential, the gate source voltage of high side power PMOS transistor 11 can be higher than its threshold voltage, thereby high side power PMOS transistor 11 is unlocked.Yet the pressure drop significantly on resistance 15 may produce the electric current that flows through resistance 15, and this internal control circuit of controlling for 11 operations to high side power PMOS transistor will produce harmful effect.
Figure 2 shows that another conventional ADS driving circuit 20 that drives high side power PMOS transistor 21.As shown in Figure 2, high side power PMOS transistor 21 is coupled between power end 22 and the output 23.The grid of high side power PMOS transistor 21 is couple to control end 24 and is used for receiving operation signal V
OpDrive circuit 20 also comprises current mirror 25, and this current mirror 25 comprises PMOS transistor 25a and PMOS transistor 25b.Concrete, the drain electrode of the grid of PMOS transistor 25a and 25b and transistor 25a is couple to power end 22 by resistance 26.The drain electrode of PMOS transistor 25a is used for receiving bias current from current source 27 under the control of switch 28, and the drain electrode of PMOS transistor 25b is couple to the grid of high side power PMOS transistor 21.Current mirror 25 can be based on producing an image current from the bias current of voltage source 27 and this image current being provided to the grid of high side power PMOS transistor 21.
In operation, when switch 28 was opened, described bias current can be provided to the drain electrode of PMOS transistor 25a, thereby makes PMOS transistor 25b be unlocked.Therefore, the grid of high side power PMOS transistor 21 can be drawn high the current potential close to supply voltage, thereby makes high side power PMOS transistor 21 be closed.As from the foregoing, drive circuit 20 needs a bias current to cut out high side power PMOS transistor 21, and this biased electrical fails to be convened for lack of a quorum increases the power consumption of closing of drive circuit 20 significantly.
When switch 28 is pent, thereby being lifted to supply voltage, the grid potential of PMOS transistor 25b cause PMOS transistor 25b to be closed.Under these circumstances, the operation of high side power PMOS transistor 21 is fully by operation signal V
OpDetermine.
Figure 3 shows that the another kind of conventional ADS driving circuit 30 that is used for driving high side power PMOS transistor 31.As shown in Figure 3, high side power PMOS transistor 31 is coupled between power end 32 and the output 33.The grid of high side power PMOS transistor 31 is couple to control end 34 and is used for receiving operation signal V
OpDrive circuit 30 comprises the bipolar transistor 35 between the grid that is coupled in power end 32 and high side power PMOS transistor 31.Resistance 36 is coupled between the base stage and collector electrode of bipolar transistor 35.One end of the base stage of bipolar transistor 35 and resistance 36 is couple to current source 37 through switch 38.
In operation, when switch 38 is unlocked, current source 37 provides a bias current to resistance 36, bipolar transistor 35 is operated in the state that accurate base stage-collector electrode links to each other, thereby makes the gate source voltage of high side power PMOS transistor 31 be clamped at the position of the base-emitter voltage that is lower than bipolar transistor 35.Therefore, if the threshold voltage of bipolar transistor 35 is lower than the threshold voltage of high side power PMOS transistor 31 in this case, then high side power PMOS transistor 31 will be closed.Yet the manufacturing process of bipolar transistor 35 may produce harmful effect to the closed condition of high side power PMOS transistor 31.In addition, when high side power PMOS transistor 31 is in hot conditions following time, high side power PMOS transistor 31 may be operated in the subthreshold value state.Therefore, because the existence of the quite high leakage current of high side power PMOS transistor 31, the power consumption of drive circuit 30 may be significantly increased.
Summary of the invention
Owing to there are the problems referred to above, just need a kind of for the transistorized drive circuit of driving power, this drive circuit has lower power consumption, and also increase in technologic compatibility, and also can not exert an influence for the internal control circuit that is couple to the power transistor grid and operate for this power transistor of control.
Disclose a kind of for the transistorized drive circuit of driving power according to the application, comprise: transducer, it comprises the first transistor and the transistor seconds that is connected between power end and the reference edge, be used for to receive first signal and produce secondary signal according to this first signal, thereby control the state of described power transistor selectively based on the described secondary signal of recently utilizing of second leakage current of first leakage current of described the first transistor and described transistor seconds.
In one embodiment, described drive circuit further comprises first switch that the grid with described power transistor couples, and wherein said first switch is controlled by the secondary signal that described transducer produces.
In another embodiment, described the first transistor is the PMOS transistor, and it comprises for the first grid that receives described first signal, first source electrode that couples with described power end, and first drain electrode; Described transistor seconds is nmos pass transistor, and it comprises second grid and second source electrode that is couple to described reference edge, and second drain electrode that is couple to first drain electrode of described the first transistor, and wherein said secondary signal produces in described second drain electrode place.
In one embodiment, described transistor seconds is the NDMOS transistor, and described first leakage current drain-source leakage current that is described the first transistor, and described second leakage current is the leakage-substrate leakage current of described transistor seconds.
In another embodiment, the breadth length ratio of described the first transistor (W/L) is less than the breadth length ratio of described transistor seconds.
In one embodiment, described first switch is the PMOS transistor, and it comprises that the 3rd grid be used for to receive described secondary signal, the 3rd source electrode that couples with described power end, and the 3rd drain electrode that couples with described power transistor grid.
In another embodiment, described drive circuit further comprises described the 3rd grid that is coupled in described first switch and the pincers pressing mold piece between the 3rd source electrode.
In another embodiment, described drive circuit further comprises the signal generator that couples with described transducer, is used for receiving control signal and produces described first signal according to described control signal.
In one embodiment, described signal generator comprises the current source of series connection, and second switch and resistance, wherein said second switch are coupled between described current source and the described resistance, one end and the described power end of described resistance couple, and an end and the described reference edge of described current source couple; And described second switch is controlled by described control signal, and described first signal is output in described second switch and the position that described resistance couples mutually.
In another embodiment, described second switch is nmos pass transistor, and it comprises for the 4th grid that receives described control signal, the 4th drain electrode that couples with described resistance, and the 4th source electrode that couples with described current source.
By using the drive circuit in the embodiment of the present application, leakage current and the gate source voltage of power transistor all are significantly reduced, thereby this power transistor can thoroughly be closed.Compare with the drive circuit of traditional power transistor, the disclosed drive circuit of the application has better effect.Especially, compare can the not exert an influence electric current of power transistor operate as normal of the drive circuit among the application with conventional ADS driving circuit shown in Figure 1; Compare with the conventional transistor shown in Fig. 2, the drive circuit among the application does not need be used to the bias current of cutting out power transistor, and therefore power consumption is lowered; Compare with drive circuit shown in Figure 3, the drive circuit among the application does not need to adopt the another kind of manufacturing process that may influence the power tube characteristic.
What foregoing was wide in range sketches the contours the application.Below will be introduced and constitute the theme to the application's claim to the application's various features.It will be understood by those skilled in the art that design disclosed herein and specific embodiment can be used as the basis of improving or design other structures or process and realize the purpose identical with the application.Those of ordinary skills should understand the spirit and scope that such equivalent structure does not depart from the application's claim.
Description of drawings
For the application and advantage thereof are had more fully understanding, be introduced below in conjunction with accompanying drawing, wherein
Figure 1 shows that a kind of for the conventional ADS driving circuit that drives the high side power MOS transistor;
Figure 2 shows that the another kind of conventional ADS driving circuit that is used for driving the high side power MOS transistor;
Figure 3 shows that the another kind of conventional ADS driving circuit that is used for driving the high side power MOS transistor;
Figure 4 shows that and be used for the transistorized drive circuit of driving power according to an embodiment of the application;
Fig. 5 is used for the transistorized drive circuit of driving power according to another embodiment of the application; With
Fig. 6 is used for the transistorized drive circuit of driving power according to another embodiment of the application.
Embodiment
Below will manufacturing and the use of specific embodiment be described in detail.But it should be noted that the application provides a lot of enforceable and creative concepts and the mode that embodies is widely arranged.Only be the demonstration of making and use concrete mode of the present utility model at this specific embodiment of discussing, and should the application's scope do not limited to some extent.
Figure 4 shows that an embodiment according to the application is used for the transistorized drive circuit 100 of driving power.This drive circuit 100 can be used to driving power transistor 101.In one embodiment, power transistor 101 can be the high side power transistor, and couples with mode and low limit power transistor of series connection.Described high side power transistor can be used as a switch and controls whether supply voltage is offered external loading.In another embodiment, power transistor 101 can be low limit power transistor, then can not depart from the application's scope by carrying out the adaptability conversion to set up corresponding drive circuit.In actual applications, drive circuit 100 can be used to low pressure difference linear voltage regulator (low dropout regulator), pulse width modulation circuit (a pulse width modulation circuit), perhaps other have the circuit of one or more power transistors.
As shown in Figure 4, drive circuit 100 comprises switch 103 and transducer 105.Power transistor 101 is coupled between voltage end 107 and the output 109.Voltage end 107 and power supply, for example battery couples mutually, is used for receiving supply voltage V
sOutput 109 couples mutually with the external loading (not shown), is used for selectively with supply voltage V
sOffer this external loading.In one embodiment, described power supply is a positive supply, and power transistor is the PMOS power transistor, and its grid is couple to power end 107, and its drain electrode is couple to output 109.In other embodiments, power transistor 101 can be the NMOS power transistor, in this case, can carry out adaptive conversion is applicable to the NMOS power transistor with foundation drive circuit to other transistors.
Switch 103 can couple to control the state of power transistor 101 with the grid of power transistor 101.In one embodiment, switch 103 can be MOS transistor, for example the PMOS transistor.One end of switch 103 for example drains and is couple to the grid of power transistor 101, and the other end of switch 103 for example source electrode is couple to power end 107.The state of switch 103 by its control end 111 for example the signal that receives of source electrode controlled.In operation, when switch 103 was unlocked, the grid voltage of power transistor 101 was thus lifted to supply voltage V
s, so this PMOS power transistor 101 is closed.When switch 103 was pent, the grid voltage of power transistor 101 was only by its received operation signal V
OpControl.
In one embodiment, transducer 105 can comprise PMOS transistor 113 and the nmos pass transistor 115 of series connection.In one embodiment, the source electrode of transistor 113 couples mutually with power end 107, and the grid of transistor 115 and source electrode and reference edge 117 couple, reference edge 117 ground connection or be used for to receive a magnitude of voltage that is lower than supply voltage.Transducer 105 is used for receiving signal V at its input 119
1, and provide signal V at its output 121 accordingly
2, output 121 couples mutually with the control end 111 of switch 103.The input 119 of transducer 105 couples with the grid of transistor 113.The output 121 of transducer 105 couples with the drain electrode of transistor 113 and transistor 115.
In one embodiment, transistor 115 can make NDMOS (n type double-diffused transistor, n-type double diffused transistor).According to the physical characteristic of DMOS, owing to formed the structure that is similar to diode between the existence of N-trap or drift region and the p-type substrate, thus formed considerable drain electrode-substrate leakage current.In one embodiment, the drain electrode-substrate leakage current of transistor 115 can reach receive the peace the order of magnitude.Relative, the drain electrode-source leakage currents of transistor 113 is much smaller than the drain electrode-substrate leakage current of transistor 115, and its order of magnitude only can reach the level of skin peace.This be because, the leakage current of the drain-to-source of transistor 113 must flow through the drain electrode and source electrode between n type district.In one embodiment, (DMOS) technology is made drive circuit 100 for Bipolar, CMOS can to adopt BCD.
In operation, signal V
1Can be in first current potential and always be in closed condition because its grid and source electrode are coupled in together to close transistor 113. transistors 115.Under these circumstances, the signal V that produces at output 121
2Decided by the drain electrode-source leakage currents of transistor 113 and the drain electrode-substrate leakage current of transistor 115.Concrete, as mentioned above, the drain electrode-source leakage currents of transistor 113 this means that much smaller than the drain electrode-substrate leakage current of transistor 115 ratio of above-mentioned two leakage currents is much smaller than 1.Therefore, the voltage of output 121 can pulled down to for example ground voltage of reference voltage.In this case, switch 103 can be unlocked, and is then forgotten about it near V at the voltage of power transistor 101 grids
sThereby current potential cause power transistor 101 to be closed.
In certain embodiments, the breadth length ratio of MOS transistor (width-to-length ratio) has significant impact to its leakage current, and perhaps leakage current is general proportional with transistorized breadth length ratio in particular.Therefore, can adjust with the drain electrode-source leakage currents of the further assurance transistor 113 drain electrode-substrate leakage current much smaller than transistor 115 breadth length ratio of transistor 113 and transistor 115, thereby switch 103 can be unlocked, and power transistor 101 can thoroughly be closed.For example, transistor 113 and transistor 115 can be as follows:
In addition, signal V
1Can be in second current potential with turn-on transistor 113.Signal V
2Can be drawn high supply voltage V
sTherefore, switch 103 is closed, and the operation of power transistor 101 can be only by signal V
OpDetermine.
As mentioned above, when power transistor 101 was closed and stop to provide supply voltage to external loading, transistor 113 and the transistor 115 of transducer 105 all were in closed condition, had only leakage current flow through transistor 113 and transistor 115.Therefore, under power tube 101 closing state, the power consumption of drive circuit 100 is much smaller than traditional drive circuit.
Figure 5 shows that the drive circuit 200 that is used for driving power transistor 201 according to an embodiment of the application.Power transistor 201 can be the high side power transistor, and can couple with series system with low limit power transistor.
As shown in Figure 5, drive circuit 200 comprises switch 203, transducer 205 and signal generator 206.Transducer 205 comprises PMOS transistor 213 and the nmos pass transistor 215 that couples mutually with series system.Except the signal V at transistor 213 grids
1Beyond being produced by signal generator 206,101,103,113 among 201,203,213 and 215 characteristic and setting and Fig. 4 and 115 basic identical.
In operation, as switch 212 controlled signal V
ConWhen closing, drawn high supply voltage V at the voltage of common port 214
sThereby, cause transistor 213 to be closed.As switch 212 controlled signal V
ConDuring unlatching, pulled down to supply voltage V at the voltage of common port 214
sDeduct the position of pressure drop on the resistance 210.Carry out specific design by resistance and bias current to resistance 210, the pressure drop on the resistance 210 can be adjusted near supply voltage V
sLevel, thereby the signal V that makes at common port 214
1Can be able to the electronegative potential of turn-on transistor 213.Transistor 215 is always closed, because its grid and source electrode are coupled in together.In this case, therefore transistor 213 and transistor 215 are all closed, and can produce for control switch 203 to close the signal V of power transistor 201 based on the ratio of the drain electrode-substrate leakage current of the drain electrode-source leakage currents of transistor 213 and transistor 215 at the output 221 of transducer 205
2
The signal generator that it should be understood by one skilled in the art that other types also can be used to produce signal V at this
1
Figure 6 shows that the drive circuit 300 that is used for driving power transistor 301 according to an embodiment of the application.As shown in Figure 6, drive circuit 300 comprises switch 303, and it can be PMOS transistor for example, comprises the PMOS transistor 313 that couples with series system and the transducer 305 of nmos pass transistor 315, signal generator 306, and voltage clamper module 317.Except the signal V that receives at transistor 313 grids
1Produced by signal generator 306, and the grid-source voltage of switch 303 is by beyond 317 clampers of voltage clamper module 101,103,113 and 115 basic identical among 301,303,313 and 315 characteristic and operation and Fig. 1.
In one embodiment, signal generator 306 comprises the resistance 310 that couples with series system, nmos pass transistor 312 and current mirror 316, wherein an end of resistance 310 couples mutually with voltage end 307, one end and the reference edge of current mirror 316 couple, and nmos pass transistor 312 is coupled between resistance 310 and the current mirror 316.Current mirror 316 comprises pair of NMOS transistors 318 and 320, and the grid of this pair nmos transistor is coupled in together.Transistor 318 is used for receiving reference current at its drain and gate that is coupled in together, and transistor 320 is used for providing and the proportional bias current of described reference current according to these two transistorized breadth length ratios.Described bias current is provided for resistance 310 and produces change in voltage with the state according to nmos pass transistor 312 at resistance 310.
In operation, when nmos pass transistor 312 by the received signal V of its grid
ConWhen opening, described biased electrical fails to be convened for lack of a quorum and produces change in voltage at resistance 310.Therefore, by disposing resistance 310 and bias current particularly, at the voltage V of the common port 314 of resistance 310 and nmos pass transistor 312
1Can be pulled down to can be the electronegative potential that transistor 313 is opened.Optionally, nmos pass transistor 312 can be by signal V
ConClose, at the voltage V of the common port 314 of resistance 310 and nmos pass transistor 312
1Can be pulled to supply voltage V
sTo close transistor 313.In this case, the state of switch 303 can be based on the ratio of the drain electrode-substrate leakage current of the drain electrode-source leakage currents of transistor 313 and transistor 315 and is determined.
In one embodiment, drive circuit 300 also comprises the voltage clamper module 317 that is coupled in power end 307 and switch 303 grids, is used for the voltage between voltage end 307 and switch 303 grids is carried out clamper, makes it be lower than predeterminated level.Such configuration is at supply voltage V
s Pair pmos transistor 303 is protected when unexpected peak value occurring.In certain embodiments, voltage clamper module 317 comprises the Zener diode of one or more series connection or bipolar transistor or the MOS transistor that the diode in series form connects.
In certain embodiments, nmos pass transistor 315 and 312 can be the DMOS transistor.Because very big pressure drop can be born in the transistorized drift region of DMOS, nmos pass transistor 315 and 312 can be used for distinguishing high pressure and the low-pressure section of drive circuit 300.
It should be understood by one skilled in the art that at material and method and can in the scope that originally is application, change that the application also provides a lot of enforceable creative concepts except schematic specific embodiment is provided.Therefore, said process, machine, material composition, means, method or step all covered in the scope of the application's claim.
Claims (10)
1. one kind is used for the transistorized drive circuit of driving power, comprising:
Transducer, it comprises the first transistor and the transistor seconds that is connected between power end and the reference edge, be used for to receive first signal and produce secondary signal according to this first signal, thereby control the state of described power transistor selectively based on the described secondary signal of recently utilizing of second leakage current of first leakage current of described the first transistor and described transistor seconds.
2. drive circuit as claimed in claim 1 further comprises first switch that the grid with described power transistor couples, and wherein said first switch is controlled by the secondary signal that described transducer produces.
3. drive circuit as claimed in claim 1, wherein said the first transistor is the PMOS transistor, it comprises for the first grid that receives described first signal, first source electrode that couples with described power end, and first drain electrode; Described transistor seconds is nmos pass transistor, and it comprises second grid and second source electrode that is couple to described reference edge, and second drain electrode that is couple to first drain electrode of described the first transistor, and wherein said secondary signal produces in described second drain electrode place.
4. as arbitrary described drive circuit among the claim 1-3, wherein said transistor seconds is the NDMOS transistor, and the drain-source leakage current that described first leakage current is described the first transistor, described second leakage current are the leakage-substrate leakage currents of described transistor seconds.
5. drive circuit as claimed in claim 4, the breadth length ratio of described the first transistor (W/L) is less than the breadth length ratio of described transistor seconds.
6. drive circuit as claimed in claim 1, wherein said first switch is the PMOS transistor, it comprises that the 3rd grid is used for receiving described secondary signal, the 3rd source electrode that couples with described power end, and the 3rd drain electrode that couples with described power transistor grid.
7. drive circuit as claimed in claim 6 further comprises described the 3rd grid that is coupled in described first switch and the pincers pressing mold piece between the 3rd source electrode.
8. drive circuit as claimed in claim 1 further comprises the signal generator that couples with described transducer, is used for receiving control signal and produces described first signal according to described control signal.
9. drive circuit as claimed in claim 8, wherein said signal generator comprises the current source of series connection, second switch and resistance, wherein said second switch is coupled between described current source and the described resistance, one end and the described power end of described resistance couple, and an end and the described reference edge of described current source couple; And described second switch is controlled by described control signal, and described first signal is output in described second switch and the position that described resistance couples mutually.
10. drive circuit as claimed in claim 9, wherein said second switch is nmos pass transistor, it comprises for the 4th grid that receives described control signal, the 4th drain electrode that couples with described resistance, and the 4th source electrode that couples with described current source.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220753760 CN203135827U (en) | 2012-12-31 | 2012-12-31 | Drive circuit used for driving power transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220753760 CN203135827U (en) | 2012-12-31 | 2012-12-31 | Drive circuit used for driving power transistor |
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| CN203135827U true CN203135827U (en) | 2013-08-14 |
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| CN 201220753760 Expired - Lifetime CN203135827U (en) | 2012-12-31 | 2012-12-31 | Drive circuit used for driving power transistor |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103916113B (en) * | 2012-12-31 | 2017-06-16 | 意法半导体研发(深圳)有限公司 | A driving circuit for driving a power transistor |
| CN111198589A (en) * | 2018-11-16 | 2020-05-26 | 力旺电子股份有限公司 | Reference voltage generator and operation method of reference voltage generator |
-
2012
- 2012-12-31 CN CN 201220753760 patent/CN203135827U/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103916113B (en) * | 2012-12-31 | 2017-06-16 | 意法半导体研发(深圳)有限公司 | A driving circuit for driving a power transistor |
| CN111198589A (en) * | 2018-11-16 | 2020-05-26 | 力旺电子股份有限公司 | Reference voltage generator and operation method of reference voltage generator |
| US11086349B2 (en) | 2018-11-16 | 2021-08-10 | Ememory Technology Inc. | Reference voltage generator capable of reducing hot carrier stress |
| CN111198589B (en) * | 2018-11-16 | 2021-11-09 | 力旺电子股份有限公司 | Reference voltage generator and operation method thereof |
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Address after: 5 / F East B501, South B502, North B503, 6th floor, block B, TCL Industrial Research Institute building, No. 006, Gaoxin South 1st Road, Nanshan District, Shenzhen City, Guangdong Province Patentee after: STMicroelectronics (Shenzhen) R&D Co.,Ltd. Address before: 518057, 4/5 building, B block, South SKYWORTH building, South Zone, Shenzhen hi tech Zone, Nanshan District science and Technology Park, Guangdong, China Patentee before: STMicroelectronics (Shenzhen) R&D Co.,Ltd. |
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Granted publication date: 20130814 |