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CN203117929U - Touch electrode structure - Google Patents

Touch electrode structure Download PDF

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Publication number
CN203117929U
CN203117929U CN 201220703025 CN201220703025U CN203117929U CN 203117929 U CN203117929 U CN 203117929U CN 201220703025 CN201220703025 CN 201220703025 CN 201220703025 U CN201220703025 U CN 201220703025U CN 203117929 U CN203117929 U CN 203117929U
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layer
etching
electrode
optical layer
area
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刘振宇
李禄兴
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TPK Touch Solutions Inc
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TPK Touch Solutions Inc
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Abstract

A touch electrode structure, comprising: a substrate; the electrode layer is arranged on the substrate and is divided into an etching area and a non-etching area, and the electrode layer of the non-etching area comprises: the electrode structure comprises more than two first electrode blocks which are arranged along a first direction, wherein the adjacent first electrode blocks are electrically connected through a first lead; more than two second electrode blocks arranged along a second direction, wherein the second electrode blocks are arranged on two sides of the first lead; the first etching-proof optical layer is arranged on the electrode layer of the non-etching area, and a through hole is formed in the first etching-proof optical layer at a position corresponding to the second electrode block; the second etching-proof optical layer is arranged on the first etching-proof optical layer and the substrate, and a hollow area is formed at the position, corresponding to the through hole, of the second etching-proof optical layer; and the circuit layer is electrically connected with the adjacent second electrode blocks through the hollow areas and the through holes. By adjusting the refractive index of the first etching prevention optical layer and the second etching prevention layer, the difference in appearance between the etched area and the non-etched area after etching can be reduced.

Description

触控电极结构Touch electrode structure

技术领域technical field

本实用新型涉及触控技术,特别是涉及一种触控电极结构。The utility model relates to touch technology, in particular to a touch electrode structure.

背景技术Background technique

传统的触控电极结构制造工艺中,最主要的步骤包括电极结构的形成和线路层的形成,在这两个步骤中,分别需要用到用于定义电极图形的掩膜和用于定义线路层连接区域的掩膜。在传统的制造工艺中,掩膜在完成以上制程步骤之后,一般都需要额外的步骤去除。In the traditional touch electrode structure manufacturing process, the most important steps include the formation of the electrode structure and the formation of the wiring layer. In these two steps, a mask for defining the electrode pattern and a mask for defining the wiring layer are required respectively. Mask for connected regions. In the traditional manufacturing process, the mask generally requires additional steps to be removed after the above process steps are completed.

另一方面,为了使得触控电极结构在应用于触控显示装置时具有良好的视觉效果,在形成触控感测电极结构之后,触控电极结构上通常需要增加额外的光学层,以调节触控装置的显示效果。On the other hand, in order to make the touch electrode structure have a good visual effect when applied to a touch display device, after the touch sensing electrode structure is formed, it is usually necessary to add an additional optical layer on the touch electrode structure to adjust the touch. The display effect of the control device.

因此传统的触控电极结构制造工艺不但流程繁琐,而且在显示效果的调整方面需要付出额外的成本。Therefore, the traditional manufacturing process of the touch electrode structure is not only cumbersome, but also needs to pay extra costs in the adjustment of the display effect.

实用新型内容Utility model content

基于此,有必要提供一种触控电极结构,其具有较少的工艺步骤且较好的视觉效果。Based on this, it is necessary to provide a touch electrode structure with less process steps and better visual effect.

一种触控电极结构,包括:A touch electrode structure, comprising:

一基板;a substrate;

一电极层,设置于该基板上,且该电极层分为一蚀刻区与一非蚀刻区,其中该非蚀刻区的电极层包含:至少两个以上的沿第一方向排列的第一电极块,相邻的该些第一电极块通过第一导线电性连接;至少两个以上的沿第二方向排列的第二电极块,所述第二电极块分别设置于该第一导线两侧;An electrode layer is arranged on the substrate, and the electrode layer is divided into an etching area and a non-etching area, wherein the electrode layer in the non-etching area includes: at least two or more first electrode blocks arranged along the first direction , the adjacent first electrode blocks are electrically connected by first wires; at least two second electrode blocks arranged along the second direction, the second electrode blocks are respectively arranged on both sides of the first wires;

一第一防蚀刻光学层,设置于该非蚀刻区的电极层上,且该第一防蚀刻光学层对应于该些第二电极块的位置形成有贯穿孔;A first anti-etching optical layer, disposed on the electrode layer in the non-etching area, and the first anti-etching optical layer is formed with through holes corresponding to the positions of the second electrode blocks;

一第二防蚀刻光学层,设置于该第一防蚀刻光学层与该基板上,且该第二防蚀刻光学层对应于该贯穿孔的位置形成有镂空区域;A second anti-etch optical layer, disposed on the first anti-etch optical layer and the substrate, and a hollow area is formed in the second anti-etch optical layer corresponding to the through hole;

一线路层,设置于该第二防蚀刻光学层上,且该线路层通过该镂空区域及该贯穿孔电性连接相邻的第二电极块。A circuit layer is arranged on the second anti-etching optical layer, and the circuit layer is electrically connected to adjacent second electrode blocks through the hollow area and the through hole.

通过调节第一防蚀刻光学层和第二防蚀刻层的折射率,可减轻蚀刻后蚀刻区和非蚀刻区存在的外观差异。By adjusting the refractive index of the first anti-etching optical layer and the second anti-etching layer, the appearance difference between the etched area and the non-etched area after etching can be alleviated.

附图说明Description of drawings

图1为第一实施例的触控电极结构的制造工艺流程图;FIG. 1 is a flow chart of the manufacturing process of the touch electrode structure of the first embodiment;

图2a~图2f为图1所示工艺流程图中各个步骤所对应的触控电极结构俯视图;图2a′~图2f′分别为图2a~图2e沿A-A’方向的剖视图;Figures 2a to 2f are top views of the touch electrode structure corresponding to each step in the process flow chart shown in Figure 1; Figures 2a' to 2f' are cross-sectional views along the direction A-A' of Figures 2a to 2e;

图2g为第一实施例的触控电极结构蚀刻区与非蚀刻区的电极层的层级结构图;2g is a layered structure diagram of the electrode layer of the etching area and the non-etching area of the touch electrode structure of the first embodiment;

图3a为第二实施例的触控电极结构的俯视图;图3a′为图3a沿A-A’方向的剖视图;Fig. 3a is a top view of the touch electrode structure of the second embodiment; Fig. 3a' is a cross-sectional view along the direction A-A' of Fig. 3a;

图4为另一实施例的触控电极结构的制造工艺流程图;FIG. 4 is a flow chart of a manufacturing process of a touch electrode structure according to another embodiment;

图5a~图5e为图4所示工艺流程图中各个步骤所对应的触控电极结构俯视图;图5a’~图5f′分别为图5a~图5e沿A-A’方向的剖视图。Figures 5a to 5e are top views of the touch electrode structure corresponding to each step in the process flow chart shown in Figure 4; Figures 5a' to 5f' are cross-sectional views along the direction A-A' of Figures 5a to 5e respectively.

具体实施方式Detailed ways

如图1所绘示,为一实施例的触控电极结构的制造工艺流程图。该制造工艺流程包括以下步骤。As shown in FIG. 1 , it is a flow chart of the manufacturing process of the touch electrode structure of an embodiment. The manufacturing process includes the following steps.

S101:形成一电极层于一基板上。参考图2a′和图2a,电极层130a形成于基板110上。其中基板110可以是玻璃基板或者聚对苯二甲酸类塑料(Polyethylene terephthalate,PET)基板。基板110可为平面或者曲面形状,以适应不同的触控产品。基板110还可为硬质基板或可扰式基板。电极层130a可以采用纳米银丝(Silver Nano-Wire,SNW)层、碳纳米管(Carbon nanotube,CNT)层、石墨烯(Graphene)层、高分子导电(Conductive Polymer)层以及氧化金属(ITO、AZO……Gel)层等可透视的材料。形成电极层130的方式可以采用沉积、溅射等工艺。S101: Form an electrode layer on a substrate. Referring to FIGS. 2 a ′ and 2 a , the electrode layer 130 a is formed on the substrate 110 . The substrate 110 may be a glass substrate or a polyethylene terephthalate (PET) substrate. The substrate 110 can be flat or curved to adapt to different touch products. The substrate 110 can also be a rigid substrate or a perturbable substrate. The electrode layer 130a can be made of nano-silver (Silver Nano-Wire, SNW) layer, carbon nanotube (Carbon nanotube, CNT) layer, graphene (Graphene) layer, polymer conductive (Conductive Polymer) layer and metal oxide (ITO, AZO...Gel) layer and other see-through materials. The manner of forming the electrode layer 130 may adopt processes such as deposition and sputtering.

S102:形成一保护层于该电极层上。对于纳米银丝等易被氧化的材料,保护层140将电极层130a与空气隔离,进而有助于提高电极层130a的抗氧化能力。同时,由于纳米银丝材料自身具有一定的疏密度,保护层140可通过纳米银丝的间隙与基板接触,通过选用与基板110有较佳附着力的材料,有助于提高纳米银丝在基板110的附着力。保护层的材料采用可透视的绝缘材料,如二氧化硅。保护层的厚度为50nm至500nm。S102: Form a protection layer on the electrode layer. For materials that are easily oxidized, such as nano-silver wire, the protective layer 140 isolates the electrode layer 130a from the air, thereby helping to improve the oxidation resistance of the electrode layer 130a. Simultaneously, because the nano-silver material itself has a certain density, the protective layer 140 can contact the substrate through the gap of the nano-silver, and by selecting materials with better adhesion with the substrate 110, it helps to improve the adhesion of the nano-silver to the substrate. 110 adhesion. The protective layer is made of see-through insulating material, such as silicon dioxide. The protective layer has a thickness of 50nm to 500nm.

S103:形成一第一防蚀刻光学层于该保护层上。参考图2b’和图2b,将第一防蚀刻光学层150形成于保护层140上。第一防蚀刻光学层150具有图案化的形状,其用于在电极层130a上定义出导电电极图形。该第一防蚀刻光学层150可以采用压克力聚合物(Acrylate Polymer)和环氧树脂(Epoxide Resin)等可透视的绝缘材料制成。形成第一防蚀刻光学层150的方式可以采用印刷(printing)工艺。第一防蚀刻光学层的厚度为0.05um至5um。S103: Form a first anti-etching optical layer on the protection layer. Referring to FIGS. 2b' and 2b, a first etch-resistant optical layer 150 is formed on the protective layer 140. Referring to FIG. The first anti-etching optical layer 150 has a patterned shape, which is used to define conductive electrode patterns on the electrode layer 130a. The first anti-etching optical layer 150 can be made of transparent insulating materials such as acrylic polymer (Acrylate Polymer) and epoxy resin (Epoxide Resin). The method of forming the first anti-etching optical layer 150 may adopt a printing process. The thickness of the first anti-etching optical layer is 0.05um to 5um.

S104:蚀刻未被该第一防蚀刻光学层遮挡的该电极层,经蚀刻后的该电极层分为一蚀刻区与一非蚀刻区。参考图2c′和图2c,对图2b’和图2b中的电极层130a进行蚀刻,形成图2c和图2c′所示的电极层130b。在蚀刻过程中,由于保护层140的厚度较薄,蚀刻液可渗透保护层140对电极层130a进行蚀刻。图2c′和图2c所示的电极层130b分为蚀刻区M和非蚀刻区N。在本实施例中,蚀刻电极层130采用不完全蚀刻的工艺,即在确保蚀刻区M的电极层130b与非蚀刻区N的电极层130b电性绝缘的前提下,仅蚀刻掉部分蚀刻区M的电极。采用不完全蚀刻的工艺,可避免蚀刻区M与非蚀刻区N的电极层色差过大。在另一实施例中,可采用完全蚀刻的工艺。非蚀刻区N的电极层130b包含:至少两个以上的沿第一方向排列的第一电极块132,相邻的第一电极块132通过第一导线134电性连接;至少两个以上的沿第二方向排列的第二电极块136,第二电极块136分别设置于第一导线134两侧。图中仅示出非蚀刻区N的电极层130b的部分电极块,实际的电极层130b应包含更多电极块。由于第一防蚀刻光学层150的遮挡,经过蚀刻后,电极层130最终形成与第一防蚀刻光学层150所定义的图形相同的电极结构。图2c′和图2c中,第一电极块132、第一导线134以及第二电极块136均位于第一防蚀刻光学层150下。S104: Etch the electrode layer not shielded by the first etch-resistant optical layer, and the etched electrode layer is divided into an etching area and a non-etching area. Referring to Fig. 2c' and Fig. 2c, the electrode layer 130a in Fig. 2b' and Fig. 2b is etched to form the electrode layer 130b shown in Fig. 2c and Fig. 2c'. During the etching process, since the protective layer 140 is thin, the etchant can penetrate the protective layer 140 to etch the electrode layer 130a. The electrode layer 130b shown in FIG. 2c' and FIG. 2c is divided into an etching region M and a non-etching region N. In this embodiment, the etching electrode layer 130 adopts an incomplete etching process, that is, only part of the etching region M is etched under the premise of ensuring that the electrode layer 130b in the etching region M is electrically insulated from the electrode layer 130b in the non-etching region N. the electrodes. Using the incomplete etching process can avoid excessive color difference between the electrode layer in the etching area M and the non-etching area N. In another embodiment, a full etch process may be used. The electrode layer 130b of the non-etching area N includes: at least two or more first electrode blocks 132 arranged along the first direction, and adjacent first electrode blocks 132 are electrically connected by first wires 134; The second electrode blocks 136 are arranged in the second direction, and the second electrode blocks 136 are respectively arranged on both sides of the first wire 134 . The figure only shows some electrode blocks of the electrode layer 130b in the non-etching region N, and the actual electrode layer 130b should include more electrode blocks. Due to the shielding of the first anti-etching optical layer 150 , after etching, the electrode layer 130 finally forms the same electrode structure as the pattern defined by the first anti-etching optical layer 150 . In FIG. 2c ′ and FIG. 2c , the first electrode block 132 , the first wire 134 and the second electrode block 136 are all located under the first etch-resistant optical layer 150 .

S105:形成一第二防蚀刻光学层于该保护层与该第一防蚀刻光学层上。参考图2d’和图2d,在蚀刻形成电极层130b之后,在整个基板210之上再覆盖形成第二防蚀刻光学层160,第二防蚀刻光学层160形成于第一防蚀刻光学层150和保护层140之上,且对应于各第二电极块136上的第二防蚀刻光学层160形成有镂空区域162。第二防蚀刻光学层160可以采用压克力聚合物(AcrylatePolymer)和环氧树脂(Epoxide Resin)等可透视的绝缘材料制成。第二防蚀刻光学层160的厚度为0.05um至5um。S105: Form a second anti-etch optical layer on the protection layer and the first anti-etch optical layer. Referring to FIG. 2d' and FIG. 2d, after the electrode layer 130b is formed by etching, the second etch-resistant optical layer 160 is covered and formed on the entire substrate 210, and the second etch-resistant optical layer 160 is formed on the first etch-resistant optical layer 150 and A hollow area 162 is formed on the protection layer 140 and corresponding to the second anti-etching optical layer 160 on each second electrode block 136 . The second anti-etching optical layer 160 can be made of transparent insulating materials such as acrylic polymer (Acrylate Polymer) and epoxy resin (Epoxide Resin). The thickness of the second anti-etching optical layer 160 is 0.05um to 5um.

S106:蚀刻该些镂空区域处的该第一防蚀刻光学层和该保护层。参考图2e’和图2e,通过蚀刻镂空区域162处的第一防蚀刻光学层150和保护层140,可在第一防蚀刻光学层150和保护层140上形成贯穿孔152。贯穿孔152形成并贯穿于第一防蚀刻光学层150和保护层140,使得第二电极块136部分外露。需说明的是,对于单一第二电极块136而言,镂空区域162和贯穿孔152的数目可根据第二电极块136的大小作调整,并不限定于图示中的数量。另镂空区域162和贯穿孔152的亦可为圆形等形状,不限于图示中的方形。S106: Etching the first anti-etching optical layer and the protection layer at the hollowed out regions. 2e' and 2e, by etching the first etch-resistant optical layer 150 and the protective layer 140 at the hollowed out region 162, a through hole 152 can be formed on the first etch-resistant optical layer 150 and the protective layer 140. The through hole 152 is formed and penetrates through the first anti-etch optical layer 150 and the protective layer 140 , so that the second electrode block 136 is partially exposed. It should be noted that, for a single second electrode block 136 , the number of hollowed out regions 162 and through holes 152 can be adjusted according to the size of the second electrode block 136 , and is not limited to the number shown in the figure. In addition, the hollow area 162 and the through hole 152 may also be in the shape of a circle, and are not limited to the square in the figure.

S107:形成一线路层。参考图2f′和图2f,线路层170形成于第二防蚀刻光学层160上,并通过镂空区域162以及贯穿孔152与位于非蚀刻区的第二电极块136电性连接。线路层170可采用氧化铟锡等可透视的导电材料、或银、铝等金属材料、或钼铝钼等合金材料。S107: Form a circuit layer. Referring to FIG. 2 f ′ and FIG. 2 f , the circuit layer 170 is formed on the second anti-etching optical layer 160 and is electrically connected to the second electrode block 136 located in the non-etching area through the hollow area 162 and the through hole 152 . The circuit layer 170 can be made of see-through conductive materials such as indium tin oxide, or metal materials such as silver and aluminum, or alloy materials such as molybdenum-aluminum-molybdenum.

同时参考图2c、图2f′和图2f所示,经过上述工艺所得到的触控电极结构,包括:基板110;电极层130b,设置于该基板110上,且电极层130b分为蚀刻区M与非蚀刻区N,其中非蚀刻区N的电极层包含:至少两个以上的沿第一方向排列的第一电极块132,相邻的该些第一电极块132通过第一导线134电性连接;至少两个以上的沿第二方向排列的第二电极块136,所述第二电极块136分别设置于该第一导线134两侧;保护层140,设置于该电极层130b上;第一防蚀刻光学层150,设置于非蚀刻区N的保护层上,且第一防蚀刻光学层150与保护层140对应于第二电极块136的位置形成有贯穿孔152;第二防蚀刻光学层160,设置于保护层140与第一防蚀刻光学层150上,且第二防蚀刻光学层160对应于贯穿孔152的位置形成有镂空区域162;线路层170,设置于第二防蚀刻光学层160上,且线路层170通过镂空区域162及贯穿孔152电性连接相邻的第二电极块136。本实施例触控电极结构各部件的其它特性,在形成工艺中已详述,故此处不再赘述。Referring to Fig. 2c, Fig. 2f' and Fig. 2f at the same time, the touch electrode structure obtained through the above process includes: a substrate 110; an electrode layer 130b is arranged on the substrate 110, and the electrode layer 130b is divided into etching regions M and the non-etching area N, wherein the electrode layer of the non-etching area N includes: at least two or more first electrode blocks 132 arranged along the first direction, and the adjacent first electrode blocks 132 are electrically connected through the first wire 134 connection; at least two second electrode blocks 136 arranged along the second direction, and the second electrode blocks 136 are respectively arranged on both sides of the first wire 134; the protective layer 140 is arranged on the electrode layer 130b; An anti-etching optical layer 150 is disposed on the protective layer in the non-etching region N, and the first anti-etching optical layer 150 and the protective layer 140 are formed with through holes 152 corresponding to the positions of the second electrode block 136; The layer 160 is disposed on the protection layer 140 and the first anti-etching optical layer 150, and the second anti-etching optical layer 160 is formed with a hollow area 162 corresponding to the position of the through hole 152; the circuit layer 170 is disposed on the second anti-etching optical layer 150; layer 160 , and the circuit layer 170 is electrically connected to the adjacent second electrode block 136 through the hollow area 162 and the through hole 152 . Other characteristics of the components of the touch electrode structure in this embodiment have been described in detail in the formation process, so details will not be repeated here.

请同时参考图2f′、图2f和图2g,采用本实用新型的工艺形成的触控电极结构,电极层130b蚀刻区M上形成有保护层140、第二防蚀刻光学层160;非蚀刻区N上形成有保护层140、第一防蚀刻光学层150、第二防蚀刻光学层160。通过调节保护层140、第一防蚀刻光学层150、第二防蚀刻光学层160的折射率,可减轻蚀刻后蚀刻区M和非蚀刻区N存在的外观差异。在一实施例中,第一防蚀刻光学层150的折射率至少比保护层140的折射率大0.1,第二防蚀刻光学层160的折射率至少比第一防蚀刻光学层150的折射率大0.1。保护层140、第一防蚀刻光学层150、第二防蚀刻光学层160的折射率可根据不同电极层材料的折射率作调整。另,保护层140的厚度可为至50nm至500nm,该厚度范围可确保在蚀刻电极层130a时,蚀刻液较易渗透;第一防蚀刻光学层150和第二防蚀刻光学层160的厚度可为为0.05um至5um,该厚度范围有利于确保整体触控电极结构的光穿透率。此外,相比于传统的制造工艺,本实施例的工艺流程中没有涉及去除用于定义电极层的电极图形的掩膜的步骤以及去除用于定义贯穿孔位置掩膜的步骤,因此工艺步骤会更少,制程的时间也会更短,可以提高该工艺的效率。Please refer to FIG. 2f', FIG. 2f and FIG. 2g at the same time. In the touch electrode structure formed by the process of the present invention, a protective layer 140 and a second anti-etching optical layer 160 are formed on the etching area M of the electrode layer 130b; the non-etching area A protective layer 140 , a first anti-etch optical layer 150 , and a second anti-etch optical layer 160 are formed on N. By adjusting the refractive index of the protection layer 140 , the first anti-etch optical layer 150 , and the second anti-etch optical layer 160 , the appearance difference between the etched area M and the non-etched area N after etching can be alleviated. In one embodiment, the refractive index of the first anti-etching optical layer 150 is at least 0.1 greater than the refractive index of the protective layer 140, and the refractive index of the second anti-etching optical layer 160 is at least greater than the refractive index of the first anti-etching optical layer 150. 0.1. The refractive indices of the protection layer 140 , the first anti-etching optical layer 150 and the second anti-etching optical layer 160 can be adjusted according to the refractive indices of different electrode layer materials. In addition, the thickness of the protection layer 140 can be up to 50nm to 500nm, and this thickness range can ensure that when the electrode layer 130a is etched, the etching solution can easily penetrate; the thickness of the first anti-etch optical layer 150 and the second anti-etch optical layer 160 can be The thickness range is from 0.05um to 5um, which is beneficial to ensure the light transmittance of the overall touch electrode structure. In addition, compared with the traditional manufacturing process, the process flow of this embodiment does not involve the step of removing the mask used to define the electrode pattern of the electrode layer and the step of removing the mask used to define the position of the through hole, so the process steps will be Less, the process time will be shorter, which can improve the efficiency of the process.

进一步参考图3a′和图3a,在本实用新型的另一实施例中,在形成如图2f和图2f’的触控电极结构之后,可更进一步形成一光学调整层180覆盖于线路层170上。光学调整层180可为单层结构或多层复合的结构。一方面,光学调整层180可用于保护整体的触控结构;另一方面,光学调整层180亦可起到调节线路层170以及整体触控结构光学外观的作用。光学调整层180的厚度为0.05um至5um。光学调整层280采用可以采用压克力聚合物(Acrylate Polymer)和环氧树脂(Epoxide Resin)等可透视的绝缘材料制成。Further referring to FIG. 3a' and FIG. 3a, in another embodiment of the present invention, after forming the touch electrode structure as shown in FIG. 2f and FIG. 2f', an optical adjustment layer 180 can be further formed to cover the circuit layer 170 superior. The optical adjustment layer 180 can be a single-layer structure or a multi-layer composite structure. On the one hand, the optical adjustment layer 180 can be used to protect the overall touch structure; on the other hand, the optical adjustment layer 180 can also adjust the optical appearance of the circuit layer 170 and the overall touch structure. The thickness of the optical adjustment layer 180 is 0.05um to 5um. The optical adjustment layer 280 is made of transparent insulating materials such as acrylic polymer (Acrylate Polymer) and epoxy resin (Epoxide Resin).

如图4所绘示,为另一实施例的触控电极结构的制造工艺流程图。该制造工艺流程包括以下步骤。As shown in FIG. 4 , it is a flow chart of the manufacturing process of the touch electrode structure of another embodiment. The manufacturing process includes the following steps.

S201:形成一电极层于一基板上。参考图5a′和图5a,电极层230a形成于基板210上。其中基板210可以是玻璃基板或者聚对苯二甲酸类塑料(Polyethylene terephthalate,PET)基板。基板110可为平面或者曲面形状,以适应不同的触控产品。基板110还可为硬质基板或可扰式基板。电极层230a可以采用纳米银丝(Silver Nano-Wire,SNW)层、碳纳米管(Carbon nanotube,CNT)层、石墨烯(Graphene)层、高分子导电(Conductive Polymer)层以及氧化金属(ITO、AZO……Gel)层等可透视的材料。形成电极层130的方式可以采用沉积、溅射等工艺。S201: Form an electrode layer on a substrate. Referring to FIGS. 5 a ′ and 5 a , an electrode layer 230 a is formed on a substrate 210 . The substrate 210 may be a glass substrate or a polyethylene terephthalate (PET) substrate. The substrate 110 can be flat or curved to adapt to different touch products. The substrate 110 can also be a rigid substrate or a perturbable substrate. The electrode layer 230a can be made of nano-silver (Silver Nano-Wire, SNW) layer, carbon nanotube (Carbon nanotube, CNT) layer, graphene (Graphene) layer, polymer conductive (Conductive Polymer) layer and metal oxide (ITO, AZO...Gel) layer and other see-through materials. The manner of forming the electrode layer 130 may adopt processes such as deposition and sputtering.

S202:形成一第一防蚀刻光学层于该电极上。参考图5a′和图5a,与图1所绘示的工艺流程不同之处在于,当电极层采用氧化金属(ITO、AZO……Gel)层等抗氧化能力和附着力较好的材料时,可省略形成保护层的步骤,即直接形成第一防蚀光学层于电极层。第一防蚀刻光学层250具有图案化的形状,其用于在电极层230a上定义出导电电极图形。第一防蚀刻光学层250的其它特性与前述实施例相同,此处不再赘述。S202: Form a first anti-etching optical layer on the electrode. Referring to Figure 5a' and Figure 5a, the difference from the process flow shown in Figure 1 is that when the electrode layer is made of materials with good oxidation resistance and adhesion such as metal oxide (ITO, AZO...Gel) layers, The step of forming the protective layer can be omitted, that is, the first anti-corrosion optical layer is directly formed on the electrode layer. The first anti-etching optical layer 250 has a patterned shape, which is used to define conductive electrode patterns on the electrode layer 230a. Other characteristics of the first anti-etching optical layer 250 are the same as those of the foregoing embodiments, and will not be repeated here.

S203:蚀刻未被该第一防蚀刻光学层遮挡的该电极层,经蚀刻后的该电极层分为一蚀刻区与一非蚀刻区。参考图5b’和图5b,对图5a′和图5a中的电极层230a进行蚀刻,形成图5b’和图5b所示的电极层230b。5b’和图5b所示的电极层230b分为蚀刻区M和非蚀刻区N。蚀刻电极层230a可采用完全蚀刻或不完全蚀刻的工艺。非蚀刻区N的电极层230b包含:至少两个以上的沿第一方向排列的第一电极块232,相邻的第一电极块232通过第一导线234电性连接;至少两个以上的沿第二方向排列的第二电极块236,第二电极块236分别设置于第一导线234两侧。图中仅示出非蚀刻区N的电极层230b的部分电极块,实际的电极层230b应包含更多电极块。由于第一防蚀刻光学层250的遮挡,经过蚀刻后,电极层230b最终形成与第一防蚀刻光学层250所定义的图形相同的电极结构。图5b’和图5b中,第一电极块232、第一导线234以及第二电极块236均位于第一防蚀刻光学层250下。S203: Etch the electrode layer not shielded by the first etch-resistant optical layer, and the etched electrode layer is divided into an etching area and a non-etching area. Referring to Fig. 5b' and Fig. 5b, the electrode layer 230a in Fig. 5a' and Fig. 5a is etched to form the electrode layer 230b shown in Fig. 5b' and Fig. 5b. 5b' and the electrode layer 230b shown in FIG. 5b is divided into an etching region M and a non-etching region N. Etching the electrode layer 230a may use a complete etching process or an incomplete etching process. The electrode layer 230b of the non-etching area N includes: at least two or more first electrode blocks 232 arranged along the first direction, and adjacent first electrode blocks 232 are electrically connected by first wires 234; The second electrode blocks 236 are arranged in the second direction, and the second electrode blocks 236 are respectively arranged on both sides of the first wire 234 . The figure only shows some electrode blocks of the electrode layer 230b in the non-etching region N, and the actual electrode layer 230b should include more electrode blocks. Due to the shielding of the first anti-etching optical layer 250 , after etching, the electrode layer 230 b finally forms the same electrode structure as the pattern defined by the first anti-etching optical layer 250 . In FIG. 5b' and FIG. 5b, the first electrode block 232, the first wire 234 and the second electrode block 236 are all located under the first etch-proof optical layer 250.

S204:形成一第二防蚀刻光学层于该第一防蚀刻光学层和该基板上。参考图5c′和图5c,在蚀刻形成电极层230b之后,在整个基板210之上再覆盖形成第二防蚀刻光学层260,第二防蚀刻光学层260形成于第一防蚀刻光学层250和基板210上,且对应于各第二电极块236上的第二防蚀刻光学层260形成有镂空区域262。第二防蚀刻光学层260的其它特性与前述实施例相同,此处不再赘述。S204: Form a second etch-resistant optical layer on the first etch-resistant optical layer and the substrate. Referring to FIG. 5c' and FIG. 5c, after the electrode layer 230b is formed by etching, a second etch-resistant optical layer 260 is covered and formed on the entire substrate 210, and the second etch-resistant optical layer 260 is formed on the first etch-resistant optical layer 250 and A hollow area 262 is formed on the substrate 210 corresponding to the second anti-etching optical layer 260 on each second electrode block 236 . Other characteristics of the second anti-etch optical layer 260 are the same as those of the foregoing embodiments, and will not be repeated here.

S205:蚀刻该镂空区域处的该第一防蚀刻光学层。参考图5d’和图5d,通过蚀刻镂空区域262处的第一防蚀刻光学层250,可在第一防蚀刻光学层250上形成贯穿孔252。贯穿孔252形成并贯穿于第一防蚀刻光学层250,使得第二电极块236部分外露。镂空区域262和贯穿孔252的其它特性与前述实施例相同,此处不再赘述。S205: Etching the first anti-etching optical layer at the hollow area. Referring to FIG. 5d' and FIG. 5d, by etching the first etch-resistant optical layer 250 at the hollow area 262, a through hole 252 can be formed on the first etch-resistant optical layer 250. Referring to FIG. The through hole 252 is formed and penetrates through the first anti-etch optical layer 250 , so that the second electrode block 236 is partially exposed. Other characteristics of the hollowed out area 262 and the through hole 252 are the same as those of the foregoing embodiments, and will not be repeated here.

S206:形成一线路层。参考图5e′和图5e,线路层270形成于第二防蚀刻光学层260上,并通过镂空区域262及贯穿孔252电性连接相邻的第二电极块136。线路层270的其它特性与前述实施例相同,此处不再赘述。S206: Form a circuit layer. Referring to FIG. 5 e ′ and FIG. 5 e , the circuit layer 270 is formed on the second etch-resistant optical layer 260 , and is electrically connected to the adjacent second electrode blocks 136 through the hollow area 262 and the through hole 252 . Other features of the circuit layer 270 are the same as those of the foregoing embodiments, and will not be repeated here.

同时参考图5b、图5e′和图5e所示,经过上述工艺所得到的触控电极结构,包括:基板210;电极层230b,设置于该基板210上,且电极层230b分为蚀刻区M与非蚀刻区N,其中非蚀刻区N的电极层包含:至少两个以上的沿第一方向排列的第一电极块232,相邻的该些第一电极块232通过第一导线234电性连接;至少两个以上的沿第二方向排列的第二电极块236,所述第二电极块236分别设置于该第一导线234两侧;第一防蚀刻光学层250,设置于非蚀刻区N的电极层230b上,且第一防蚀刻光学层250对应于第二电极块236的位置形成有贯穿孔252;第二防蚀刻光学层260,设置于第一防蚀刻光学层250与基板210上,且第二防蚀刻光学层260对应于贯穿孔252的位置形成有镂空区域262;线路层270,设置于第二防蚀刻光学层260上,且线路层270通过镂空区域262及贯穿孔252电性连接相邻的第二电极块236。另,在另一实施例中,亦可进一步在线路层270形成一光学调整层。本实施例触控电极结构各部件的其它特性,在形成工艺中已详述,故此处不再赘述。5b, 5e' and 5e, the touch electrode structure obtained through the above process includes: a substrate 210; an electrode layer 230b is arranged on the substrate 210, and the electrode layer 230b is divided into etching regions M and the non-etching area N, wherein the electrode layer of the non-etching area N includes: at least two or more first electrode blocks 232 arranged along the first direction, and the adjacent first electrode blocks 232 are electrically connected through the first wire 234 Connection; at least two second electrode blocks 236 arranged along the second direction, the second electrode blocks 236 are respectively arranged on both sides of the first wire 234; the first anti-etching optical layer 250 is arranged in the non-etching area On the electrode layer 230b of N, and the position of the first anti-etch optical layer 250 corresponding to the second electrode block 236 is formed with a through hole 252; the second anti-etch optical layer 260 is arranged on the first anti-etch optical layer 250 and the substrate 210 , and the second anti-etching optical layer 260 is formed with a hollow area 262 corresponding to the position of the through hole 252; the circuit layer 270 is arranged on the second anti-etching optical layer 260, and the circuit layer 270 passes through the hollow area 262 and the through hole 252 The adjacent second electrode blocks 236 are electrically connected. In addition, in another embodiment, an optical adjustment layer may be further formed on the circuit layer 270 . Other characteristics of the components of the touch electrode structure in this embodiment have been described in detail in the formation process, so details will not be repeated here.

上述各实施例中,电极层的电极采用方形的电极块电连接而成,在其他实施例中,电极块还是是棱形、五边形或者六边形等。In the above-mentioned embodiments, the electrodes of the electrode layer are electrically connected by square electrode blocks. In other embodiments, the electrode blocks are also prismatic, pentagonal, or hexagonal.

以上所述实施例仅表达了本实用新型的几种实施方式,其描述较为具体和详细,但并不能因此而理解为对本实用新型专利范围的限制。应当指出的是,对于本领域的普通技术人员来说,在不脱离本实用新型构思的前提下,还可以做出若干变形和改进,这些都属于本实用新型的保护范围。因此,本实用新型专利的保护范围应以所附权利要求为准。The above-mentioned embodiments only express several implementations of the utility model, and the description thereof is relatively specific and detailed, but it should not be construed as limiting the patent scope of the utility model. It should be noted that those skilled in the art can make several modifications and improvements without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the scope of protection of the utility model patent should be based on the appended claims.

Claims (10)

1.一种触控电极结构,其特征在于,包括:1. A touch electrode structure, characterized in that, comprising: 一基板;a substrate; 一电极层,设置于该基板上,且该电极层分为一蚀刻区与一非蚀刻区,其中该非蚀刻区的电极层包含:至少两个以上的沿第一方向排列的第一电极块,相邻的该些第一电极块通过第一导线电性连接;至少两个以上的沿第二方向排列的第二电极块,所述第二电极块分别设置于该第一导线两侧;An electrode layer is arranged on the substrate, and the electrode layer is divided into an etching area and a non-etching area, wherein the electrode layer in the non-etching area includes: at least two or more first electrode blocks arranged along the first direction , the adjacent first electrode blocks are electrically connected by first wires; at least two second electrode blocks arranged along the second direction, the second electrode blocks are respectively arranged on both sides of the first wires; 一第一防蚀刻光学层,设置于该非蚀刻区的电极层上,且该第一防蚀刻光学层对应于该些第二电极块的位置形成有贯穿孔;A first anti-etching optical layer, disposed on the electrode layer in the non-etching area, and the first anti-etching optical layer is formed with through holes corresponding to the positions of the second electrode blocks; 一第二防蚀刻光学层,设置于该第一防蚀刻光学层与该基板上,且该第二防蚀刻光学层对应于该贯穿孔的位置形成有镂空区域;A second anti-etch optical layer, disposed on the first anti-etch optical layer and the substrate, and a hollow area is formed in the second anti-etch optical layer corresponding to the through hole; 一线路层,设置于该第二防蚀刻光学层上,且该线路层通过该镂空区域及该贯穿孔电性连接相邻的第二电极块。A circuit layer is arranged on the second anti-etching optical layer, and the circuit layer is electrically connected to adjacent second electrode blocks through the hollow area and the through hole. 2.根据权利要求1所述的触控电极结构,其特征在于,所述电极层上更形成有一保护层,且该保护层设置于该电极层与该第一防蚀刻光学层之间。2 . The touch electrode structure according to claim 1 , wherein a protection layer is further formed on the electrode layer, and the protection layer is disposed between the electrode layer and the first anti-etching optical layer. 3.根据权利要求1所述的触控电极结构,其特征在于,所述线路层上设置有一光学调整层。3 . The touch electrode structure according to claim 1 , wherein an optical adjustment layer is disposed on the circuit layer. 4 . 4.根据权利要求2所述的触控电极结构,其特征在于,所述保护层的厚度为50nm至500nm。4 . The touch electrode structure according to claim 2 , wherein the protective layer has a thickness of 50 nm to 500 nm. 5.根据权利要求2所述的触控电极结构,其特征在于,所述第一防蚀刻光学层的折射率至少比所述保护层的折射率大0.1。5 . The touch electrode structure according to claim 2 , wherein the refractive index of the first anti-etching optical layer is at least 0.1 greater than that of the protective layer. 6.根据权利要求1或5所述的触控电极结构,其特征在于,所述第二防蚀刻光学层的折射率至少比所述第一防蚀刻光学层的折射率大0.1。6. The touch electrode structure according to claim 1 or 5, wherein the refractive index of the second anti-etching optical layer is at least 0.1 greater than the refractive index of the first anti-etching optical layer. 7.根据权利要求1所述的触控电极结构,其特征在于,所述第一防蚀刻光学层的厚度为0.05um至5um。7 . The touch electrode structure according to claim 1 , wherein the thickness of the first anti-etching optical layer is 0.05 um to 5 um. 8.根据权利要求1所述的触控电极结构,其特征在于,所述第二防蚀刻光学层的厚度为0.05um至5um。8 . The touch electrode structure according to claim 1 , wherein the thickness of the second anti-etching optical layer is 0.05 um to 5 um. 9.根据权利要求1所述的触控电极结构,其特征在于,所述线路层采用可透视的导电材料、金属材料、或合金材料、或前述之组合。9 . The touch electrode structure according to claim 1 , wherein the circuit layer is made of see-through conductive material, metal material, or alloy material, or a combination thereof. 10.根据权利要求1所述的触控电极结构,其特征在于,所述第一防蚀刻光学层材料和所述第二防蚀刻光学层材料为压克力聚合物或环氧树脂。10 . The touch electrode structure according to claim 1 , wherein the first anti-etch optical layer material and the second anti-etch optical layer material are acrylic polymer or epoxy resin. 11 .
CN 201220703025 2012-12-18 2012-12-18 Touch electrode structure Expired - Fee Related CN203117929U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103870043A (en) * 2012-12-18 2014-06-18 宸鸿光电科技股份有限公司 Touch electrode structure and manufacturing process thereof
CN103941948A (en) * 2014-04-28 2014-07-23 山东华芯富创电子科技有限公司 Capacitance type touch panel and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103870043A (en) * 2012-12-18 2014-06-18 宸鸿光电科技股份有限公司 Touch electrode structure and manufacturing process thereof
CN103941948A (en) * 2014-04-28 2014-07-23 山东华芯富创电子科技有限公司 Capacitance type touch panel and manufacturing method thereof

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