CN202026301U - Self-calibration closed-loop analog-digital (AD) conversion circuit - Google Patents
Self-calibration closed-loop analog-digital (AD) conversion circuit Download PDFInfo
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Abstract
本实用新型属于AD转换电路,具体涉及一种自校准闭环AD转换电路。该电路的模拟输入信号通过电子开关和电阻R1与积分器中的运算放大器的负输入端连接;基准源和地通过电子开关串联到电阻R1的一端,电阻R1的另一端与运算放大器的负向输入端连接,运算放大器的正向输入端接地,运算放大器负向输入端与电容C1的一端连接,C1的另一端连接到运算放大器的输出端,同时运算放大器的输出端与电阻R2的一端连接,电阻R2的另一端连接到14位A/D转换器,恒流源通过电子开关与积分器的负输入端连接,电子开关的另一个输出端接地,A/D转换器的另一端与处理器的输入端连接,处理器的一个控制端口与恒流源连接,处理器的另一个控制端口与电子开关的输出端连接。本实用新型的效果是:精度高,误差小。
The utility model belongs to an AD conversion circuit, in particular to a self-calibrating closed-loop AD conversion circuit. The analog input signal of the circuit is connected to the negative input terminal of the operational amplifier in the integrator through the electronic switch and resistor R1; the reference source and ground are connected in series to one end of the resistor R1 through the electronic switch, and the other end of the resistor R1 is connected to the negative input terminal of the operational amplifier. The input terminal is connected, the positive input terminal of the operational amplifier is grounded, the negative input terminal of the operational amplifier is connected to one end of the capacitor C1, the other end of C1 is connected to the output terminal of the operational amplifier, and the output terminal of the operational amplifier is connected to one end of the resistor R2 , the other end of the resistor R2 is connected to the 14-bit A/D converter, the constant current source is connected to the negative input end of the integrator through the electronic switch, the other output end of the electronic switch is grounded, and the other end of the A/D converter is connected to the processing The input end of the processor is connected, one control port of the processor is connected with the constant current source, and the other control port of the processor is connected with the output end of the electronic switch. The utility model has the effects of high precision and small error.
Description
技术领域 technical field
本实用新型属于AD转换电路,具体涉及一种自校准闭环AD转换电路。 The utility model belongs to an AD conversion circuit, in particular to a self-calibrating closed-loop AD conversion circuit. the
背景技术 Background technique
普通的电荷平衡式V/F转换电路在系统应用中存在的矛盾是:一方面,由于电路精度与最大输出频率成反向相关,这就限制了电路的最高工作频率,对一定范围的输入就是限制了最大刻度系数;另一方面,为使系统有足够的动态精度,保证输入信号很小时,导航周期内的采样值足够大,电路刻度系数应当越大越好,这样惯导系统长时间处于小加速度状态下,也能保证足够的计算精度。采用普通的方案无法彻底解决这一对矛盾,只能采用折衷方案,在精度与速度间寻找平衡。 The contradiction that exists in the system application of ordinary charge-balanced V/F conversion circuits is: on the one hand, since the circuit accuracy is inversely related to the maximum output frequency, this limits the maximum operating frequency of the circuit. For a certain range of input, it is The maximum scale coefficient is limited; on the other hand, in order to make the system have sufficient dynamic accuracy and ensure that the sampling value in the navigation cycle is large enough when the input signal is small, the circuit scale coefficient should be as large as possible, so that the inertial navigation system is in a small state for a long time. In the acceleration state, sufficient calculation accuracy can also be guaranteed. It is impossible to completely solve this pair of contradictions by using ordinary solutions, and only a compromise solution can be used to find a balance between accuracy and speed. the
积分输出AD转换电路与传统V/F转换器的相同之处都是基于电荷平衡的工作原理,包含积分器、电流源、开关、逻辑电路等基本部分,通过开关控制电流源的通断实现积分器上的电荷平衡,从而获得输入电压的量化值。但是,积分输出AD转换电路作为一种自校准数字输出V/F转换器,还包含输入切换开关、多位高速AD转换器、计数器、Nios II软核、串行通讯接口等部分,从而实现电路的自校准、计数、输出等功能。 The integral output AD conversion circuit is the same as the traditional V/F converter. It is based on the working principle of charge balance, including integrators, current sources, switches, logic circuits and other basic parts. The switch controls the on-off of the current source to achieve integration. The charge on the device is balanced to obtain a quantized value of the input voltage. However, the integral output AD conversion circuit, as a self-calibrating digital output V/F converter, also includes input switch, multi-bit high-speed AD converter, counter, Nios II soft core, serial communication interface and other parts, so as to realize the circuit Self-calibration, counting, output and other functions. the
发明内容 Contents of the invention
本实用新型的目的是针对现有技术缺陷,提供一种计算精度高的自校准闭环AD转换电路。 The purpose of the utility model is to provide a self-calibrating closed-loop AD conversion circuit with high calculation precision aiming at the defects of the prior art. the
本实用新型是这样实现的:一种自校准闭环A/D转换电路,包括信号输入端,模拟输入信号通过电子开关和电阻R1与积分器中的运算放大器的负输入端连接;基准源和地通过电子开关串联到电阻R1的一端,电阻R1的另一端与运算放大器的负向输入端连接,运算放大器的正向输入端接地,运算放大器负向输入端与电容C1的一端连接,C1的另一端连接到运算放大器的输出端,同时运算放大器的输出端与电阻R2的一端连接,电阻R2的另一端连接到14位A/D转换器,电阻R1、电阻R2、电容C1与运算放大器共同构成积分器电路单元,恒流源通过电子开关与积分器的负输入端连接,电子开关的另一个输出端接地,A/D转换器的另一端与处理器的输入端连接,处理器的一个控制端口与恒流源连接,处理器的另一个控制端口与电子开关的输出端连接,时钟与处理器的时钟端口连接,处理器输出已经转换的数字信号。 The utility model is achieved in this way: a self-calibration closed-loop A/D conversion circuit includes a signal input terminal, and the analog input signal is connected with the negative input terminal of the operational amplifier in the integrator through an electronic switch and a resistor R1; the reference source and the ground The electronic switch is connected in series to one end of the resistor R1, the other end of the resistor R1 is connected to the negative input end of the operational amplifier, the positive input end of the operational amplifier is grounded, the negative input end of the operational amplifier is connected to one end of the capacitor C1, and the other end of C1 One end is connected to the output terminal of the operational amplifier, while the output terminal of the operational amplifier is connected to one end of the resistor R2, and the other end of the resistor R2 is connected to the 14-bit A/D converter, and the resistor R1, the resistor R2, and the capacitor C1 form together with the operational amplifier. In the integrator circuit unit, the constant current source is connected to the negative input terminal of the integrator through an electronic switch, the other output terminal of the electronic switch is grounded, the other terminal of the A/D converter is connected to the input terminal of the processor, and one control of the processor The port is connected with the constant current source, another control port of the processor is connected with the output end of the electronic switch, the clock is connected with the clock port of the processor, and the processor outputs converted digital signals. the
如上所述的一种自校准闭环A/D转换电路,其中,处理器是EP2C8T144芯片。 A self-calibrating closed-loop A/D conversion circuit as described above, wherein the processor is an EP2C8T144 chip. the
如上所述的一种自校准闭环A/D转换电路,其中,电子开关是一个单刀双掷开关。 A self-calibrating closed-loop A/D conversion circuit as described above, wherein the electronic switch is a single-pole double-throw switch. the
如上所述的一种自校准闭环A/D转换电路,其中,电子开关是一个单刀双掷开关。 A self-calibrating closed-loop A/D conversion circuit as described above, wherein the electronic switch is a single-pole double-throw switch. the
本实用新型的效果是:可以获得较大的刻度系数,提高了加速度 计的测量精度,反馈控制速度较低,提高了电路精度,而且使用AD测量残余电荷,缩小了测量误差。采用了工作/校准模式,每一个数字转换器的输入可以在加速度计输入、精密电压参考源、地三者之间进行多路复用,为电路的高精度、小型化、低成本提供了保证。不用后接可逆计数器,直接数字接口可以灵活输出。 The effect of the utility model is: a larger scale coefficient can be obtained, the measurement accuracy of the accelerometer is improved, the feedback control speed is lower, the circuit accuracy is improved, and the measurement error is reduced by using AD to measure the residual charge. Using the work/calibration mode, the input of each digitizer can be multiplexed among the accelerometer input, precision voltage reference source, and ground, which provides a guarantee for high precision, miniaturization, and low cost of the circuit . There is no need to connect a reversible counter, and the direct digital interface can be output flexibly. the
附图说明 Description of drawings
图1是本新型提供的校准闭环AD转换电路的电路结构示意图。 FIG. 1 is a schematic diagram of the circuit structure of the calibration closed-loop AD conversion circuit provided by the present invention. the
图中:1.输入信号、2.电子开关、3.基准源与地、4.电子开关、5.恒流源、6.积分器、7.A/D转换器、8.处理器、9.时钟、10.输出信号。 In the figure: 1. Input signal, 2. Electronic switch, 3. Reference source and ground, 4. Electronic switch, 5. Constant current source, 6. Integrator, 7. A/D converter, 8. Processor, 9 . Clock, 10. Output signal. the
具体实施方式 Detailed ways
如附图1所示,一种自校准闭环A/D转换电路,包括信号输入端,模拟输入信号1通过电子开关2和电阻R1与积分器6中的运算放大器的负输入端连接;基准源和地3通过电子开关2串联到电阻R1的一端,电阻R1的另一端与运算放大器的负向输入端连接,运算放大器的正向输入端接地。电子开关2可以认为是一个单刀双掷开关。运算放大器负向输入端与电容C1的一端连接,C1的另一端连接到运算放大器的输出端,同时运算放大器的输出端与电阻R2的一端连接。电阻R2的另一端连接到14位A/D转换器7。电阻R1、电阻R2、电容C1与运算放大器共同构成积分器电路单元 。恒流源5通过电子开关4与积分器6的负输入端连接。电子开关4的另一个输出端接地,电子开关4可以认为是一个单 刀双掷开关。A/D转换器7的另一端与处理器8的输入端连接,本例中处理器8选择的是EP2C8T144芯片。处理器8的一个控制端口(FB0)与恒流源5连接,处理器8的另一个控制端口(S0)与电子开关2的输出端连接。时钟9与处理器8的时钟端口连接。处理器8输出已经转换的数字信号 。 As shown in accompanying drawing 1, a kind of self-calibration closed-loop A/D conversion circuit comprises a signal input terminal, and an analog input signal 1 is connected with the negative input terminal of the operational amplifier in the integrator 6 through an electronic switch 2 and a resistor R1; and the ground 3 are connected in series to one end of the resistor R1 through the electronic switch 2, the other end of the resistor R1 is connected to the negative input terminal of the operational amplifier, and the positive input terminal of the operational amplifier is grounded. Electronic switch 2 can be considered as a single pole double throw switch. The negative input end of the operational amplifier is connected to one end of the capacitor C1, the other end of C1 is connected to the output end of the operational amplifier, and the output end of the operational amplifier is connected to one end of the resistor R2. The other end of the resistor R2 is connected to the 14-bit A/D converter 7 . Resistor R1, resistor R2, capacitor C1 and the operational amplifier together form an integrator circuit unit. The constant current source 5 is connected to the negative input terminal of the integrator 6 through the electronic switch 4 . The other output end of electronic switch 4 is grounded, and electronic switch 4 can be considered as a single-pole double-throw switch. The other end of the A/D converter 7 is connected to the input end of the processor 8. In this example, the processor 8 selects the EP2C8T144 chip. One control port (FB0) of the processor 8 is connected with the constant current source 5, and the other control port (S0) of the processor 8 is connected with the output end of the electronic switch 2. The clock 9 is connected to the clock port of the processor 8 . Processor 8 outputs the converted digital signal. the
该电路的工作原理和工作过程是:输入信号1通过电子开关2,进入到积分器6进行积分,输出电压到A/D转换器7,A/D转换器7定时进行A/D转换,处理器8判断转换结果,一旦积分器6的输出电压超出设定值,那么处理器8启动平衡回路的电子开关4导通,释放一个当量的电荷,同时处理器8内部的输出累加器增加额定数值,如此回路始终处于平衡状态,而处理器内部的输出累加器则不断累计,累加值乘以权数与当前A/D转换器数值之和为本新型电路取样周期内的输入信号1的数字值,即输出信号10。时钟信号 进入到处理器8中,形成取样时间,定时取走此值输出信号10,同时处理器8清除输出累加器为零,为下次累加做准备。理论上,由于积分器的作用,不存在电荷丢失,即不存在累计误差。如果图1中的A/D转换器退化成一位转换器就是比较器,A/D转换和数字处理时间忽略不计,则电路退化成目前常用的V/F转换电路。 The working principle and working process of this circuit are: the input signal 1 passes through the electronic switch 2, enters the integrator 6 for integration, the output voltage is sent to the A/D converter 7, and the A/D converter 7 performs A/D conversion at regular intervals, processing The converter 8 judges the conversion result. Once the output voltage of the integrator 6 exceeds the set value, the processor 8 starts the electronic switch 4 of the balance circuit to turn on, releasing an equivalent charge, and at the same time, the output accumulator inside the processor 8 increases the rated value , so that the loop is always in a balanced state, and the output accumulator inside the processor is constantly accumulating, and the sum of the accumulated value multiplied by the weight and the current A/D converter value is the digital value of the input signal 1 within the sampling period of the new circuit , that is, the output signal 10. The clock signal enters into the processor 8 to form the sampling time, and the value is taken away regularly to output the signal 10, and the processor 8 clears the output accumulator to be zero at the same time to prepare for the next accumulation. Theoretically, due to the action of the integrator, there is no loss of charge, that is, no cumulative error. If the A/D converter in Figure 1 degenerates into a one-bit converter that is a comparator, and the A/D conversion and digital processing time are negligible, the circuit degenerates into a commonly used V/F conversion circuit at present. the
该电路具有两种运行状态,一种是工作模式,另一种是 校准模式。 The circuit has two operating states, one is working mode and the other is calibration mode. the
在工作模式下,输入信号1通过电子开关2连接到积分器6。积分器6的输出量被A/D转换器7采样和转换。当积分器6的输出量达到预定值,处理器8开始执行合适极性的再平衡控制,随后软件开始读出积分器6的剩余量,将该剩余量与用于再平衡的脉冲数进行综合,输出数字量10正比于输入信号1,实现A/D转换的功能。 In working mode, the input signal 1 is connected to the integrator 6 via the electronic switch 2 . The output of the integrator 6 is sampled and converted by the A/D converter 7 . When the output of the integrator 6 reaches the predetermined value, the processor 8 starts to execute rebalancing control with appropriate polarity, and then the software starts to read the remaining quantity of the integrator 6, and integrates the remaining quantity with the number of pulses used for rebalancing , the output digital quantity 10 is proportional to the input signal 1, realizing the function of A/D conversion. the
在校准模式下,积分器6的输入端通过电子开关2接地,A/D转换器7工作在超出规定的电压范围之外以确定通道误差。然后积分器6的输入端连接到基准源3,执行额外的转换来确定通道的比值。执行不对称校准时,开始一个负极性再平衡控制过程,立刻进行一个正极性再平衡控制过程,随后在积分器6的输出端进行AD转换。一个校准周期完成后,处理器8存储积分器的误差常量,将积分器6的输入端通过电子开关2切换到输入信号1的端口,一个校准周期完成后,处理器8存储积分器6的误差常量,将积分器6的输入端通过电子开关2切换到输入信号1的端口,然后校准下一通道。 In the calibration mode, the input terminal of the integrator 6 is grounded through the electronic switch 2, and the A/D converter 7 works outside the specified voltage range to determine the channel error. The input of integrator 6 is then connected to reference source 3 and an additional conversion is performed to determine the ratio of the channels. When the asymmetry calibration is performed, a negative polarity rebalance control process is started, and a positive polarity rebalance control process is immediately performed, followed by AD conversion at the output terminal of the integrator 6 . After a calibration cycle is completed, the processor 8 stores the error constant of the integrator, switches the input terminal of the integrator 6 to the port of the input signal 1 through the electronic switch 2, and after a calibration cycle is completed, the processor 8 stores the error constant of the integrator 6 Constant, switch the input terminal of integrator 6 to the port of input signal 1 through electronic switch 2, and then calibrate the next channel. the
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103338042A (en) * | 2013-06-24 | 2013-10-02 | 北京航天控制仪器研究所 | Analog-digital conversion circuit for dynamically tuned gyroscope |
| CN106153981A (en) * | 2016-05-24 | 2016-11-23 | 中国人民解放军海军工程大学 | IEPE type intelligence acceleration transducer and method of work thereof |
| CN106921389A (en) * | 2015-12-24 | 2017-07-04 | 北京自动化控制设备研究所 | A kind of REAL-TIME SELF method of voltage/frequency change-over circuit |
| CN108352839A (en) * | 2015-11-11 | 2018-07-31 | 三菱电机株式会社 | A/D conversion equipments |
| CN110531296A (en) * | 2019-08-09 | 2019-12-03 | 格威半导体(厦门)有限公司 | The gain calibration methods thereof of battery management system |
| CN111948520A (en) * | 2020-08-25 | 2020-11-17 | 上海鑫匀源科技有限公司 | Multi-path real-time monitoring power supply system for aging test and test method |
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2011
- 2011-03-23 CN CN2011200782439U patent/CN202026301U/en not_active Expired - Lifetime
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| CN103338042A (en) * | 2013-06-24 | 2013-10-02 | 北京航天控制仪器研究所 | Analog-digital conversion circuit for dynamically tuned gyroscope |
| CN103338042B (en) * | 2013-06-24 | 2016-09-21 | 北京航天控制仪器研究所 | A kind of dynamically tuned gyro, DTG analog to digital conversion circuit |
| CN108352839A (en) * | 2015-11-11 | 2018-07-31 | 三菱电机株式会社 | A/D conversion equipments |
| CN108352839B (en) * | 2015-11-11 | 2023-02-21 | 三菱电机株式会社 | A/D conversion device |
| CN106921389A (en) * | 2015-12-24 | 2017-07-04 | 北京自动化控制设备研究所 | A kind of REAL-TIME SELF method of voltage/frequency change-over circuit |
| CN106153981A (en) * | 2016-05-24 | 2016-11-23 | 中国人民解放军海军工程大学 | IEPE type intelligence acceleration transducer and method of work thereof |
| CN106153981B (en) * | 2016-05-24 | 2022-09-27 | 中国人民解放军海军工程大学 | IEPE type intelligent acceleration sensor and working method thereof |
| CN110531296A (en) * | 2019-08-09 | 2019-12-03 | 格威半导体(厦门)有限公司 | The gain calibration methods thereof of battery management system |
| CN113126540A (en) * | 2019-12-30 | 2021-07-16 | 新唐科技股份有限公司 | Microcontroller and control method |
| CN113126540B (en) * | 2019-12-30 | 2023-12-15 | 新唐科技股份有限公司 | Microcontroller and control method |
| CN111948520A (en) * | 2020-08-25 | 2020-11-17 | 上海鑫匀源科技有限公司 | Multi-path real-time monitoring power supply system for aging test and test method |
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