[go: up one dir, main page]

CN201430543Y - A Universal Switched Capacitor Diode Clamp Combination Multilevel Circuit - Google Patents

A Universal Switched Capacitor Diode Clamp Combination Multilevel Circuit Download PDF

Info

Publication number
CN201430543Y
CN201430543Y CN2009201212331U CN200920121233U CN201430543Y CN 201430543 Y CN201430543 Y CN 201430543Y CN 2009201212331 U CN2009201212331 U CN 2009201212331U CN 200920121233 U CN200920121233 U CN 200920121233U CN 201430543 Y CN201430543 Y CN 201430543Y
Authority
CN
China
Prior art keywords
link
tie point
point
diode
tie
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2009201212331U
Other languages
Chinese (zh)
Inventor
何湘宁
韩云龙
赵菁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhejiang University ZJU
Original Assignee
Zhejiang University ZJU
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhejiang University ZJU filed Critical Zhejiang University ZJU
Priority to CN2009201212331U priority Critical patent/CN201430543Y/en
Application granted granted Critical
Publication of CN201430543Y publication Critical patent/CN201430543Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Inverter Devices (AREA)

Abstract

本实用新型公开的通用型开关电容二极管箝位组合多电平电路,是通过开关电容电路和二极管箝位拓扑的电路组合来实现多电平输出的。该拓扑可以实现n电平电压输出,n≥4。每个桥臂包括2n-5个电容器,其中n-3个为直流母线电容,n-2个为悬浮电容;4×(n-2)个开关管,其中2×(n-2)个为主开关管,2×(n-2)个为箝位开关管;(n-2)×(n-3)个箝位二极管。本实用新型的优点是:1.利用开关电容电路实现母线电容电压的自动平衡,可以解决传统二极管箝位拓扑在高电平数情况下电容电压平衡难以实现的问题;2.低输入电压,利用开关电容拓扑电路实现高电压输出(输出电压峰峰值大于输入电压幅值);3.开关器件较少。

Figure 200920121233

The utility model discloses a general switched capacitor diode clamp combined multilevel circuit, which realizes multilevel output through the circuit combination of switched capacitor circuit and diode clamp topology. This topology can realize n-level voltage output, n≥4. Each bridge arm includes 2n-5 capacitors, of which n-3 are DC bus capacitors, and n-2 are suspension capacitors; 4×(n-2) switch tubes, of which 2×(n-2) are As for the main switch tube, 2×(n-2) clamp switch tubes; (n-2)×(n-3) clamp diodes. The advantages of the utility model are: 1. The automatic balance of the bus capacitor voltage can be realized by using the switched capacitor circuit, which can solve the problem that the capacitor voltage balance is difficult to realize in the case of high level numbers in the traditional diode clamp topology; 2. Low input voltage, using The switched capacitor topology circuit realizes high voltage output (the peak-to-peak output voltage is greater than the input voltage amplitude); 3. There are fewer switching devices.

Figure 200920121233

Description

一种通用型开关电容二极管箝位组合多电平电路 A Universal Switched Capacitor Diode Clamp Combination Multilevel Circuit

技术领域 technical field

本实用新型是一种用于直流-交流相互转换的多电平逆变拓扑,具体说是一种通用型的开关电容电路和二极管箝位电路组合的多电平逆变拓扑。The utility model is a multi-level inverter topology used for mutual conversion between direct current and alternating current, specifically a multi-level inverter topology combined with a general switched capacitor circuit and a diode clamping circuit.

背景技术 Background technique

传统的多电平逆变器主要分为三类基本拓扑:二极管箝位型、飞跨电容型和级联型。它们在实际应用中都存在一定的问题。其中二极管箝位型拓扑的主要问题是直流母线分压电容电压不平衡,尤其是在高电平数的情况下,该问题成为限制多电平在实际应用中推广的主要因素。近些年来,很多新的拓扑改进和控制理论被提出和研究,用于解决直流母线分压电容电压不平衡的问题。但是这些新的改进方法或者是附加比较复杂的硬件电路,或者是采用比较复杂的控制算法,或者是在三电平下适用,但在五电平及更高电平下就不再适用,可以说这个直流母线分压电容电压不平衡的问题并未妥善解决。Traditional multilevel inverters are mainly divided into three basic topologies: diode-clamped, flying-capacitor, and cascaded. They all have certain problems in practical application. Among them, the main problem of the diode-clamped topology is the unbalanced voltage of the DC bus voltage dividing capacitor, especially in the case of a high number of levels. This problem has become the main factor limiting the promotion of multi-level in practical applications. In recent years, many new topology improvements and control theories have been proposed and studied to solve the problem of unbalanced voltage of DC bus voltage dividing capacitors. However, these new improved methods either add more complex hardware circuits, or use more complex control algorithms, or are applicable at three levels, but are no longer applicable at five levels and higher. It is said that the problem of unbalanced voltage of the DC bus voltage dividing capacitor has not been properly solved.

发明内容 Contents of the invention

本实用新型的目的是提供一种使用器件数量较少,具有直流母线电容电压自动平衡,可以实现升压输出的通用型开关电容二极管箝位组合多电平电路。The purpose of the utility model is to provide a general-purpose switched capacitor diode clamp combination multi-level circuit with a small number of components, automatic balance of DC bus capacitor voltage, and boost output.

本实用新型的通用型开关电容二极管箝位组合多电平电路,设有n电平电压输出,n为大于等于4的正整数,每个桥臂包括:The general-purpose switched capacitor diode clamp combination multi-level circuit of the utility model is provided with an n-level voltage output, n is a positive integer greater than or equal to 4, and each bridge arm includes:

1)2n-5个电容器,其中n-3个为直流母线电容,n-2个为悬浮电容;1) 2n-5 capacitors, of which n-3 are DC bus capacitors and n-2 are suspension capacitors;

2)4×(n-2)个开关管,每个开关管均为带反并二极管的有源开关管,其中2×(n-2)个为主开关管,2×(n-2)个为箝位开关管;2) 4×(n-2) switch tubes, each switch tube is an active switch tube with an anti-parallel diode, of which 2×(n-2) are the main switch tubes, and 2×(n-2) One is a clamp switch tube;

3)(n-2)×(n-3)个箝位二极管;3) (n-2)×(n-3) clamping diodes;

n-3个直流母线电容依次串联构成一条直流母线电容链路,连接方式为,前面一个电容的负极与后面一个电容的正极相连接,连接处构成一个连接点,第一个电容的正极和最后一个电容的负极分别作为起始连接点和终端连接点,该直流母线电容链路共计有n-2个连接点,n-2个连接点按连接顺序依次编号,起始连接点为1,终端连接点为n-2;n-3 DC bus capacitors are connected in series to form a DC bus capacitor link. The connection method is that the negative pole of the previous capacitor is connected with the positive pole of the latter capacitor, and the connection constitutes a connection point. The positive pole of the first capacitor and the last The negative pole of a capacitor is used as the initial connection point and the terminal connection point respectively. The DC bus capacitor link has a total of n-2 connection points, and the n-2 connection points are numbered in sequence according to the connection sequence. The join point is n-2;

2×(n-2)个箝位开关管依次串联构成一条箝位开关管链路,连接方式为,前面一个箝位开关管的发射极与后面一个箝位开关管的集电极相连,连接处构成一个连接点,第一个箝位开关管的集电极和最后一个箝位开关管的发射极分别作为起始连接点和终端连接点,该箝位开关管链路共有2n-3个连接点,2n-3个接点按连接顺序依次编号,起始连接点为1,终端连接点为2n-3;2×(n-2) clamp switch tubes are connected in series to form a clamp switch tube link. Constitute a connection point, the collector of the first clamping switch tube and the emitter of the last clamping switch tube are used as the starting connection point and the terminal connection point respectively, and the clamping switch tube link has a total of 2n-3 connection points , 2n-3 contacts are numbered according to the connection sequence, the initial connection point is 1, and the terminal connection point is 2n-3;

n-2个悬浮电容依次串联构成一条悬浮电容链路,连接方式为,前面一个电容的负极与后面一个电容的正极相连接,连接处构成一个连接点,第一个悬浮电容的正极和最后一个悬浮电容的负极分别作为起始连接点和终端连接点,该悬浮电容链路共计有n-1个连接点,n-1个连接点按连接顺序依次编号,起始连接点为1,终端连接点为n-1;n-2 floating capacitors are connected in series to form a floating capacitor link. The connection method is that the negative pole of the previous capacitor is connected with the positive pole of the latter capacitor, and the connection constitutes a connection point. The positive pole of the first floating capacitor and the last The negative pole of the floating capacitor is used as the initial connection point and the terminal connection point respectively. The floating capacitor link has a total of n-1 connection points, and the n-1 connection points are numbered in sequence according to the connection sequence. Points are n-1;

箝位开关管链路中编号为偶数的连接点和直流母线电容链路中的连接点按编号升序依次相连,箝位开关管链路中编号为奇数的连接点和悬浮电容链路中的连接点按编号升序依次相连,构成开关电容二极管箝位组合多电平电路的开关电容拓扑部分;The even-numbered connection points in the clamp switch tube link and the connection points in the DC bus capacitor link are connected in ascending order of number, and the odd-numbered connection points in the clamp switch tube link are connected to the connection points in the suspension capacitor link The points are connected in ascending order of numbers to form the switched capacitor topological part of the switched capacitor diode clamp combination multilevel circuit;

2×(n-2)个主开关管依次串联构成一条主开关管链路,连接方式为,前面一个主开关管的发射极与后面一个主开关管的集电极相连,连接处构成一个连接点,第一个主开关管的集电极和最后一个主开关管的发射极分别作为起始连接点和终端连接点,该主开关管链路共有2n-3个连接点,2n-3个连接点按连接顺序依次编号,起始连接点为1,终端连接点为2n-3;2×(n-2) main switching tubes are serially connected in series to form a main switching tube link. The connection method is that the emitter of the front main switching tube is connected with the collector of the following main switching tube, and the connection constitutes a connection point , the collector of the first main switching tube and the emitter of the last main switching tube are used as the initial connection point and the terminal connection point respectively, the main switching tube link has 2n-3 connection points in total, and 2n-3 connection points Numbered in order of connection, the initial connection point is 1, and the terminal connection point is 2n-3;

(n-2)×(n-3)个箝位二极管构成n-3条箝位二极管链路,设i为小于等于n-3的正整数,第i条箝位二极管链路由2i个箝位二极管依次串联构成,其连接方式为,前面一个箝位二极管的阳极与后面一个箝位二极管的阴极相连,连接处构成一个连接点,每条链路上的第一个箝位二极管的阴极和最后一个箝位二极管的阳极分别作为起始连接点和终端连接点,第i条链路上共有2i+1个连接点,2i+1个连接点按连接顺序依次编号,起始连接点为1,终端连接点为2i+1;第i条箝位二极管链路中的第1个连接点和主开关管链路中第n-1-i个连接点相连,第2i+1个连接点和主开关管链路中第n-1+i个连接点相连接,第i条箝位二极管链路上的其余连接点中编号为奇数的连接点与第i-1条箝位二极管链路中编号为偶数的连接点按编号升序依次相连;悬浮电容链路中第一个连接点与主开关管链路中第一个连接点相连,悬浮电容链路中最后一个连接点与主开关管链路中最后一个连接点相连,悬浮电容链路中其余连接点与第n-3条箝位二极管链路中编号为偶数的连接点按编号升序依次相连,构成开关电容二极管箝位组合多电平电路的二极管箝位拓扑部分;主开关管链路中的第n-1个连接点作为输出连接点。(n-2)×(n-3) clamping diodes form n-3 clamping diode chains, i is set to be a positive integer less than or equal to n-3, and the i-th clamping diode chain consists of 2i clamping diodes Diodes are connected in series in sequence. The connection method is that the anode of the previous clamping diode is connected with the cathode of the next clamping diode, and the connection constitutes a connection point. The cathode of the first clamping diode on each link and The anode of the last clamping diode is used as the initial connection point and the terminal connection point respectively. There are 2i+1 connection points on the i-th link, and the 2i+1 connection points are numbered in sequence according to the connection sequence, and the initial connection point is 1 , the terminal connection point is 2i+1; the first connection point in the i-th clamping diode link is connected to the n-1-i-th connection point in the main switch tube link, and the 2i+1-th connection point is connected to The n-1+i connection point in the main switch tube link is connected, and the odd-numbered connection points among the remaining connection points on the i-th clamping diode link are connected to the i-1 clamping diode link The connection points with even numbers are connected in ascending order; the first connection point in the suspension capacitor link is connected to the first connection point in the main switch tube link, and the last connection point in the suspension capacitor link is connected to the main switch tube chain. The last connection point in the circuit is connected, and the remaining connection points in the suspension capacitor link are connected with the even-numbered connection points in the n-3 clamping diode link in ascending order of numbers to form a multi-level switching capacitor diode clamping combination The diode clamp topology part of the circuit; the n-1th connection point in the main switching tube chain is used as the output connection point.

本实用新型的通用型开关电容二极管箝位组合多电平电路,其直流输入电压可以有多种接入方式。直流输入电压可以接在直流母线电容链路或者悬浮电容链路中任意j个连续串联电容的两端,其中n-2≥j≥1,j为正整数,实现

Figure G2009201212331D00031
倍的升压输出,即输出电压的峰峰值为输入电压幅值的倍。In the general-purpose switched capacitor diode clamp combination multi-level circuit of the utility model, the direct current input voltage can have multiple access modes. The DC input voltage can be connected to both ends of any j continuous series capacitors in the DC bus capacitor link or floating capacitor link, where n-2≥j≥1, j is a positive integer, to achieve
Figure G2009201212331D00031
times the boost output, that is, the peak-to-peak output voltage is equal to the input voltage amplitude times.

在单相工作时,考虑到电路正负电平的对称性和器件上的损耗,直流输入电压的两个输入端口一般是关于输出连接点对称的;在三相工作时,考虑到三相之间的对称型和器件的损耗,直流输入电压的两个输入端口一般只接在直流母线电容链路上,并且关于输出连接点对称。In single-phase operation, considering the symmetry of the positive and negative levels of the circuit and the loss on the device, the two input ports of the DC input voltage are generally symmetrical about the output connection point; in three-phase operation, considering the three-phase Between the symmetrical type and the loss of the device, the two input ports of the DC input voltage are generally only connected to the DC bus capacitor link, and are symmetrical about the output connection point.

本实用新型的通用型开关电容二极管箝位组合多电平电路,是通过开关电容拓扑和二极管箝位拓扑的电路组合来实现多电平输出的。其优点是:1.利用开关电容拓扑电路实现母线电容电压的自动平衡,可以解决传统二极管箝位拓扑在高电平数情况下电容电压平衡难以实现的问题;2.低输入电压,利用开关电容拓扑电路实现高电压输出(输出电压峰峰值大于输入电压幅值),这种升压功能可以减小输入变压器的变比甚至省去输入变压器;3.开关器件较少。The general-purpose switched capacitor diode clamp combination multi-level circuit of the utility model realizes multi-level output through the circuit combination of switch capacitor topology and diode clamp topology. Its advantages are: 1. Using the switched capacitor topology circuit to realize the automatic balance of the bus capacitor voltage can solve the problem that the capacitor voltage balance is difficult to achieve in the case of high level numbers in the traditional diode clamp topology; 2. Low input voltage, using the switched capacitor The topology circuit realizes high voltage output (the peak-to-peak value of the output voltage is greater than the amplitude of the input voltage). This boost function can reduce the transformation ratio of the input transformer or even save the input transformer; 3. There are fewer switching devices.

附图说明 Description of drawings

图1所示是本实用新型的通用型开关电容二极管箝位组合多电平电路电路图(单臂电路);Shown in Fig. 1 is the general-purpose switched capacitor diode clamp combination multi-level circuit circuit diagram (single-arm circuit) of the present utility model;

图2所示为通用型开关电容二极管箝位组合五电平电路电路图(单臂电路)。Figure 2 shows the circuit diagram of a general-purpose switched capacitor diode clamp combination five-level circuit (single-arm circuit).

具体实施方式 Detailed ways

参照图1,通用型开关电容二极管箝位组合多电平电路,设有n电平电压输出,n为大于等于4的正整数,每个桥臂包括:Referring to Figure 1, the general-purpose switched capacitor diode clamp combined multilevel circuit is provided with an n-level voltage output, n is a positive integer greater than or equal to 4, and each bridge arm includes:

1)2n-5个电容器,其中n-3个为直流母线电容C1~C(n-3),n-2个为悬浮电容Cc1~Cc(n-2)1) 2n-5 capacitors, of which n-3 are DC bus capacitors C 1 ~C (n-3) and n-2 are floating capacitors Cc 1 ~Cc (n-2) ;

2)4×(n-2)个开关管,每个开关管均为带反并二极管的有源开关管,其中2×(n-2)个为主开关管S1~S2n-4,2×(n-2)个为箝位开关管Sc1~Sc2n-42) 4×(n-2) switching tubes, each switching tube is an active switching tube with an anti-parallel diode, of which 2×(n-2) are the main switching tubes S 1 to S 2n-4 , 2×(n-2) clamp switch tubes Sc 1 ~ Sc 2n-4 ;

3)(n-2)×(n-3)个箝位二极管Dc1~Dc(n-2)×(n-3)3) (n-2)×(n-3) clamping diodes Dc 1 to Dc (n-2)×(n-3) ;

n-3个直流母线电容C1~C(n-3)依次串联构成一条直流母线电容链路,连接方式为,前面一个电容的负极与后面一个电容的正极相连接,连接处构成一个连接点,第一个电容C1的正极和最后一个电容C(n-3)的负极分别作为起始连接点和终端连接点,该直流母线电容链路共计有n-2个连接点,n-2个连接点按连接顺序依次编号,起始连接点为1,终端连接点为n-2;n-3 DC bus capacitors C 1 ~ C (n-3) are connected in series to form a DC bus capacitor link. The connection method is that the negative pole of the previous capacitor is connected with the positive pole of the latter capacitor, and the connection constitutes a connection point , the positive pole of the first capacitor C 1 and the negative pole of the last capacitor C (n-3) are used as the initial connection point and the terminal connection point respectively. The DC bus capacitor link has a total of n-2 connection points, n-2 The connection points are numbered sequentially according to the connection sequence, the initial connection point is 1, and the terminal connection point is n-2;

2×(n-2)个箝位开关管Sc1~Sc2n-4依次串联构成一条箝位开关管链路,连接方式为,前面一个箝位开关管的发射极与后面一个箝位开关管的集电极相连,连接处构成一个连接点,第一个箝位开关管Sc1的集电极和最后一个箝位开关管Sc2n-4的发射极分别作为起始连接点和终端连接点,该箝位开关管链路共有2n-3个连接点,2n-3个接点按连接顺序依次编号,起始连接点为1,终端连接点为2n-3;2×(n-2) clamping switch tubes Sc 1 ~ Sc 2n-4 are sequentially connected in series to form a clamping switch tube link. The collectors of the clamping switches Sc 1 and the emitters of the last clamping switching tube Sc 2n-4 are respectively used as the initial connection point and the terminal connection point. There are 2n-3 connection points in the clamp switch tube link, and the 2n-3 contacts are numbered in sequence according to the connection sequence, the initial connection point is 1, and the terminal connection point is 2n-3;

n-2个悬浮电容Cc1~Cc(n-2)依次串联构成一条悬浮电容链路,连接方式为,前面一个电容的负极与后面一个电容的正极相连接,连接处构成一个连接点,第一个悬浮电容Cc1的正极和最后一个悬浮电容Cc(n-2)的负极分别作为起始连接点和终端连接点,该悬浮电容链路共计有n-1个连接点,n-1个连接点按连接顺序依次编号,起始连接点为1,终端连接点为n-1;n-2 floating capacitors Cc 1 ~ Cc (n-2) are connected in series to form a floating capacitor link. The connection method is that the negative pole of the previous capacitor is connected with the positive pole of the latter capacitor, and the connection constitutes a connection point. The positive pole of a floating capacitor Cc 1 and the negative pole of the last floating capacitor Cc (n-2) are used as the initial connection point and the terminal connection point respectively. The floating capacitor link has a total of n-1 connection points, n-1 The connection points are numbered in sequence according to the connection sequence, the initial connection point is 1, and the terminal connection point is n-1;

箝位开关管链路中编号为偶数的连接点和直流母线电容链路中的连接点按编号升序依次相连,箝位开关管链路中编号为奇数的连接点和悬浮电容链路中的连接点按编号升序依次相连,构成开关电容二极管箝位组合多电平电路的开关电容拓扑部分;The even-numbered connection points in the clamp switch tube link and the connection points in the DC bus capacitor link are connected in ascending order of number, and the odd-numbered connection points in the clamp switch tube link are connected to the connection points in the suspension capacitor link The points are connected in ascending order of numbers to form the switched capacitor topological part of the switched capacitor diode clamp combination multilevel circuit;

2×(n-2)个主开关管S1~S2n-4依次串联构成一条主开关管链路,连接方式为,前面一个主开关管的发射极与后面一个主开关管的集电极相连,连接处构成一个连接点,第一个主开关管S1的集电极和最后一个主开关管S2n-4的发射极分别作为起始连接点和终端连接点,该主开关管链路共有2n-3个连接点,2n-3个连接点按连接顺序依次编号,起始连接点为1,终端连接点为2n-3;2×(n-2) main switching tubes S 1 ~ S 2n-4 are connected in series to form a main switching tube link. The connection method is that the emitter of the front main switching tube is connected with the collector of the rear main switching tube , the connection constitutes a connection point, the collector of the first main switching tube S 1 and the emitter of the last main switching tube S 2n-4 serve as the initial connection point and the terminal connection point respectively, and the main switching tube link has a total of 2n-3 connection points, 2n-3 connection points are numbered in sequence according to the connection sequence, the starting connection point is 1, and the terminal connection point is 2n-3;

(n-2)×(n-3)个箝位二极管Dc1~Dc(n-2)×(n-3)构成n-3条箝位二极管链路,设i为小于等于n-3的正整数,第i条箝位二极管链路由2i个箝位二极管Dci×(i-1) +1~Dci×(i+1)依次串联构成,其连接方式为,前面一个箝位二极管的阳极与后面一个箝位二极管的阴极相连,连接处构成一个连接点,每条链路上的第一个箝位二极管Dci×(i-1)+1的阴极和最后一个箝位二极管Dci×(i+1)的阳极分别作为起始连接点和终端连接点,第i条链路上共有2i+1个连接点,2i+1个连接点按连接顺序依次编号,起始连接点为1,终端连接点为2i+1;第i条箝位二极管链路中的第1个连接点和主开关管链路中第n-1-i个连接点相连,第2i+1个连接点和主开关管链路中第n-1+i个连接点相连接,第i条箝位二极管链路上的其余连接点中编号为奇数的连接点与第i-1条箝位二极管链路中编号为偶数的连接点按编号升序依次相连;悬浮电容链路中第一个连接点与主开关管链路中第一个连接点相连,悬浮电容链路中最后一个连接点与主开关管链路中最后一个连接点相连,悬浮电容链路中其余连接点与第n-3条箝位二极管链路中编号为偶数的连接点按编号升序依次相连,构成开关电容二极管箝位组合多电平电路的二极管箝位拓扑部分;主开关管链路中的第n-1个连接点作为输出连接点。(n-2)×(n-3) clamping diodes Dc 1 ~Dc (n-2)×(n-3) constitute n-3 clamping diode links, set i to be less than or equal to n-3 positive integer, the i-th clamping diode chain consists of 2i clamping diodes Dc i×(i-1) +1 ~Dc i×(i+1) connected in series in sequence, and the connection method is that the previous clamping diode The anode of the first clamping diode Dc i×(i-1)+1 on each link is connected to the cathode of the last clamping diode Dc The anodes of i×(i+1) are respectively used as the initial connection point and the terminal connection point. There are 2i+1 connection points on the i-th link, and the 2i+1 connection points are numbered in sequence according to the connection sequence. The initial connection point is 1, the terminal connection point is 2i+1; the first connection point in the i-th clamping diode link is connected to the n-1-i-th connection point in the main switch tube link, and the 2i+1 connection point The point is connected to the n-1+i connection point in the main switch tube chain, and the odd-numbered connection points in the other connection points on the i-th clamping diode chain are connected to the i-1 clamping diode chain The even-numbered connection points in the road are connected in ascending order; the first connection point in the suspension capacitor link is connected to the first connection point in the main switch tube link, and the last connection point in the suspension capacitor link is connected to the main switch. The last connection point in the tube link is connected, and the remaining connection points in the suspension capacitor link are connected with the even-numbered connection points in the n-3 clamping diode link in ascending order of numbers to form a multi-switch capacitor diode clamping combination. The diode clamp topology part of the level circuit; the n-1th connection point in the main switch tube chain is used as the output connection point.

图2所示为通用型开关电容二极管箝位组合五电平电路单臂实例。其电平n为5,每个桥臂包括:5个电容器,其中2个为直流母线电容C1~C2,3个为悬浮电容Cc1~Cc3;12个开关管,每个开关管均为带反并二极管的有源开关管,其中6个为主开关管S1~S6,6个为箝位开关管Sc1~Sc6;6个箝位二极管Dc1~Dc6Figure 2 shows an example of a single arm of a general-purpose switched capacitor diode clamp combination five-level circuit. Its level n is 5, and each bridge arm includes: 5 capacitors, 2 of which are DC bus capacitors C 1 ~ C 2 , and 3 are suspension capacitors Cc 1 ~ Cc 3 ; 12 switching tubes, each switching tube All are active switching tubes with anti-parallel diodes, of which 6 are main switching tubes S 1 ~ S 6 , 6 are clamping switching tubes Sc 1 ~ Sc 6 ; 6 clamping diodes Dc 1 ~ Dc 6 ;

2个直流母线电容C1~C2依次串联构成一条直流母线电容链路,连接方式为,第一个电容C1的负极与第二个电容C2的正极相连接,连接处构成一个连接点,第一个电容C1的正极和第二个电容C2的负极分别作为起始连接点和终端连接点,该直流母线电容链路共计有3个连接点,3个连接点按连接顺序依次编号,起始连接点为1,终端连接点为3;Two DC bus capacitors C 1 ~ C 2 are connected in series to form a DC bus capacitor link. The connection method is that the negative pole of the first capacitor C1 is connected with the positive pole of the second capacitor C2, and the connection constitutes a connection point. The positive pole of one capacitor C1 and the negative pole of the second capacitor C2 are used as the initial connection point and the terminal connection point respectively. There are 3 connection points in total in this DC bus capacitor link, and the 3 connection points are numbered in sequence according to the connection sequence. The connection point is 1, and the terminal connection point is 3;

6个箝位开关管Sc1~Sc6依次串联构成一条箝位开关管链路,连接方式为,前面一个箝位开关管的发射极与后面一个箝位开关管的集电极相连,连接处构成一个连接点,第一个箝位开关管Sc1的集电极和第六个箝位开关管Sc6的发射极分别作为起始连接点和终端连接点,该箝位开关管链路共有7个连接点,7个连接点按连接顺序依次编号,起始连接点为1,终端连接点为7;Six clamp switch tubes Sc 1 ~ Sc 6 are connected in series to form a clamp switch tube link. The connection mode is that the emitter of the front clamp switch tube is connected with the collector of the rear clamp switch tube, and the connection constitutes One connection point, the collector of the first clamping switch Sc1 and the emitter of the sixth clamping switch Sc6 are respectively used as the initial connection point and the terminal connection point. There are 7 connections in this clamping switch tube chain point, the 7 connection points are numbered in sequence according to the connection sequence, the initial connection point is 1, and the terminal connection point is 7;

3个悬浮电容Cc1~Cc3依次串联构成一条悬浮电容链路,连接方式为,前面一个电容的负极与后面一个电容的正极相连接,连接处构成一个连接点,第一个悬浮电容Cc1的正极和第三个悬浮电容Cc3的负极分别作为起始连接点和终端连接点,该悬浮电容链路共计有4个连接点,4个连接点按连接顺序依次编号,起始连接点为1,终端连接点为4;Three floating capacitors Cc 1 ~ Cc 3 are connected in series to form a floating capacitor link. The connection method is that the negative pole of the previous capacitor is connected with the positive pole of the latter capacitor, and the connection constitutes a connection point. The first floating capacitor Cc 1 The positive pole of the floating capacitor Cc 3 and the negative pole of the third floating capacitor Cc 3 are respectively used as the initial connection point and the terminal connection point. The floating capacitor link has a total of 4 connection points, and the 4 connection points are numbered in sequence according to the connection sequence. The initial connection point is 1, the terminal connection point is 4;

箝位开关管链路中编号为偶数的连接点和直流母线电容链路中的连接点按编号升序依次相连,即,箝位开关管链路中第2个连接点与直流母线电容链路中第1个连接点相连(Sc1、Sc2之间的连接点与C1的正极相连接),箝位开关管链路中第4个连接点与直流母线电容链路中第2个连接点相连(Sc3、Sc4之间的连接点与C1、C2之间的连接点相连接),箝位开关管链路中第6个连接点与直流母线电容链路中第3个连接点相连(Sc5、Sc6之间的连接点与C2的负极相连接);箝位开关管链路中编号为奇数的连接点和悬浮电容链路中的连接点按升序依次相连,即,箝位开关管链路中第1个连接点与悬浮电容链路中第1个连接点相连(Sc1的集电极与Cc1的正极相连接),箝位开关管链路中第3个连接点与悬浮电容链路中第2个连接点相连(Sc2、Sc3之间的连接点与Cc1、Cc2之间的连接点相连接),箝位开关管链路中第5个连接点与悬浮电容链路中第3个连接点相连(Sc4、Sc5之间的连接点与Cc2、Cc3之间的连接点相连接),箝位开关管链路中第7个连接点与悬浮电容链路中第4个连接点相连(Sc6的发射极与Cc3的负极相连接),这里,直流母线电容链路、悬浮电容链路和箝位开关管链路及其连接线构成开关电容拓扑部分。The connection points with even numbers in the clamp switch tube link and the connection points in the DC bus capacitor link are connected in ascending order of numbers, that is, the second connection point in the clamp switch tube link is connected to the DC bus capacitor link The first connection point is connected (the connection point between Sc 1 and Sc 2 is connected to the positive pole of C 1 ), the fourth connection point in the clamp switch tube link is connected to the second connection point in the DC bus capacitor link (the connection point between Sc 3 and Sc4 is connected to the connection point between C 1 and C 2 ), the sixth connection point in the clamp switch tube link and the third connection point in the DC bus capacitor link (the connection point between Sc 5 and Sc 6 is connected to the negative pole of C 2 ); the odd-numbered connection points in the clamp switch tube link and the connection points in the floating capacitor link are connected in ascending order, that is, The first connection point in the clamp switch tube link is connected to the first connection point in the floating capacitor link (the collector of Sc 1 is connected to the positive pole of Cc 1 ), and the third connection point in the clamp switch tube link The point is connected to the second connection point in the suspension capacitor link (the connection point between Sc 2 and Sc 3 is connected to the connection point between Cc 1 and Cc 2 ), and the fifth connection point in the clamp switch tube link The point is connected to the third connection point in the suspension capacitance link (the connection point between Sc 4 and Sc 5 is connected to the connection point between Cc 2 and Cc 3 ), and the seventh connection point in the clamp switch tube link The point is connected to the fourth connection point in the suspension capacitor link (the emitter of Sc 6 is connected to the negative pole of Cc 3 ), here, the DC bus capacitor link, the suspension capacitor link and the clamp switch tube link and their connections The line forms part of the switched capacitor topology.

6个主开关管S1~S6依次串联构成一条主开关管链路,连接方式为,前面一个主开关管的发射极与后面一个主开关管的集电极相连,连接处构成一个连接点,第一个主开关管S1的集电极和第六个主开关管S6的发射极分别作为起始连接点和终端连接点,该主开关管链路共有7个连接点,7个连接点按连接顺序依次编号,起始连接点为1,终端连接点为7;Six main switching tubes S 1 ~ S 6 are connected in series to form a main switching tube link. The connection method is that the emitter of the front main switching tube is connected with the collector of the rear main switching tube, and the connection constitutes a connection point. The collector of the first main switching tube S1 and the emitter of the sixth main switching tube S6 are used as the initial connection point and the terminal connection point respectively. The main switching tube link has 7 connection points in total, and the 7 connection points They are numbered sequentially according to the connection sequence, the initial connection point is 1, and the terminal connection point is 7;

6个箝位二极管Dc1~Dc6构成2条箝位二极管链路,其中,第1条箝位二极管链路由2个箝位二极管Dc1~Dc2依次串联构成,其连接方式为,第一个箝位二极管Dc1的阳极与第二个箝位二极管Dc2的阴极相连,连接处构成一个连接点,第一个箝位二极管Dc1的阴极和第二个箝位二极管Dc2的阳极分别作为起始连接点和终端连接点,第1条箝位二极管链路上有3个连接点,3个连接点按连接顺序依次编号,起始连接点为1,终端连接点为3,第2条箝位二极管链路由4个箝位二极管Dc3~Dc6依次串联构成,其连接方式为,前面一个箝位二极管的阳极与后面一个箝位二极管的阴极相连,连接处构成一个连接点,第2条箝位二极管链路中的第一个箝位二极管Dc3的阴极和第四个箝位二极管Dc6的阳极分别作为起始连接点和终端连接点,第2条箝位二极管链路上有5个连接点,5个连接点按连接顺序依次编号,起始连接点为1,终端连接点为5;Six clamping diodes Dc 1 ~ Dc 6 constitute two clamping diode chains, among which, the first clamping diode chain consists of two clamping diodes Dc 1 ~ Dc 2 connected in series in sequence, and the connection method is as follows: The anode of one clamping diode Dc 1 is connected to the cathode of the second clamping diode Dc 2 , the junction constitutes a junction, the cathode of the first clamping diode Dc 1 and the anode of the second clamping diode Dc 2 As the starting connection point and the terminal connection point respectively, there are 3 connection points on the first clamping diode link, and the 3 connection points are numbered in sequence according to the connection sequence, the starting connection point is 1, the terminal connection point is 3, and the The two clamping diode chains are composed of four clamping diodes Dc 3 ~ Dc 6 connected in series in sequence. The connection method is that the anode of the previous clamping diode is connected with the cathode of the rear clamping diode, and the connection constitutes a connection point , the cathode of the first clamping diode Dc 3 and the anode of the fourth clamping diode Dc 6 in the second clamping diode chain are used as the starting connection point and the terminal connection point respectively, the second clamping diode chain There are 5 connection points on the road, and the 5 connection points are numbered in sequence according to the connection sequence, the initial connection point is 1, and the terminal connection point is 5;

第1条箝位二极管链路上的第1个连接点与主开关管链路中第3个连接点相连接(Dc1的阴极与S2、S3之间的连接点相连接),第1条箝位二极管链路上的第3个连接点与主开关管链路中第5个连接点相连接(Dc2的阳极与S4、S5之间的连接点相连接);第2条箝位二极管链路上的第1个连接点与主开关管链路中第2个连接点相连接(Dc3的阴极与S1、S2之间的连接点相连接),第2条箝位二极管链路上的第5个连接点与主开关管链路中第6个连接点相连接(Dc6的阳极与S5、S6之间的连接点相连接),第2条箝位二极管链路上的第3个连接点与第1条箝位二极管链路中第2个连接点相连接(Dc4、Dc5之间的连接点与Dc1、Dc2之间的连接点相连接),悬浮电容链路中第1个连接点与主开关管链路中第1个连接点相连接(Cc1的正极与主开关管链路中S1的集电极相连接),悬浮电容链路中第4个连接点与主开关管链路中第7个连接点相连接(Cc3的负极与S6的发射极相连接),悬浮电容链路中第2个连接点与第2条箝位二极管链路中第2个连接点相连接(Cc1、Cc2之间的连接点与Dc3、Dc4之间的连接点相连接),悬浮电容链路中第3个连接点与第2条箝位二极管链路中第4个连接点相连接(Cc2、Cc3之间的连接点与Dc5、Dc6之间的连接点相连接),这里,悬浮电容链路,主开关管链路和箝位二极管链路及其连接线构成一个四电平的二极管箝位拓扑部分;主开关管链路中第4个连接点(S3、S4之间的连接点)作为输出连接点。The first connection point on the first clamping diode chain is connected to the third connection point in the main switching tube chain (the cathode of Dc 1 is connected to the connection point between S 2 and S 3 ), the first The third connection point on one clamping diode chain is connected to the fifth connection point in the main switching tube chain (the anode of Dc 2 is connected to the connection point between S 4 and S 5 ); the second The first connection point on the clamping diode chain is connected to the second connection point in the main switch tube chain (the cathode of Dc 3 is connected to the connection point between S 1 and S 2 ), the second The fifth connection point on the clamp diode chain is connected to the sixth connection point in the main switch tube chain (the anode of Dc 6 is connected to the connection point between S 5 and S 6 ), the second clamp The third connection point on the bit diode chain is connected to the second connection point in the first clamp diode chain (the connection point between Dc 4 and Dc 5 and the connection point between Dc 1 and Dc 2 connected), the first connection point in the suspension capacitor link is connected to the first connection point in the main switch tube link (the anode of Cc 1 is connected to the collector of S 1 in the main switch tube link), the suspension The fourth connection point in the capacitor link is connected to the seventh connection point in the main switch tube link (the negative pole of Cc 3 is connected to the emitter of S 6 ), the second connection point in the suspension capacitor link is connected to the first The second connection point in the 2 clamping diode chains is connected (the connection point between Cc 1 and Cc 2 is connected to the connection point between Dc 3 and Dc 4 ), the third connection point in the suspension capacitor chain The point is connected to the fourth connection point in the second clamping diode chain (the connection point between Cc 2 and Cc 3 is connected to the connection point between Dc 5 and Dc 6 ), here, the floating capacitor chain , the main switching tube link and the clamping diode link and their connection lines constitute a four-level diode clamping topology part; the fourth connection point in the main switching tube link (the connection point between S 3 and S 4 ) as output connection points.

通用型开关电容二极管箝位组合多电平电路的直流输入电压一般有以下3种接入方式:第1种,以C1的正极和C2的负极为直流电压输入端,输出电压峰峰值为输入电压幅值的2倍;第2种,以Cc1的正极和Cc3的负极为直流电压输入端,输出电压峰峰值为输入电压幅值的

Figure G2009201212331D00071
倍;第3种,以Cc2的正极和Cc2的负极为直流电压输入端,输出电压峰峰值为输入电压幅值的4倍。其中三相工作时,一般只用第一种接入方式。The DC input voltage of the general-purpose switched capacitor diode clamp combination multi-level circuit generally has the following three access methods: the first one, the positive pole of C1 and the negative pole of C2 are the DC voltage input terminals, and the peak-to-peak output voltage is 2 times the amplitude of the input voltage; in the second type, the positive pole of Cc 1 and the negative pole of Cc 3 are the DC voltage input terminals, and the peak-to-peak value of the output voltage is equal to the amplitude of the input voltage
Figure G2009201212331D00071
times; in the third type, the positive pole of Cc 2 and the negative pole of Cc 2 are the DC voltage input terminals, and the peak-to-peak output voltage is 4 times the amplitude of the input voltage. When three-phase work, generally only the first access method is used.

通用型开关电容二极管箝位组合五电平电路工作原理:General-purpose switched capacitor diode clamp combination five-level circuit working principle:

从电路组合的角度,可以把五电平电路拆分为两个部分,四电平二极管箝位拓扑部分和开关电容部分。四电平的二极管箝位拓扑可以输出4个不同的电平,构成四种工作模态。开关电容部分的箝位开关管分成两组,Sc1、Sc3、Sc5为一组,Sc2、Sc4、Sc6为一组,两组互补导通,构成开关电容部分的两种工作模态。将两部分电路的工作模态组合,可以得到8种输出状态,输出五种电平。开关状态与输出电平情况如表1所示(表中,1代表开关管导通,0代表开关管关断,U代表1倍的输出电平)。From the perspective of circuit combination, the five-level circuit can be split into two parts, the four-level diode clamp topology part and the switched capacitor part. The four-level diode-clamp topology can output four different levels, forming four operating modes. The clamp switch tubes of the switched capacitor part are divided into two groups, Sc 1 , Sc 3 , Sc 5 are a group, Sc 2 , Sc 4 , Sc 6 are a group, and the two groups are complementary and conduction, forming two kinds of work of the switched capacitor part modal. Combining the working modes of the two parts of the circuit can get 8 output states and output five levels. The switch state and output level are shown in Table 1 (in the table, 1 represents the switch tube is turned on, 0 represents the switch tube is turned off, and U represents 1 times the output level).

表1开关状态与输出电平对照表Table 1 Switch state and output level comparison table

Figure G2009201212331D00081
Figure G2009201212331D00081

电容电压的自动平衡和输出升压功能的实现:Realization of automatic balance of capacitor voltage and output boost function:

五电平电路中开关电容部分电路实现了电容电压的自动平衡的功能。当Sc1、Sc3、Sc5导通时,C1和Cc1并联,C2和Cc2并联,得到,VC1=VCc1,VC2=VCc2;当Sc2、Sc4、Sc6导通时,C1和Cc2并联,C2和Cc3并联,得到,VC1=VCc2,VC2=VCc3;两组开关管交替导通,可以实现五个电容电压相等,即VC1=VC2=VCc1=VCc2=VCc3,实现电容电压的自动平衡。The switching capacitor part of the five-level circuit realizes the function of automatic balancing of the capacitor voltage. When Sc 1 , Sc 3 , and Sc 5 are turned on, C 1 and Cc 1 are connected in parallel, and C 2 and Cc 2 are connected in parallel, so that VC 1 =VCc 1 , VC 2 =VCc 2 ; when Sc 2 , Sc 4 , Sc 6 When conducting, C 1 and Cc 2 are connected in parallel, and C 2 and Cc 3 are connected in parallel, so that VC 1 = VCc 2 , VC 2 = VCc 3 ; two sets of switch tubes are turned on alternately, so that the voltages of the five capacitors can be equal, that is, VC 1 =VC 2 =VCc 1 =VCc 2 =VCc 3 , realizing the automatic balance of the capacitor voltage.

开关电容部分电路在实现各电容电压自动平衡的同时,将直流输入的电能补充到各个电容中,实现输出升压的功能。由上述可知,五电平拓扑单桥臂工作共有3种直流输入电压接入方式,以第1种接入方式工作为例。以C1的正极和C2的负极为直流电压输入正负端,以C1、C2之间的连接点为电位零参考点,输入电压为2倍的单电容电压。当Sc1、Sc3、Sc5导通时,C1和Cc1并联,VC1=VCc1,当Sc2、Sc4、Sc6导通时,C1和Cc1等效串联,如果此时Cc1的正极作为输出电平,那么输出电压为正2倍的单电容电压。同理可输出负2倍的单电容电压,所以输出可以得到峰峰值为4倍单电容电压的电压幅值,实现输出升压的功能,此时升压倍数为2。其他接入方式实现不同倍数的升压,同理可以解释说明。The switch capacitor part circuit realizes the automatic balance of the voltage of each capacitor, and at the same time, supplements the electric energy of the DC input to each capacitor, and realizes the function of output boosting. From the above, it can be seen that there are three DC input voltage access modes for the operation of the single bridge arm of the five-level topology, and the first access mode is taken as an example. The positive pole of C 1 and the negative pole of C 2 are used to input the positive and negative terminals of the DC voltage, and the connection point between C 1 and C 2 is used as the potential zero reference point, and the input voltage is double the single capacitor voltage. When Sc 1 , Sc 3 , Sc 5 are turned on, C 1 and Cc 1 are connected in parallel, VC 1 =VCc 1 , when Sc 2 , Sc 4 , Sc 6 are turned on, C 1 and Cc 1 are equivalently connected in series, if this When the positive pole of Cc 1 is used as the output level, then the output voltage is the positive double capacitor voltage. In the same way, the single-capacitor voltage of minus 2 times can be output, so the output can obtain a voltage amplitude whose peak-to-peak value is 4 times the single-capacitor voltage, and realize the function of output boosting. At this time, the boosting multiple is 2. Other access methods achieve different multiples of boost, which can be explained in the same way.

Claims (2)

1. a multi-level circuit of universal switch capacitor diode clamping assembly is provided with the output of n level voltage, and n is the positive integer more than or equal to 4, it is characterized in that: each brachium pontis comprises:
1) 2n-5 capacitor, wherein n-3 is dc-link capacitance (C 1~C (n-3)), n-2 is flying capacitor (Cc 1~Cc (n-2));
2) 4 * (n-2) individual switching tubes, each switching tube are the active switch pipe of the anti-and diode of band, wherein 2 * (n-2) individual be main switch (S 1~S 2n-4), 2 * (n-2) individual be clamp switch pipe (Sc 1~Sc 2n-4); 3) (n-2) * (n-3) individual reed position diode (Dc 1~Dc (n-2) * (n-3));
N-3 dc-link capacitance (C 1~C (n-3)) be followed in series to form a dc-link capacitance link connected mode and be, the positive pole of an electric capacity of the negative pole of the electric capacity in front and back is connected, and the junction constitutes a tie point, first electric capacity (C 1) positive pole and last electric capacity (C (n-3)) negative pole respectively as initial tie point and Termintion connection point, this dc-link capacitance link has n-2 tie point altogether, n-2 tie point is by order of connection number consecutively, initial tie point is 1, Termintion connection point is n-2;
2 * (n-2) individual clamp switch pipe (Sc 1~Sc 2n-4) being followed in series to form a clamp switch pipe link, connected mode is that the collector electrode of a reed bit switch of emitter and the back pipe of front reed bit switch pipe links to each other, tie point of junction formation, first clamp switch pipe (Sc 1) collector electrode and last clamp switch pipe (Sc 2n-4) emitter respectively as initial tie point and Termintion connection point, this clamp switch pipe link has 2n-3 tie point, 2n-3 contact is by order of connection number consecutively, initial tie point is 1, Termintion connection point is 2n-3;
N-2 flying capacitor (Cc 1~Cc (n-2)) be followed in series to form a flying capacitor link connected mode and be, the positive pole of an electric capacity of the negative pole of the electric capacity in front and back is connected, and the junction constitutes a tie point, first flying capacitor (Cc 1) positive pole and last flying capacitor (Cc (n-2)) negative pole respectively as initial tie point and Termintion connection point, this flying capacitor link has n-1 tie point altogether, n-1 tie point is by order of connection number consecutively, initial tie point is 1, Termintion connection point is n-1;
The tie point that is numbered even number in the clamp switch pipe link links to each other by the numbering ascending order successively with tie point in the dc-link capacitance link, the tie point that is numbered odd number in the clamp switch pipe link links to each other by the numbering ascending order successively with tie point in the flying capacitor link, constitutes the topological part of switching capacity of switch capacitor diode clamping combination multi-level circuit;
2 * (n-2) individual main switch (S 1~S 2n-4) being followed in series to form a main switch link, connected mode is that the collector electrode of a main switch of the emitter of the main switch in front and back links to each other, tie point of junction formation, first main switch (S 1) collector electrode and last main switch (S 2n-4) emitter respectively as initial tie point and Termintion connection point, this main switch link has 2n-3 tie point, 2n-3 tie point is by order of connection number consecutively, initial tie point is 1, Termintion connection point is 2n-3;
(n-2) * (n-3) individual clamping diode (Dc 1~Dc (n-2) * (n-3)) constitute n-3 bar clamping diode link, establish i and be the positive integer smaller or equal to n-3, i bar clamping diode chain route 2i reed position diode (Dc I * (i-1)+1~Dc I * (i+1)) be followed in series to form, its connected mode is, and the negative electrode of a clamping diode of the anode of the clamping diode in front and back links to each other, and the junction constitutes a tie point, first clamping diode (Dc on every link I * (i-1)+1) negative electrode and last clamping diode (Dc I * (i+1)) anode respectively as initial tie point and Termintion connection point, total 2i+1 tie point on the i bar link, 2i+1 tie point pressed order of connection number consecutively, initial tie point is 1, Termintion connection point is 2i+1; The 1st tie point in the i bar clamping diode link links to each other with n-1-i tie point in the main switch link, 2i+1 tie point is connected with n-1+i tie point in the main switch link, and the tie point that is numbered even number in the tie point that is numbered odd number in all the other tie points on the i bar clamping diode link and the i-1 bar clamping diode link links to each other successively by the numbering ascending order; First tie point links to each other with first tie point in the main switch link in the flying capacitor link, last tie point links to each other with last tie point in the main switch link in the flying capacitor link, the tie point that is numbered even number in the flying capacitor link in all the other tie points and the n-3 bar clamping diode link links to each other successively by the numbering ascending order, constitutes the topological part of diode clamp of switch capacitor diode clamping combination multi-level circuit; N-1 tie point in the main switch link is as output connection.
2. multi-level circuit of universal switch capacitor diode clamping assembly according to claim 1 is characterized in that level voltage output n is 5, and each brachium pontis comprises: 5 capacitors, wherein 2 is dc-link capacitance (C 1~C 2), 3 is flying capacitor (Cc 1~Cc 3); 12 switching tubes, each switching tube are the anti-also active switch pipe of diode of band, and wherein 6 is main switch (S 1~S 6), 6 is reed bit switch pipe (Sc 1~Sc 6); 6 clamping diode (Dc 1~Dc 6);
2 dc-link capacitance (C 1~C 2) be followed in series to form a dc-link capacitance link, connected mode is, the negative pole of first electric capacity (C1) is connected with the positive pole of second electric capacity (C2), the junction constitutes a tie point, the negative pole of positive pole of first electric capacity (C1) and second electric capacity (C2) is respectively as initial tie point and Termintion connection point, and this dc-link capacitance link has 3 tie points altogether, and 3 tie points are by order of connection number consecutively, initial tie point is 1, and Termintion connection point is 3;
6 clamp switch pipe (Sc 1~Sc 6) being followed in series to form a clamp switch pipe link, connected mode is that the collector electrode of a clamp switch pipe of the emitter of the clamp switch pipe in front and back links to each other, tie point of junction formation, first clamp switch pipe (Sc 1) collector electrode and the emitter of the 6th clamp switch pipe (Sc6) respectively as initial tie point and Termintion connection point, this clamp switch pipe link has 7 tie points, 7 tie points are by order of connection number consecutively, initial tie point is 1, Termintion connection point is 7;
3 flying capacitor (Cc 1~Cc 3) being followed in series to form a flying capacitor link, connected mode is that the positive pole of an electric capacity of the negative pole of the electric capacity in front and back is connected, tie point of junction formation, first flying capacitor (Cc 1) positive pole and the 3rd flying capacitor (Cc 3) negative pole respectively as initial tie point and Termintion connection point, this flying capacitor link has 4 tie points altogether, 4 tie points are by order of connection number consecutively, initial tie point is 1, Termintion connection point is 4;
The 2nd tie point links to each other with the 1st tie point in the dc-link capacitance link in the clamp switch pipe link, the 4th tie point links to each other with the 2nd tie point in the dc-link capacitance link in the clamp switch pipe link, the 6th tie point links to each other with the 3rd tie point in the dc-link capacitance link in the clamp switch pipe link, the 1st tie point links to each other with the 1st tie point in the flying capacitor link in the clamp switch pipe link, the 3rd tie point links to each other with the 2nd tie point in the flying capacitor link in the clamp switch pipe link, the 5th tie point links to each other with the 3rd tie point in the flying capacitor link in the clamp switch pipe link, the 7th tie point links to each other with the 4th tie point in the flying capacitor link in the clamp switch pipe link, constitutes the switching capacity topology part of switch capacitor diode clamping combination multi-level circuit;
6 main switch (S 1~S 6) being followed in series to form a main switch link, connected mode is that the collector electrode of a main switch of the emitter of the main switch in front and back links to each other, tie point of junction formation, first main switch (S 1) collector electrode and the 6th main switch (S 6) emitter respectively as initial tie point and Termintion connection point, this main switch link has 7 tie points, 7 tie points are by order of connection number consecutively, initial tie point is 1, Termintion connection point is 7;
6 clamping diode (Dc 1~Dc 6) constitute 2 clamping diode links, wherein, 2 clamping diode (Dc of the 1st clamping diode chain route 1~Dc 2) be followed in series to form, its connected mode is first reed position diode (Dc 1) anode and second clamping diode (Dc 2) negative electrode link to each other, the junction constitutes a tie point, first clamping diode (Dc 1) negative electrode and second clamping diode (Dc 2) anode respectively as initial tie point and Termintion connection point, article 1, on the clamping diode link 3 tie points are arranged, 3 tie points are by order of connection number consecutively, and initial tie point is 1, Termintion connection point is 4 clamping diode (Dc of 3, the 2 clamping diode chain routes 3~Dc 6) be followed in series to form, its connected mode is, and the negative electrode of a clamping diode of the anode of the clamping diode in front and back links to each other, and the junction constitutes a tie point, first clamping diode (Dc in the 2nd clamping diode link 3) negative electrode and the 4th clamping diode (Dc 6) anode respectively as initial tie point and Termintion connection point, on the 2nd the clamping diode link 5 tie points are arranged, 5 tie points are by order of connection number consecutively, initial tie point is 1, Termintion connection point is 5; Article 1, the 1st tie point on the clamping diode link is connected with the 3rd tie point in the main switch link, and the 3rd tie point on the 1st clamping diode link is connected with the 5th tie point in the main switch link; Article 2, the 1st tie point on the diode link of reed position is connected with the 2nd tie point in the main switch link, article 2, the 5th tie point on the clamping diode link is connected with the 6th tie point in the main switch link, article 2, the 3rd tie point on the clamping diode link is connected with the 2nd tie point in the 1st the clamping diode link, the 1st tie point is connected with the 1st tie point in the main switch link in the flying capacitor link, the 4th tie point is connected with the 7th tie point in the main switch link in the flying capacitor link, the 2nd tie point is connected with the 2nd tie point in the 2nd the clamping diode link in the flying capacitor link, the 3rd tie point is connected with the 4th tie point in the 2nd the clamping diode link in the flying capacitor link, constitutes the diode clamp topology part of switch capacitor diode clamping combination multi-level circuit; The 4th tie point is as output connection in the main switch link.
CN2009201212331U 2009-06-01 2009-06-01 A Universal Switched Capacitor Diode Clamp Combination Multilevel Circuit Expired - Fee Related CN201430543Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2009201212331U CN201430543Y (en) 2009-06-01 2009-06-01 A Universal Switched Capacitor Diode Clamp Combination Multilevel Circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2009201212331U CN201430543Y (en) 2009-06-01 2009-06-01 A Universal Switched Capacitor Diode Clamp Combination Multilevel Circuit

Publications (1)

Publication Number Publication Date
CN201430543Y true CN201430543Y (en) 2010-03-24

Family

ID=42034282

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2009201212331U Expired - Fee Related CN201430543Y (en) 2009-06-01 2009-06-01 A Universal Switched Capacitor Diode Clamp Combination Multilevel Circuit

Country Status (1)

Country Link
CN (1) CN201430543Y (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102291031A (en) * 2011-07-19 2011-12-21 西南交通大学 Voltage equalization circuit and voltage equalization method for DC capacitors of multi-level converter
CN104335473A (en) * 2012-05-25 2015-02-04 通用电气公司 High voltage high power multi-level drive structure
CN104753377A (en) * 2015-04-22 2015-07-01 厦门大学 Multilevel inverter based on bridge modular switched capacitor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102291031A (en) * 2011-07-19 2011-12-21 西南交通大学 Voltage equalization circuit and voltage equalization method for DC capacitors of multi-level converter
CN102291031B (en) * 2011-07-19 2014-07-02 西南交通大学 Voltage equalization circuit and voltage equalization method for DC capacitors of multi-level converter
CN104335473A (en) * 2012-05-25 2015-02-04 通用电气公司 High voltage high power multi-level drive structure
CN104753377A (en) * 2015-04-22 2015-07-01 厦门大学 Multilevel inverter based on bridge modular switched capacitor
CN104753377B (en) * 2015-04-22 2017-07-18 厦门大学 A kind of multi-electrical level inverter based on bridge-type modular switch electric capacity

Similar Documents

Publication Publication Date Title
CN101572503A (en) Multi-level circuit of universal switch capacitor diode clamping assembly
CN101262180B (en) Single-phase circuit topology structure for clamp multi-level converter
CN103378758B (en) Multilevel power converter
CN213072474U (en) Power components and wind power converters
CN103944430B (en) A kind of modularization multi-level converter subelement topology
CN106301042B (en) A seven-level inverter
CN102097967B (en) Cascaded multi-level converter
CN102035420A (en) Five-level converter
CN102594182A (en) Multilevel inversion topological unit and multilevel inverter
CN105634315A (en) One-way current type modular multilevel converter
CN102969924B (en) Novel voltage type multi-level inverter
CN102427308B (en) Single-phase half-bridge five-level inverter and application circuit thereof
CN102201755A (en) Mixed clamping type four-level converter
CN102769404A (en) Four-level inversion topological unit and four-level inverter
CN104578869A (en) Capacitance self-voltage-sharing three-phase multi-level converter circuit with direct-current bus
CN109755960A (en) A kind of nine electrical level inverter topological structure of single-phase grid-connected switching capacity
CN112636621A (en) Multilevel topology of switched reluctance motor and control method thereof
CN104362878B (en) Elementary cell, three level and m level topological structures for multi-level converter
CN201430543Y (en) A Universal Switched Capacitor Diode Clamp Combination Multilevel Circuit
CN106100405A (en) A kind of level quinque switch H bridge multi-electrical level inverter
CN110829867A (en) Novel MMC submodule topology with fault current symmetrical clearing capacity
CN102594181A (en) Multilevel inversion topological unit and multilevel inverter
CN100571012C (en) Layered Superposition Voltage Type Multilevel Circuit
CN204216795U (en) For the elementary cell of multi-level converter, three level and m level topological structure
CN103259436A (en) Mixing clamping type five-level current transformer and control method thereof

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20100324

Termination date: 20150601

EXPY Termination of patent right or utility model