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CN201191823Y - A/D converter circuit having physical quantity of inverse proportional characteristic - Google Patents

A/D converter circuit having physical quantity of inverse proportional characteristic Download PDF

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Publication number
CN201191823Y
CN201191823Y CNU2008200982452U CN200820098245U CN201191823Y CN 201191823 Y CN201191823 Y CN 201191823Y CN U2008200982452 U CNU2008200982452 U CN U2008200982452U CN 200820098245 U CN200820098245 U CN 200820098245U CN 201191823 Y CN201191823 Y CN 201191823Y
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China
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circuit
output
signal
gate
input
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Expired - Fee Related
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CNU2008200982452U
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Chinese (zh)
Inventor
徐纯新
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Chongqing Electric Power College
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Chongqing Electric Power College
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Abstract

The utility model relates to an analog to digital conversion circuit with the inverse proportion characteristic physical quantity, which comprises an analog signal output circuit and a standard signal generator. The analog to digital conversion circuit is characterized in that an output end of the analog signal output circuit is connected with an input end of an inverse proportion amplifying circuit, the inverse proportion amplifying circuit receives analog signals which are output by the analog signal output circuit and outputs the analog signals to a clock pulse generator after the analog signals are amplified in the inverse proportion, the clock pulse generator transforms analog amplified signals into clock pulse and outputs the clock pulse to a control signal generating circuit, the control signal generating circuit outputs gate control signals to a gate circuit and simultaneously outputs lock signals and reset signals to an external counter lock display circuit, and the gate circuit receives standard bar signals which are output by the standard signal generator and gate control signals which are output by the control signal generating circuit, and outputs counter pulse signals to the external counter lock display circuit. The utility model has the advantages of high resolution factor and the like, and can be wildly applied in automatic detecting and automatic control systems.

Description

A kind of mould/number conversion circuit with inverse proportion characteristic physical quantity
Technical field
The utility model relates to mould/number conversion control technology field, is specifically related to a kind of mould/number conversion circuit with inverse proportion characteristic physical quantity.
Background technology
Along with developing rapidly and the extensive use of computer in automatic detection and automatic control system of electronic technology, utilize the situation of digital system Analog signals to become more general, what electronic computer was handled and transmitted all is discontinuous digital signal, and input signal mostly is the continually varying analog quantity in the reality, therefore need carry out mould/number conversion.What application was commonplace in the prior art is: force into pattern/number conversion circuit, integrating analogue digital converter/number conversion circuit, voltage to frequency conversion pattern/number conversion circuit one by one, but these several circuit all have shortcoming separately, wherein force into pattern/number conversion circuit cost height, price height under high-resolution situation one by one; The switching rate of integrating analogue digital converter/number conversion circuit and voltage to frequency conversion pattern/number conversion circuit is low.
The utility model content
At the defective that prior art exists, technical problem to be solved in the utility model is to provide a kind of low, that conversion speed the is fast mould with inverse proportion characteristic physical quantity/number conversion circuit of controlling cost.
According to a scheme of the present utility model, a kind of mould/number conversion circuit with inverse proportion characteristic physical quantity comprises analog signal input circuit, standard signal generator, is characterized in:
The output of analog signal input circuit connects the input of inverse proportion amplifying circuit, and described inverse proportion amplifying circuit receives the analog signal of analog signal input circuit output, carries out outputing to time-pulse generator after inverse proportion amplifies;
Time-pulse generator: receive the simulation amplifying signal of inverse proportion amplifying circuit output, will simulate amplifying signal and convert timing pulse to and output to control signal generation circuit;
Control signal generation circuit: receive the time scale pulse signal of time-pulse generator output, the output control gate signal is to gate circuit, and output latch signal and reset signal latch display circuit to external counting simultaneously;
Gate circuit: the control gate signal of the standard square-wave signal of acceptance criteria signal generator output and control signal generation circuit output, the output counting pulse signal latchs display circuit to external counting.
According to a preferred version of the present utility model, described time-pulse generator is made up of integrating circuit and square wave oscillation generator; Described integrating circuit receives the amplifying signal of inverse proportion amplifying circuit output, outputs to the square wave oscillation generator; The sawtooth signal of described square wave oscillation generator reception integrating circuit output converts time scale pulse signal to and outputs to the control signal circuit.
According to a preferred version of the present utility model, integrating circuit is by relatively integrated circuit U2A, resistance R 3, R5, capacitor C 2 are formed, described capacitor C 2 is connected between the reverse input end and output of comparison integrated circuit U2A, described resistance R 3 is connected the output of inverse proportion amplifying circuit and compares between the reverse input end of integrated circuit U2A, and described resistance R 5 is connected between the input in the same way and ground of comparison integrated circuit U2A; Described square wave oscillation generator is by 555 time-base integrated circuit U3, capacitor C 3, resistance R 6, R7, R8, triode Q1 constitutes, the low triggering signal input of described 555 time-base integrated circuit U3 and high triggering signal input are connected the output of integrating circuit simultaneously, capacitor C 3 is connected between the control end and ground of 555 time-base integrated circuit U3, the termination power end that resets of 555 time-base integrated circuit U3, the discharge end of 555 time-base integrated circuit U3 is connected to the base stage of triode Q1 by resistance R 6, the base stage of triode Q1 connects power end by resistance R 7, the emitter of triode Q1 connects power end, and the collector electrode of triode Q1 is connected to the reverse input end of comparison integrated circuit U2A by resistance R 8.
According to a preferred version of the present utility model, described control signal generation circuit is by d type flip flop U6A, NAND gate U5A, U5B, U5D, not gate U4C, XOR gate U7A constitutes, the triggering signal input of described d type flip flop U6A is connected with the antiphase output, the clock signal input terminal of described d type flip flop U6A, the first input end of the input of not gate U4C and XOR gate U7A connects the output of time-pulse generator simultaneously, the same-phase output of d type flip flop U6A connects the first input end of NAND gate U5A and the first input end of NAND gate U5D simultaneously, set end and the reset terminal of d type flip flop U6A connect power end simultaneously, the output of not gate U4C connects second input of NAND gate U5D, and the output output latch signal of NAND gate U5D latchs display circuit to external counting; The output of NAND gate U5D also connects second input of XOR gate U7A and second input of NAND gate U5A simultaneously, the output of NAND gate U5A connects two inputs of NAND gate U5B simultaneously, and the output output control gate signal of NAND gate U5B is to gate circuit; The output output reset signal of XOR gate U7A latchs display circuit to external counting.
A kind of mould/number conversion circuit described in the utility model with inverse proportion characteristic physical quantity, it is good to have Linearity, the resolution height, conversion speed is fast, and volume is little, and is low in energy consumption, easy of integration, be convenient to the advantage of batch machining, be with a wide range of applications, can be widely used in detection automatically and the automatic control system.
Description of drawings
Fig. 1 is a kind of functional-block diagram with mould/number conversion circuit of inverse proportion characteristic physical quantity described in the utility model.
Fig. 2 is a kind of circuit theory diagrams with mould/number conversion circuit of inverse proportion characteristic physical quantity described in the utility model.
Fig. 3 is the output waveform of time-pulse generator 9.
Embodiment
Referring to Fig. 1, a kind of mould/number conversion circuit described in the utility model with inverse proportion characteristic physical quantity, by analog signal input circuit 1, standard signal generator 2, inverse proportion amplifying circuit 3, control signal generation circuit 6, gate circuit 7, time-pulse generator 9 constitutes, wherein, the output of analog signal input circuit 1 connects the input of inverse proportion amplifying circuit 3, the output of inverse proportion amplifying circuit 3 connects the input and the control end of time-pulse generator 9, the output connection control signal of time-pulse generator 9 produces the input of circuit 6, the output of control signal generation circuit 6 connects input of gate circuit 7 and the input that external counting latchs display circuit 8 respectively, the output of standard signal generator 2 connects another input of gate circuit 7, and the output of gate circuit 7 connects another input that external counting latchs display circuit 8; Described inverse proportion amplifying circuit 3 receives the analog signal of analog signal input circuit 1 output, carries out outputing to time-pulse generator 9 after inverse proportion amplifies; Time-pulse generator 9 receives the simulation amplifying signal of inverse proportion amplifying circuits 3 outputs, will simulate amplifying signal and convert timing pulse to and output to control signal generation circuit 6; Control signal generation circuit 6 receives the clock pulse signal of time-pulse generator 9 outputs, and the output control gate signal is to gate circuit 7, and output latch signal and reset signal latch display circuit 8 to external counting simultaneously; The standard square-wave signal of gate circuit 7 acceptance criteria signal generators 2 outputs and the control gate signal of control signal generation circuit 6 outputs, the output counting pulse signal latchs display circuit 8 to external counting.
Wherein, described time-pulse generator 9 can be made up of integrating circuit 4 and square wave oscillation generator 5; Described integrating circuit 4 receives the amplifying signal of inverse proportion amplifying circuit 3 outputs, outputs to square wave oscillation generator 5; Described square wave oscillation generator 5 receives the sawtooth signal of integrating circuit 4 outputs; Convert time scale pulse signal to and output to control signal circuit 6.
Referring to Fig. 2, in specific embodiment, integrating circuit 4 is by relatively integrated circuit U2A, resistance R 3, R5, capacitor C 2 are formed, described capacitor C 2 is connected between the reverse input end and output of comparison integrated circuit U2A, described resistance R 3 is connected the output of inverse proportion amplifying circuit 3 and compares between the reverse input end of integrated circuit U2A, and described resistance R 5 is connected between the input in the same way and ground of comparison integrated circuit U2A; Described square wave oscillation generator 5 is by 555 time-base integrated circuit U3, capacitor C 3, resistance R 6, R7, R8, triode Q1 constitutes, the low triggering signal input TRIG of described 555 time-base integrated circuit U3 and high triggering signal input THIR are connected the output of integrating circuit 4 simultaneously, capacitor C 3 is connected between the control end CVOH and ground of 555 time-base integrated circuit U3, the reset terminal R of 555 time-base integrated circuit U3 meets power end VCC, the discharge end DIS of 555 time-base integrated circuit U3 is connected to the base stage of triode Q1 by resistance R 6, the base stage of triode Q1 connects power end VCC by resistance R 7, the emitter of triode Q1 meets power end VCC, and the collector electrode of triode Q1 is connected to the reverse input end of comparison integrated circuit U2A by resistance R 8.
Described control signal generation circuit 6 is by d type flip flop U6A, NAND gate U5A, U5B, U5D, not gate U4C, XOR gate U7A constitutes, the triggering signal input D of described d type flip flop U6A is connected with antiphase output Q  ̄, the clock signal input terminal CLK of described d type flip flop U6A, the first input end of the input of not gate U4C and XOR gate U7A connects the output of time-pulse generator 9 simultaneously, the same-phase output Q of d type flip flop U6A connects the first input end of NAND gate U5A and the first input end of NAND gate U5D simultaneously, set end CD and the reset terminal SD of d type flip flop U6A meet power end vcc simultaneously, the output of not gate U4C connects second input of NAND gate U5D, and the output output latch signal of NAND gate U5D latchs display circuit 8 to external counting; The output of NAND gate U5D also connects second input of XOR gate U7A and second input of NAND gate U5A simultaneously, the output of NAND gate U5A connects two inputs of NAND gate U5B simultaneously, and the output output control gate signal of NAND gate U5B is to gate circuit 7; The output output reset signal of XOR gate U7A latchs display circuit 8 to external counting.
Operation principle with mould/number conversion circuit of inverse proportion characteristic physical quantity described in the utility model is: the time quantum that described circuit at first becomes to be directly proportional with pulse duration with analog signal conversion, non-linear data transaction is become linear data processing, improved the resolution of mould/number conversion, then the timing pulse width is converted to a control signal, by controlling the standard count pulse that a signal strobe comes the control criterion signal to produce, the pulse duration that produces under this aanalogvoltage by counter allows the calibration pulse number passed through at last, therefore to convert a pulse duration to be signal strobe to the analog quantity of input with regard to linear, voltage just is proportional to the time that this signal strobe is opened, therefore the voltage of input just is proportional to the pulse number of rolling counters forward, thereby realizes mould/number conversion.
Utilize this technology, the inventor has developed a high-voltage digital megohmmeter, and this instrument has measuring speed in reality test fast, precision height, advantage such as cost is low.Referring to Fig. 2 and shown in Figure 3, power taking resistance R2 is 2K Ω, and resistance R 1 is 2K Ω, and resistance R F is 27K Ω, and resistance R 3 is 40.5K Ω, and capacitor C 2 is 10NF; Theoretical Calculation is as follows:
Ix = Ec Rx + R 1 ≈ Ec Rx
U 01 = - Ix × R 1 × R 2 R 1 + R 2 × Rf R 2 = - 500 Rx × 1 × 10 3 × 27 2
U 01 = - 27 × 500 2 Rx × 10 3
U 02 = - U 01 R 3 × C 2 ( t 2 - t 1 )
If T=t2-t1
Rx = 27 × 3 × 100 × 10 3 2 R 3 × C 2 T = 81 × 100 × 10 3 81 × 10 - 8 × 10 3 T
Rx=10 10T(Ω)
Therefore, when the main pulse frequency was 1MHZ when standard that standard signal generator (2) produces, T was 0.1ms, and counter is shown as 1, and representing Rx is 1 megaohm.

Claims (4)

1, a kind of mould/number conversion circuit with inverse proportion characteristic physical quantity comprises analog signal input circuit (1), standard signal generator (2), it is characterized in that:
The output of analog signal input circuit (1) connects the input of inverse proportion amplifying circuit (3), described inverse proportion amplifying circuit (3) receives the analog signal of analog signal input circuit (1) output, carries out outputing to time-pulse generator (9) after inverse proportion amplifies;
Time-pulse generator (9): receive the simulation amplifying signal of inverse proportion amplifying circuit (3) output, will simulate amplifying signal and convert timing pulse to and output to control signal generation circuit (6);
Control signal generation circuit (6): receive the time scale pulse signal of time-pulse generator (9) output, the output control gate signal is to gate circuit (7), and output latch signal and reset signal latch display circuit (8) to external counting simultaneously;
Gate circuit (7): the control gate signal of the standard square-wave signal of acceptance criteria signal generator (2) output and control signal generation circuit (6) output, the output counting pulse signal latchs display circuit (8) to external counting.
2, a kind of mould/number conversion circuit according to claim 1 with inverse proportion characteristic physical quantity, it is characterized in that: described time-pulse generator (9) is made up of integrating circuit (4) and square wave oscillation generator (5); Described integrating circuit (4) receives the amplifying signal of inverse proportion amplifying circuit (3) output, outputs to square wave oscillation generator (5); The sawtooth signal of described square wave oscillation generator (5) reception integrating circuit (4) output converts time scale pulse signal to and outputs to control signal circuit (6).
3, a kind of mould/number conversion circuit according to claim 2 with inverse proportion characteristic physical quantity, it is characterized in that: integrating circuit (4) is by relatively integrated circuit U2A, resistance R 3, R5, capacitor C 2 are formed, described capacitor C 2 is connected between the reverse input end and output of comparison integrated circuit U2A, described resistance R 3 is connected the output of inverse proportion amplifying circuit (3) and compares between the reverse input end of integrated circuit U2A, and described resistance R 5 is connected between the input in the same way and ground of comparison integrated circuit U2A; Described square wave oscillation generator (5) is by 555 time-base integrated circuit U3, capacitor C 3, resistance R 6, R7, R8, triode Q1 constitutes, the low triggering signal input (TRIG) of described 555 time-base integrated circuit U3 and high triggering signal input (THIR) are connected the output of integrating circuit (4) simultaneously, capacitor C 3 is connected between the control end (CVOH) and ground of 555 time-base integrated circuit U3, the reset terminal of 555 time-base integrated circuit U3 (R) connects power end (VCC), the discharge end of 555 time-base integrated circuit U3 (DIS) is connected to the base stage of triode Q1 by resistance R 6, the base stage of triode Q1 connects power end (VCC) by resistance R 7, the emitter of triode Q1 connects power end (VCC), and the collector electrode of triode Q1 is connected to the reverse input end of comparison integrated circuit U2A by resistance R 8.
4, according to claim 1 or 2 or 3 described a kind of mould/number conversion circuit with inverse proportion characteristic physical quantity, it is characterized in that: described control signal generation circuit (6) is made of d type flip flop U6A, NAND gate U5A, U5B, U5D, not gate U4C, XOR gate U7A, the triggering signal input (D) of described d type flip flop U6A and antiphase output (Q -) connect, the clock signal input terminal of described d type flip flop U6A (CLK), the first input end of the input of not gate U4C and XOR gate U7A connects the output of time-pulse generator (9) simultaneously, the same-phase output (Q) of d type flip flop U6A connects the first input end of NAND gate U5A and the first input end of NAND gate U5D simultaneously, set end (CD) and the reset terminal (SD) of d type flip flop U6A connect power end (vcc) simultaneously, the output of not gate U4C connects second input of NAND gate U5D, and the output output latch signal of NAND gate U5D latchs display circuit (8) to external counting; The output of NAND gate U5D connects second input of XOR gate U7A and second input of NAND gate U5A simultaneously simultaneously, the output of NAND gate U5A connects two inputs of NAND gate U5B simultaneously, and the output output control gate signal of NAND gate U5B is to gate circuit (7); The output output reset signal of XOR gate U7A latchs display circuit (8) to external counting.
CNU2008200982452U 2008-05-09 2008-05-09 A/D converter circuit having physical quantity of inverse proportional characteristic Expired - Fee Related CN201191823Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNU2008200982452U CN201191823Y (en) 2008-05-09 2008-05-09 A/D converter circuit having physical quantity of inverse proportional characteristic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNU2008200982452U CN201191823Y (en) 2008-05-09 2008-05-09 A/D converter circuit having physical quantity of inverse proportional characteristic

Publications (1)

Publication Number Publication Date
CN201191823Y true CN201191823Y (en) 2009-02-04

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Granted publication date: 20090204

Termination date: 20100509