CN201167229Y - Overload protection and power-off detection of multiple high-speed pulse output circuits - Google Patents
Overload protection and power-off detection of multiple high-speed pulse output circuits Download PDFInfo
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- CN201167229Y CN201167229Y CNU2008200077910U CN200820007791U CN201167229Y CN 201167229 Y CN201167229 Y CN 201167229Y CN U2008200077910 U CNU2008200077910 U CN U2008200077910U CN 200820007791 U CN200820007791 U CN 200820007791U CN 201167229 Y CN201167229 Y CN 201167229Y
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Abstract
本实用新型提供一种高速脉冲输出电路的保护电路,包括:脉冲输出电路,在控制器的控制下生成脉冲信号并将脉冲信号输出到负载的第一端;检测电路,连接于负载的第二端和第一电源的两端,用于检测负载和第一电源的状态并输出检测信号到控制器;和控制器,连接于脉冲输出电路和检测电路,用于响应于来自检测电路的检测信号而使能或禁止脉冲输出电路的脉冲信号的输出。
The utility model provides a protection circuit for a high-speed pulse output circuit, comprising: a pulse output circuit, which generates a pulse signal under the control of a controller and outputs the pulse signal to the first end of the load; a detection circuit, connected to the second end of the load terminal and the two ends of the first power supply, for detecting the state of the load and the first power supply and outputting the detection signal to the controller; and the controller, connected to the pulse output circuit and the detection circuit, for responding to the detection signal from the detection circuit The output of the pulse signal of the pulse output circuit is enabled or disabled.
Description
技术领域 technical field
本实用新型涉及一种工业控制系统中的单路及多通道数字量脉冲输出装置,具体指的是能对工业控制系统中的单路及多通道数字量脉冲输出电路的负载电流及输出侧24V供电电源状态进行实时检测并能在过载及掉电时停止输出,实现对输出电路的保护。The utility model relates to a single-channel and multi-channel digital quantity pulse output device in an industrial control system, specifically referring to the load current and the
背景技术 Background technique
在工业控制系统晶体管脉冲输出模块中,晶体管常被用于接口电路驱动负载,但当负载电流超过晶体管的额定参数时或者负载对电源短路时,输出晶体管会因电流过大而损坏从而引起产品故障,为了避免此类故障的发生,用户不得不在负载回路中串联一个适当电流的保险丝保护输出电路。In the transistor pulse output module of the industrial control system, the transistor is often used in the interface circuit to drive the load, but when the load current exceeds the rated parameters of the transistor or the load is short-circuited to the power supply, the output transistor will be damaged due to excessive current and cause product failure , in order to avoid such failures, the user has to connect a fuse with an appropriate current in series in the load circuit to protect the output circuit.
图1示出了现有技术的多通道数字量脉冲输出的典型电路结构。FIG. 1 shows a typical circuit structure of multi-channel digital pulse output in the prior art.
在图1中,脉冲的输出接到一负载上,通过保险接至24V电源,当输出端负载过流或发生短路故障时,流过输出晶体管的电流会迅速增大,当超过外部保险丝的额定值时,保险丝熔断,从而保护晶体管不被损坏。In Figure 1, the output of the pulse is connected to a load and connected to the 24V power supply through insurance. When the output load is over-current or short-circuit fault occurs, the current flowing through the output transistor will increase rapidly. When it exceeds the rated value of the external fuse value, the fuse blows, thereby protecting the transistor from damage.
根据上述图1可知,现有技术的电路存在如下缺点:每路输出都得增加一个保险丝,应用成本高,若保险被焊接到印制板上,维修成本更高。负载过流或短路无反馈,CPU不能探测到此故障。According to the above-mentioned Fig. 1, it can be seen that the circuit of the prior art has the following disadvantages: each output has to add a fuse, the application cost is high, and if the fuse is soldered to the printed board, the maintenance cost is higher. There is no feedback for load overcurrent or short circuit, and the CPU cannot detect this fault.
图2示出了图1中的负载电路图。如图2所示,负载1至负载N的电路结构相同。图2的整个电路结构就是代表负载的内部电路。FIG. 2 shows the load circuit diagram in FIG. 1 . As shown in FIG. 2 , the circuit structures of load 1 to load N are the same. The entire circuit structure in Figure 2 is the internal circuit representing the load.
实用新型内容Utility model content
本实用新型的另外方面和优点部分将在后面的描述中阐述,还有部分可从描述中明显地看出,或者可以在本实用新型的实践中得到。Additional aspects and advantages of the utility model will be set forth in part in the description which follows, and in part will be apparent from the description, or can be obtained by practice of the utility model.
针对现有技术电路中的上述问题,提出本实用新型。本实用新型能在200KHz频率输出的情况下实现过载和短路保护及输出侧电源掉电检测的功能。Aiming at the problems mentioned above in the prior art circuit, the utility model is proposed. The utility model can realize the functions of overload and short circuit protection and power failure detection of the output side under the condition of 200KHz frequency output.
它是由脉冲驱动及检测控制两部分电路组成,过载、短路及电源掉电时该电路能及时切断与外部负载的物理连接而不必外加保险丝。It is composed of pulse drive and detection control circuit. When overload, short circuit and power failure occurs, the circuit can cut off the physical connection with the external load in time without adding a fuse.
本发明提供一种高速脉冲输出电路的保护电路,包括:脉冲输出电路,在控制器的控制下生成脉冲信号并将脉冲信号输出到负载的第一端;检测电路,连接于负载的第二端和第一电源的两端,用于检测负载和第一电源的状态并输出检测信号到控制器;和控制器,连接于脉冲输出电路和检测电路,用于响应于来自检测电路的检测信号而使能或禁止脉冲输出电路的脉冲信号的输出。The invention provides a protection circuit for a high-speed pulse output circuit, comprising: a pulse output circuit, which generates a pulse signal under the control of a controller and outputs the pulse signal to the first end of the load; a detection circuit, connected to the second end of the load and the two ends of the first power supply, used to detect the state of the load and the first power supply and output the detection signal to the controller; and the controller, connected to the pulse output circuit and the detection circuit, for responding to the detection signal from the detection circuit Enables or disables the output of the pulse signal of the pulse output circuit.
根据本实用新型,其电路设计简单,仅需几个电阻器和小信号晶体管即可实现电源掉电检测和多路信号过载及短路的保护,造价低廉,同时也便于用户使用。According to the utility model, the circuit design is simple, and only a few resistors and small signal transistors are needed to realize power failure detection and multi-channel signal overload and short circuit protection, which is cheap and convenient for users to use.
附图说明 Description of drawings
通过结合附图对本实用新型的优选实施例进行详细描述,本实用新型的上述和其他目的、特性和优点将会变得更加清楚,其中相同的标号指定相同结构的单元,并且在其中:The above-mentioned and other objects, characteristics and advantages of the present invention will become clearer by describing preferred embodiments of the present invention in detail with reference to the accompanying drawings, wherein the same reference numerals designate units of the same structure, and wherein:
图1示出了现有技术的多通道数字量脉冲输出的典型电路结构;Fig. 1 shows the typical circuit structure of the multi-channel digital quantity pulse output of prior art;
图2示出了图1中的负载电路图;Fig. 2 shows the load circuit diagram in Fig. 1;
图3示出了本实用新型示例性实施例的多通道数字量脉冲输出的电路图。Fig. 3 shows a circuit diagram of a multi-channel digital pulse output in an exemplary embodiment of the present invention.
具体实施方式 Detailed ways
下面将参照示出本实用新型实施例的附图充分描述本实用新型。然而,本实用新型可以以许多不同的形式实现,而不应当认为限于这里所述的实施例。相反,提供这些实施例以便使本公开透彻且完整,并且将向本领域技术人员充分表达本实用新型的范围。在附图中,为了清楚起见放大了组件。The utility model will be fully described below with reference to the accompanying drawings showing embodiments of the utility model. However, the invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, components are exaggerated for clarity.
图3示出了本实用新型示例性实施例的多通道数字量脉冲输出的电路图。Fig. 3 shows a circuit diagram of a multi-channel digital pulse output in an exemplary embodiment of the present invention.
如图3所示,本发明的多通道数字量脉冲输出电路包括:脉冲输出电路110,在控制器的控制下生成脉冲信号并将脉冲信号输出到负载的第一端;检测电路130,连接于负载的第二端和第一电源的两端,用于检测负载和第一电源的状态并输出检测信号到控制器;和控制器120,连接于脉冲输出电路和检测电路,用于响应于来自检测电路的检测信号而使能或禁止脉冲输出电路的脉冲信号的输出。As shown in Figure 3, the multi-channel digital pulse output circuit of the present invention includes: a
如图3所示,检测电路130进一步包括电源检测电路131,用于检测电源的掉电。下面将结合具体电路结构进行说明。As shown in FIG. 3 , the
●脉冲输出的实现●Realization of pulse output
脉冲输出电路110包括:频率发生器、光耦1和MOSFET T1。频率发生器经光耦1通过MOSFET将脉冲信号输出到负载1。The
频率发生器由一片CPLD组成,它首先接收由控制器120输出的脉冲,将其进行内部处理以转换为1-200KHZ的频率脉冲,通过控制器120决定是否将此脉冲输出至光耦。The frequency generator is composed of a piece of CPLD. It first receives the pulse output by the
以通道1为例说明,正常情况下,通道1的输出MOSFET T1未导通,检测信号即光耦2的输出为1电平,当使能信号为1即有效时,光耦1的驱动电源内部3.3V被打开,此时只要频率发生器有脉冲输出,高速光耦1即通过MOSFET输出脉冲至负载1。Take channel 1 as an example. Under normal circumstances, the output MOSFET T1 of channel 1 is not turned on, and the detection signal, that is, the output of optocoupler 2 is at 1 level. The internal 3.3V is turned on. At this time, as long as the frequency generator has a pulse output, the high-speed optocoupler 1 will output pulses to the load 1 through the MOSFET.
●过载及短路检测和保护的实现●Realization of overload and short circuit detection and protection
输出电路的最大电流值被限制到1A左右{(5V-Vgs)/2Ohm,Vgs=2.5~3V}。The maximum current value of the output circuit is limited to about 1A {(5V-Vgs)/2Ohm, Vgs=2.5~3V}.
检测电路130包括:电源检测电路131、电阻器R1、晶体管T2和光耦2。电阻器R1连接于T1的漏极和地之间。T2的基极和发射极连接于R1两端,其集电极与电源检测电路131相连。电源检测电路131的另一端接电源正极。光耦2的发光二极管两端与T2的发射极和集电极相连,光耦2的输出端连接于控制器120。The
控制器120包括处理器和与电路,该处理器例如可以XCEL或专用的ASIC控制器来实现,频率发生器通过检测XCEL IO管脚的命令XCEL决定是否将此脉冲输出至频率发生器。本领域技术人员应该理解,本发明的控制器并不限于此处公开的处理器和与电路,也可以采用其他具有同样功能单片机来实现。The
当通道1的输出晶体管T1导通时,负载电流通过T1及电阻器R1至地,当负载1的阻抗变小或负载短路时,流过R1的电流I1迅速增加,当此电流达到或超过0.35A时,电阻器R1上的电压达到或超过0.7V,晶体管T2导通变为0电平,将流过光耦2的电流旁路到地,光耦2的输出变为0电平,由此0电平检测信号被XCEL检测到一次,同时此0电平检测信号又通过与电路切断光耦1的供电,使输出关断。此举又使检测信号返回到1状态,直至XCEL再次使能输出脉冲,等待下次过载或短路检测。When the output transistor T1 of channel 1 is turned on, the load current passes through T1 and resistor R1 to the ground. When the impedance of load 1 becomes smaller or the load is short-circuited, the current I1 flowing through R1 increases rapidly. When the current reaches or exceeds 0.35 When A, the voltage on the resistor R1 reaches or exceeds 0.7V, the transistor T2 is turned on and becomes 0 level, and the current flowing through the optocoupler 2 is bypassed to the ground, and the output of the optocoupler 2 becomes 0 level, by The 0-level detection signal is detected once by XCEL, and at the same time, the 0-level detection signal cuts off the power supply of the optocoupler 1 through the circuit, so that the output is turned off. This action makes the detection signal return to 1 state, until XCEL enables the output pulse again, waiting for the next overload or short circuit detection.
XCEL检测到四个连续0电平检测信号后,关断所有输出。在XCEL检测到四个连续0电平检测信号之后,XCEL生成0电平使能标志信号,并通过输出端②输出该0电平使能标志信号,由此关断所有输出After XCEL detects four consecutive 0-level detection signals, it turns off all outputs. After XCEL detects four consecutive 0-level detection signals, XCEL generates a 0-level enable flag signal, and outputs the 0-level enable flag signal through the output terminal ②, thereby turning off all outputs
●24V电源掉电的检测●Detection of 24V power failure
如图所示,电阻器R2、R3、R4、R5及晶体管T3组成对24V的电源检测电路131,当24V电源掉电时,流过光耦2的电流减小到0,光耦2的输出也变为0电平,XCEL检测到此0电平的检测信号,重复如前所述过程,4次之后,XCEL判断IO侧电源掉电(或负载有问题)并以如上过载和短路检测相同的方式关断输出。As shown in the figure, resistors R2, R3, R4, R5 and transistor T3 form a 24V power
●多路通道输出的检测及保护●Detection and protection of multi-channel output
如图3所示,所有通道的过载或短路检测都通过晶体管T2到Tn以集电极开路的方式连接在一起组成或非电路,任一通道过载或短路都会将光耦2的IF电流旁路到地,使光耦2输出0电平的检测信号至XCEL,这样所有通道通过光耦2实现了过载检测及保护。As shown in Figure 3, the overload or short circuit detection of all channels are connected together to form a NOR circuit through transistors T2 to Tn in an open-collector manner, any channel overload or short circuit will bypass the IF current of optocoupler 2 to ground, so that optocoupler 2 outputs a 0-level detection signal to XCEL, so that all channels realize overload detection and protection through optocoupler 2.
本实用新型的电路设计简单,仅需几个电阻器和小信号晶体管即可实现电源掉电检测和多路信号过载及短路的保护,造价低廉,同时也便于用户使用。The circuit design of the utility model is simple, and only a few resistors and small-signal transistors are needed to realize power failure detection and multi-channel signal overload and short-circuit protection.
尽管本实用新型是参照其特定的优选实施例来描述的,但本领域的技术人员应该理解,在不脱离由所附权利要求限定的本实用新型的精神和范围的情况下,可以对其进行形式和细节的各种修改。Although the present invention has been described with reference to certain preferred embodiments thereof, those skilled in the art will appreciate that modifications may be made thereto without departing from the spirit and scope of the present invention as defined by the appended claims. Various modifications of form and detail.
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| CNU2008200077910U CN201167229Y (en) | 2008-03-14 | 2008-03-14 | Overload protection and power-off detection of multiple high-speed pulse output circuits |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102221640A (en) * | 2010-04-16 | 2011-10-19 | 日隆电子股份有限公司 | Voltage detector and protective device of alternating/direct-current alternative power converter |
| CN103312313A (en) * | 2012-03-07 | 2013-09-18 | 快捷半导体(苏州)有限公司 | rail to rail enable signal and level conversion circuit |
| CN112929013A (en) * | 2021-02-01 | 2021-06-08 | 四川爱创科技有限公司 | Circuit for realizing power failure self-recovery memory function and control method thereof |
-
2008
- 2008-03-14 CN CNU2008200077910U patent/CN201167229Y/en not_active Expired - Lifetime
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102221640A (en) * | 2010-04-16 | 2011-10-19 | 日隆电子股份有限公司 | Voltage detector and protective device of alternating/direct-current alternative power converter |
| CN102221640B (en) * | 2010-04-16 | 2015-11-25 | 日隆电子股份有限公司 | The protective device of voltage detector and alternating/direct-current alternative power converter |
| CN103312313A (en) * | 2012-03-07 | 2013-09-18 | 快捷半导体(苏州)有限公司 | rail to rail enable signal and level conversion circuit |
| US9094019B2 (en) | 2012-03-07 | 2015-07-28 | Fairchild Semiconductor Corporation | Level switching circuit and method for controlling rail-to-rail enabling signal |
| CN103312313B (en) * | 2012-03-07 | 2016-02-24 | 快捷半导体(苏州)有限公司 | A kind of control method of rail-to-rail enable signal, circuit and level shifting circuit |
| CN112929013A (en) * | 2021-02-01 | 2021-06-08 | 四川爱创科技有限公司 | Circuit for realizing power failure self-recovery memory function and control method thereof |
| CN112929013B (en) * | 2021-02-01 | 2023-07-25 | 四川爱创科技有限公司 | Circuit for realizing power-down self-recovery memory function and control method thereof |
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