CN201038148Y - 一种用于三极管的封装框架 - Google Patents
一种用于三极管的封装框架 Download PDFInfo
- Publication number
- CN201038148Y CN201038148Y CNU2007200059481U CN200720005948U CN201038148Y CN 201038148 Y CN201038148 Y CN 201038148Y CN U2007200059481 U CNU2007200059481 U CN U2007200059481U CN 200720005948 U CN200720005948 U CN 200720005948U CN 201038148 Y CN201038148 Y CN 201038148Y
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- central layer
- chip carrying
- plate
- packaging frame
- carrying plate
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Abstract
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Claims (4)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007200059481U CN201038148Y (zh) | 2007-03-27 | 2007-03-27 | 一种用于三极管的封装框架 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007200059481U CN201038148Y (zh) | 2007-03-27 | 2007-03-27 | 一种用于三极管的封装框架 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201038148Y true CN201038148Y (zh) | 2008-03-19 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2007200059481U Expired - Fee Related CN201038148Y (zh) | 2007-03-27 | 2007-03-27 | 一种用于三极管的封装框架 |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201038148Y (zh) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102368492A (zh) * | 2011-10-25 | 2012-03-07 | 张轩 | 一种设置有引线孔的三极管引线框架 |
| US10297518B2 (en) | 2012-09-28 | 2019-05-21 | Stats Chippac, Ltd. | Semiconductor device and method of forming supporting layer over semiconductor die in thin fan-out wafer level chip scale package |
-
2007
- 2007-03-27 CN CNU2007200059481U patent/CN201038148Y/zh not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102368492A (zh) * | 2011-10-25 | 2012-03-07 | 张轩 | 一种设置有引线孔的三极管引线框架 |
| US10297518B2 (en) | 2012-09-28 | 2019-05-21 | Stats Chippac, Ltd. | Semiconductor device and method of forming supporting layer over semiconductor die in thin fan-out wafer level chip scale package |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| EE01 | Entry into force of recordation of patent licensing contract |
Assignee: Guangzhou Hailin Electronic Technology Co., Ltd. Assignor: Guangzhou Youyi Electronic Technology Co., Ltd. Contract fulfillment period: 2008.6.15 to 2013.6.15 Contract record no.: 2009440000327 Denomination of utility model: Packaging frame for three-electrode tube Granted publication date: 20080319 License type: Exclusive license Record date: 20090506 |
|
| LIC | Patent licence contract for exploitation submitted for record |
Free format text: EXCLUSIVE LICENSE; TIME LIMIT OF IMPLEMENTING CONTACT: 2008.6.15 TO 2013.6.15; CHANGE OF CONTRACT Name of requester: GUANGZHOU CITY HAILIN ELECTRONIC TECHNOLOGY DEVELO Effective date: 20090506 |
|
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080319 Termination date: 20110327 |