CN201025484Y - Voltage surge test device - Google Patents
Voltage surge test device Download PDFInfo
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- CN201025484Y CN201025484Y CNU2007200357194U CN200720035719U CN201025484Y CN 201025484 Y CN201025484 Y CN 201025484Y CN U2007200357194 U CNU2007200357194 U CN U2007200357194U CN 200720035719 U CN200720035719 U CN 200720035719U CN 201025484 Y CN201025484 Y CN 201025484Y
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- 230000005669 field effect Effects 0.000 claims abstract description 31
- 238000009434 installation Methods 0.000 claims description 17
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
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Abstract
一种电压突波测试装置，其包括一第一电压输入端及一控制模块，且该控制模块具有一电压控制端，该控制模块电性连接一第一场效应晶体管，其设有一第一栅极、一第一源极及一第一漏极，以分别电性连接电压控制端、接地端及一分压电阻的一端；而分压电阻的另一端电性连接一第二电压输入端；且第一场效应晶体管电性连接一第二场效应晶体管，其设有一第二栅极、一第二漏极及一第二源极，以分别电性连接第一漏极、一压控开关的负极及第二电压输入端，且第二漏极电性连接一电压输出端，而压控开关的正极电性连接第一电压输入端。如此一来，电压控制端控制第一、第二场效应晶体管的通断，以交替式改变电压输出端的电压，以作为设备组件的突波测试电压。
A voltage surge testing device, which includes a first voltage input terminal and a control module, and the control module has a voltage control terminal, and the control module is electrically connected to a first field effect transistor, which is provided with a first gate Pole, a first source and a first drain are electrically connected to the voltage control terminal, the ground terminal and one end of a voltage dividing resistor respectively; and the other end of the voltage dividing resistor is electrically connected to a second voltage input terminal; And the first field effect transistor is electrically connected to a second field effect transistor, which is provided with a second gate, a second drain and a second source, so as to be electrically connected to the first drain and a voltage-controlled switch respectively The negative pole of the voltage-controlled switch is electrically connected to the second voltage input terminal, the second drain is electrically connected to a voltage output terminal, and the positive pole of the voltage-controlled switch is electrically connected to the first voltage input terminal. In this way, the voltage control terminal controls the on-off of the first and second field effect transistors to alternately change the voltage of the voltage output terminal as the surge test voltage of the device components.
Description
[technical field]
The utility model is a kind of abrupt voltage wave proving installation, particularly a kind of abrupt voltage wave proving installation that produces the intermittence abrupt voltage wave.
[background technology]
When power supply connects in the load equipment, near the equipment of high electric current can cause the abrupt voltage wave of inertia in the transporting of electric power after shutdown.General computing machine or precision equipment all have the certain voltage range of design, to accept the generation of this kind situation.But if this abrupt voltage wave surpass set scope will damage equipment assembly (for example fan) and cause fault and life-span to shorten.
Therefore, the anti-surging aptitude tests of apparatus assembly are seemed extremely important, but do not relate to the test of anti-surging in the present proving installation.
[summary of the invention]
Fundamental purpose of the present utility model is to provide a kind of abrupt voltage wave proving installation that produces the intermittence abrupt voltage wave.
For reaching above-mentioned purpose, the utility model provides a kind of abrupt voltage wave proving installation, it electrically connects an apparatus assembly to test the anti-surging ability of this apparatus assembly, and this abrupt voltage wave proving installation comprises one first voltage input end and a control module, and this control module has a voltage controling end, and this voltage controling end intermittence output HIGH voltage and low-voltage; This control module electrically connects one first field effect transistor, and this first field effect transistor is provided with a first grid, one first source electrode and one first drain electrode, wherein, this first grid electrically connects voltage controling end, this first source ground, first drain electrode electrically connects an end of a divider resistance: and the other end of this divider resistance electrically connects one second voltage input end; And this first field effect transistor electrically connects one second field effect transistor, and this second field effect transistor is provided with a second grid, one second source electrode and one second drain electrode, wherein, second grid electrically connects first drain electrode, second source electrode electrically connects second voltage input end, second drain electrode electrically connects the negative pole of a votage control switch, and the positive pole of this votage control switch electrically connects first voltage input end.In addition, this second drain electrode electrically connects a voltage output end, and this voltage output end electrically connects the input end of this apparatus assembly.
Compared to prior art, the utility model can produce the intermittence abrupt voltage wave, and when voltage controling end was high voltage, first field effect transistor and second field effect transistor were off-state, at this moment, the voltage of voltage output end output is from first voltage input end; And when voltage controling end was low-voltage, first field effect transistor and second field effect transistor were conducting state, and the voltage of voltage output end is from second voltage input end; Therefore, the voltage of voltage output end is replacing of two kinds of voltages, can be used as the surging test voltage of apparatus assembly, thereby satisfies the requirement of test.
[description of drawings]
Fig. 1 is the circuit diagram of the utility model abrupt voltage wave proving installation.
[embodiment]
See also shown in Figure 1, the utility model abrupt voltage wave proving installation electrically connects an apparatus assembly 80 (for example fan) to test the anti-surging ability of this apparatus assembly 80, and this abrupt voltage wave proving installation comprises one first voltage input end 11 and a control module 20, in present embodiment, this control module 20 is 8051 chips.And this control module 20 comprises that (this control module 20 is provided with 24 voltage controling ends 21 altogether for a power end 22 and at least one voltage controling end 21, but 24 apparatus assemblies 80 of synchronism detection), wherein, this power end 22 can electrically connect an external power source, also can electrically connect first voltage input end 11 indirectly; And these voltage controling end 21 intermittence output HIGH voltage and low-voltages; In present embodiment, the voltage controling end 21 of this control module 20 electrically connects an end of a pull-up resistor 31, and the other end of this pull-up resistor 31 electrically connects the negative pole of one first diode 32, and the positive pole of this first diode 32 electrically connects the power end 22 of first voltage input end 11 and control module 20.This control module 20 electrically connects one first field effect transistor 40, and this first field effect transistor 40 is provided with a first grid 41, one first source electrode 42 and one first drain electrode 43, wherein, this first grid 41 electrically connects voltage controling end 21, these first source electrode, 42 ground connection, first drain electrode 43 electrically connects an end of a divider resistance 50; And the other end of this divider resistance 50 electrically connects one second voltage input end 12; And this first field effect transistor 40 electrically connects one second field effect transistor 60, and this second field effect transistor 60 is provided with a second grid 61, one second source electrode 62 and one second drains 63, and wherein, second grid 61 electrically connects first drain electrode 43.And second source electrode 62 electrically connects this second voltage input end 12; In present embodiment, the unidirectional conduction module 90 (this unidirectional conduction module 90 is formed by six second diode 91 series aiding connections) of connecting between second source electrode 62 and second voltage input end 12, and the positive input terminal of this unidirectional conduction module 90 electrically connects second voltage input end 12, and the negative input end of this unidirectional conduction module 90 electrically connects second source electrode 62.And second drain electrode 63 electrically connects the negative pole of a votage control switch 33, and the positive pole of this votage control switch 33 electrically connects first voltage input end 11; In present embodiment, this votage control switch 33 is a diode, and the positive pole of this diode electrically connects first voltage input end 11, and the negative pole of this diode electrically connects second drain electrode 63.And this second drain electrode 63 electrically connects a voltage output end 70, and this voltage output end 70 electrically connects the input end of this apparatus assembly 80.
When voltage controling end 21 was high voltage, first field effect transistor 40 and second field effect transistor 60 were off-state, and at this moment, the voltage of voltage output end 70 outputs is from first voltage input end 11; And when voltage controling end 21 was low-voltage, first field effect transistor 40 and second field effect transistor 60 were conducting state, and the voltage of voltage output end 70 is from second voltage input end 12; Therefore, the voltage of voltage output end 70 is replacing of two kinds of voltages, can be used as the surging test voltage of apparatus assembly 80.
Now lifting an example is illustrated, the operating voltage of apparatus assembly 80 is made as 5-7.8V, the resistance of pull-up resistor 31 and divider resistance 50 is made as 10K ohm, and the forward conduction voltage of first diode 32, votage control switch 33 and second diode 91 is 0.1V, and first voltage input end, 11 external 5.1V voltage sources, second voltage input end, 12 external 8.6V voltage sources.When voltage controling end 21 is high voltage, first field effect transistor 40 and second field effect transistor 60 are off-state, at this moment, the voltage of voltage output end 70 outputs is from first voltage input end 11, the forward conduction voltage 0.1V of deduction votage control switch 33, the voltage that just obtains voltage output end 70 outputs is 5V; And when voltage controling end 21 is low-voltage, first field effect transistor 40 and second field effect transistor 60 are conducting state, the voltage of voltage output end 70 is from second voltage input end 12, the forward conduction voltage 0.6V of six second diodes 91 of deduction, the voltage that just obtains voltage output end 70 outputs is 8V.Control by control module 20, voltage controling end 21 meeting intermittence output HIGH voltage and low-voltages, so that the voltage at voltage output end 70 places checker between 5V and 8V (7.8V when exceeding operate as normal is surging), fully simulated the test environment of abrupt voltage wave.
Claims (6)
1. an abrupt voltage wave proving installation electrically connects an apparatus assembly to test the anti-surging ability of this apparatus assembly, it is characterized in that this abrupt voltage wave proving installation comprises:
One first voltage input end,
One control module has a voltage controling end, and this voltage controling end intermittence output HIGH voltage and low-voltage;
One first field effect transistor electrically connects this control module, and this first field effect transistor is provided with a first grid, one first source electrode and one first drains, and wherein, this first grid electrically connects voltage controling end, and this first source ground;
One second field effect transistor electrically connects this first field effect transistor, and this second field effect transistor is provided with a second grid, one second source electrode and one second drains, and wherein, this second grid electrically connects this first drain electrode;
One votage control switch, its anodal first voltage input end that electrically connects, and its negative pole electrically connects second drain electrode;
One divider resistance, one end electrically connect first drain electrode;
One second voltage input end electrically connects the other end and second source electrode of this divider resistance;
One voltage output end, the input end of electric connection second drain electrode and this apparatus assembly.
2. abrupt voltage wave proving installation according to claim 1 is characterized in that: this control module is 8051 chips, and this control module is provided with 24 voltage controling ends altogether.
3. abrupt voltage wave proving installation according to claim 1, it is characterized in that: the voltage controling end of this control module electrically connects an end of a pull-up resistor, and the other end of this pull-up resistor electrically connects the negative pole of one first diode, and the positive pole of this first diode electrically connects first voltage input end.
4. abrupt voltage wave proving installation according to claim 1 is characterized in that: this votage control switch is a diode, and the positive pole of this diode electrically connects first voltage input end, and the negative pole of this diode electrically connects voltage output end.
5. abrupt voltage wave proving installation according to claim 1, it is characterized in that: the unidirectional conduction module of connecting between second voltage input end and second source electrode, and the positive input terminal of this unidirectional conduction module electrically connects second voltage input end, and the negative input end of this unidirectional conduction module electrically connects second source electrode.
6. abrupt voltage wave proving installation according to claim 5 is characterized in that: this unidirectional conduction module is formed by six second diode series aiding connections.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007200357194U CN201025484Y (en) | 2007-03-27 | 2007-03-27 | Voltage surge test device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2007200357194U CN201025484Y (en) | 2007-03-27 | 2007-03-27 | Voltage surge test device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201025484Y true CN201025484Y (en) | 2008-02-20 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2007200357194U Expired - Fee Related CN201025484Y (en) | 2007-03-27 | 2007-03-27 | Voltage surge test device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201025484Y (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103105569A (en) * | 2011-11-15 | 2013-05-15 | 三菱电机株式会社 | Semiconductor device measuring voltage applied to semiconductor switch element |
| CN105629028A (en) * | 2014-11-04 | 2016-06-01 | 华邦电子股份有限公司 | Method for detecting voltage surge of power supply and single chip integrated circuit device |
| CN112763886A (en) * | 2019-10-21 | 2021-05-07 | 瑞昱半导体股份有限公司 | Surge generating point detection device and method |
-
2007
- 2007-03-27 CN CNU2007200357194U patent/CN201025484Y/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103105569A (en) * | 2011-11-15 | 2013-05-15 | 三菱电机株式会社 | Semiconductor device measuring voltage applied to semiconductor switch element |
| CN105629028A (en) * | 2014-11-04 | 2016-06-01 | 华邦电子股份有限公司 | Method for detecting voltage surge of power supply and single chip integrated circuit device |
| CN112763886A (en) * | 2019-10-21 | 2021-05-07 | 瑞昱半导体股份有限公司 | Surge generating point detection device and method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080220 |