CN201004223Y - Serial high-order connection technology interface host bridging device - Google Patents

Abstract

A SATA host bridge device includes: a pair of physical units, each connected to a SATA host device, providing SATA electrical signal conversion and connection; a pair of link units, each connected to a physical unit, receiving data decoding and transmitting data encoding; a pair of transmission ports, each connected to a link unit, controlling the connection of the SATA interface host to the device and the buffer and status of the SATA host; at least one bridge unit, connecting two transmission ports, for the SATA host to host data transmission control, so that the SATA data between the two transmission ports are interconnected, and two SATA host devices are directly connected for data transmission. The utility model can provide direct data and signal transmission and reception connection functions, and achieve high-speed data or signal transmission functions.

Description

SHATL host bridge device

1. Technical field

The utility model relates to a host-to-host connection device, in particular to a serial high-level connection technology interface host bridge device for direct connection of data and signals between two SATA interface hosts.

2. Background technology

The host to host (HOST TO HOST) connection method commonly used in existing electronic devices is connected through the USB interface. Although the USB interface has a popular and convenient connection function, there are problems with the transmission speed and bandwidth of the USB interface. Even the latest The USB2.0 interface of the current USB2.0 interface, the transmission speed can only reach about 480Mbps, and it has gradually been unable to load the new, such as the high-speed data or signal transmission requirements of the large-capacity storage device of the host computer; There is a serial advanced connection technology (SATA, Serial Advanced Technology Attachment) interface. Although it has a transmission speed up to 3Gbps, it can only provide a transmission framework between hosts and devices, and cannot provide a host-to-host connection mode. Therefore, it affects the data or signal transmission speed and efficiency between the host and the host.

In terms of related previous patent applications, such as the applicant's patent application for "USB bridge device for host to host" in Taiwan Patent Publication No. 390984, which is approved by the applicant, which discloses a typical host-to-host bridge device with a USB interface type. In addition, China Taiwan Patent Publication No. M272209 "Micro-hard disk interface structure improvement" new patent case, reveals the host-to-device connection structure and technology of the typical SATA interface, and cannot provide the host-to-host connection function.

3. Contents of utility model

The main purpose of the utility model is to overcome the above-mentioned shortcomings existing in existing products, and provide a serial high-level connection technology interface host bridging device, which provides a direct host-to-host connection bridging device of the SATA interface, which can provide such as a computer host-to-host bridging device. Direct data and signal transmission and connection functions between computer hosts.

Another object of the present invention is to provide a serial high-level connection technology interface host bridge device, which can achieve high-speed data or signal transmission function from host to host by means of direct connection between host device to host device through SATA interface.

The purpose of this utility model is achieved by the following technical solutions.

The utility model serial high-order connection technology interface host bridging device is characterized in that it comprises:

A pair of physical units, each physical unit is respectively connected to a serial high-level connection technology interface host device, and the physical unit provides serial high-level connection technology interface electrical signal conversion and connection;

A pair of link units, each link unit is connected to the physical unit, the link unit receives data decoding and transmits data encoding, respectively decodes or encodes the serial high-level connection technology interface data or signals from the physical unit;

A pair of transmission ports, each transmission port is connected to the link unit, and the transmission port controls the connection of the SATA interface host to the device and the register and status of the serial advanced connection technology interface;

At least one bridge unit is connected to the two transmission ports for controlling the data transmission between the serial high-level connection technology interface host and the host computer, so that the serial high-level connection technology interface data between the two transmission ports are connected to each other, and the two serial high-level connection technology interface data are connected to each other. Technology Interface Host devices are directly connected for data transmission.

In the aforesaid SHT interface host bridge device, the physical unit is connected to a SHT interface connector.

In the aforesaid serial high-order connection technology interface host bridge device, the physical unit is connected to a serial high-level connection technology interface socket.

In the aforesaid serial high-level connection technology interface host bridge device, the serial high-level connection technology interface host device connected to the physical unit is a computer host.

In the aforesaid serial high-order connection technology interface host bridge device, a control register is arranged inside the transmission port.

The aforementioned serial high-level connection technology interface host bridge device, wherein the bridge unit includes:

A data buffer for buffering and temporarily storing data transmission between the two transmission ports, so that data can be temporarily stored in an asynchronous first-in first-out buffer and read and written at different clock speeds;

An arbiter connected to the data buffer, the arbiter is used to arbitrate the data access and data transmission sequence of any one of the two transmission ports, and controls the sequence of data transmission connections between the two transmission ports;

A transmit/receive controller is connected to the data buffer, and the transmit/receive controller controls the state of data transmission and reception between the two transmission ports according to the state of the data buffer.

The aforementioned serial high-level connection technology interface host bridge device, wherein the bridge unit is a microprocessor.

The beneficial effect of the utility model serial high-level connection technology interface host bridging device is that it includes a pair of physical units, a link unit and a transmission port, and at least one bridging unit; wherein, the physical units are respectively connected to a SATA interface host device, and the link The unit is connected to the physical unit and the transmission port, and provides the decoding function of transmitting and receiving data. The transmission port controls the connection of the SATA interface host to the device and the buffer and state control of the SATA interface. The bridge unit is connected between the two transmission ports, so that The above-mentioned two SATA interface hosts can transmit and receive data to each other, and then directly connect the SATA interface host devices connected to the physical unit for direct signal and data transmission and reception, so as to directly provide direct connection between the two SATA interface hosts. High-speed transmission of data and signals.

4. Description of drawings

Fig. 1 is a block circuit diagram of the first embodiment of the utility model.

Fig. 2 is a block circuit diagram of the second embodiment of the utility model.

Fig. 3 is a block circuit diagram of the third embodiment of the present invention.

Fig. 4 is a diagram of the first application example of the utility model.

Fig. 5 is a diagram of a second application example of the present invention.

Explanation of main symbols in the figure: 100 is a serial advanced connection technology (SATA) interface host bridge device, 10 physical unit, 20 physical unit, 30 link unit, 40 link unit, 50 transmission port, 51 control buffer, 60 transmission port , 61 control buffer, 70 bridge unit, 71 data buffer, 72 arbiter, 73 transmit/receive controller, 200 is SATA interface host device, 300 is SATA interface host device, 400 cable, 410 is SATA interface connector, 420 is a SATA interface connector, 510 is a SATA interface socket, 520 is a SATA interface socket, 530 is a SATA interface cable, and 540 is a SATA interface cable.

5. Specific implementation

Referring to Fig. 1, it is a first embodiment of the utility model Serial Advanced Access Technology (SATA) interface host bridging device 100, wherein, the SATA interface host bridging device 100 includes a pair of physical units 10 and 20, a link unit 30 and 40, transmission ports 50 and 60, at least one bridge unit 70; the physical units 10 and 20 are used for SATA interface electrical signal conversion and connection, the physical unit 10 is connected to a SATA interface host device 200, and the physical unit 20 is connected to a SATA interface host Device 300, the type of SATA interface host device 200 and 300 is not limited, in the utility model, take the computer host as an example for illustration, other host devices with SATA interface such as notebook computers or game console hosts should also belong to the utility model. New category of technology.

The above-mentioned link unit 30 is connected to the physical unit 10, and the link unit 40 is connected to the physical unit 20. The link units 30 and 40 provide the functions of receiving data decoding and transmitting data, so that the SATA interface data or signals from the physical units 10 and 20 are respectively Decode or encode.

The above-mentioned transmission port 50 is connected to the link unit 30, and the transmission port 60 is connected to the link unit 40. The transmission ports 50 and 60 provide buffers and status control for controlling the connection to the SATA interface host device and the SATA interface.

Above-mentioned bridging unit 70, connect transmission port 50 and 60 respectively, this bridging unit 70 provides the host computer of SATA interface to the data transmission control of host computer, makes the SATA interface data between this transmission port 50 and 60 pass through bridging unit 70 transmission control and can Even if the SATA interface host devices 200 and 300 can be directly connected for data transmission.

The type of the bridge unit 70 is not limited. In the first embodiment of the present invention, a microprocessor is taken as an example, and other equivalent circuits or devices should also belong to the technical scope of the present invention.

Referring to Fig. 2, it is the second embodiment of the serial advanced connection technology (SATA) interface host bridging device 100 of the present invention, that is, the transmission port 50 is provided with a control register 51, and the transmission port 60 is provided with a The control register 61, the control registers 51 and 61 internally store the SATA interface control specification, so as to implement the functions of SATA host-to-device connection and SATA interface register and status control.

Referring to the third figure, it is a third embodiment of the serial high-level connection technology (SATA) interface host bridge device 100 of the present utility model, and the bridge unit 70 includes a data buffer 71, an arbiter (ARBITER) 72 and a transmission / receiving controller 73, the data buffer 71 is connected to the above-mentioned transmission ports 50 and 60, the data buffer 71 provides data transmission buffering between the transmission ports 50 and 60, even if the data can be asynchronous (asynchronous). FIFO buffer temporary storage and data read and write at different clock speeds.

The above-mentioned arbiter 72 is connected to the data buffer 71, and the arbiter 72 provides the data access of any one of the arbitration transmission ports 50 and 60 and the data transmission order of the control registers 51 and 61 as shown in FIG. 2, so as to control the transmission port 50 and the sequence of data transmission connections between 60.

The above-mentioned transmission/reception controller 73 is connected to the data buffer 71, and the transmission/reception controller 73 controls the data transmission and reception status between the transmission ports 50 and 60 according to the state of the data buffer 71, for example: when the data buffer 71 When it is full, the transmission port 50 and 60 will stop transmitting the data of the SATA interface host computer 200 and 300, and when the data buffer 71 is empty, the transmission port 50 and 60 will stop receiving the SATA interface host computer 200. And 300 information.

Referring to FIG. 4 , it is a first application example of the present invention, wherein, the Serial Advanced Access Technology (SATA) interface host bridge device 100 is planned and arranged as an integrated circuit and embedded in a cable 400 Inside, the two ends of the cable 400 are respectively provided with a SATA interface connector 410 and 420, the SATA interface connector 410 is internally connected to the physical unit 10 of the SATA interface host bridge device 100, and the SATA interface connector 420 is internally connected to the entity of the SATA interface host bridge device 100 The unit 20 is connected to the above-mentioned SATA interface host devices 200 and 300 respectively by means of the SATA interface connectors 410 and 420, so that the SATA interface host devices 200 and 300 of the computer host type can directly pass through the SATA interface host bridge device 100 of the present utility model. Direct data or signal transmission connection.

Referring to Fig. 5, it is the second application example of the present utility model, wherein, the serial advanced connection technology (SATA) interface host bridging device 100 is a relay connection device type, that is, the physical units 10 and 20 are respectively connected to a SATA interface sockets 510 and 520, the SATA interface socket 510 is connected with the SATA interface host device 200 by a SATA interface cable 530, and the SATA interface cable 530 is an existing SATA interface host computer connecting cable to the device. Similarly, the SATA interface socket 520 and the SATA interface host device 300 are connected through a SATA interface cable 540. Similarly, the data transmission and connection effect between the SATA interface host devices 200 and 300 can be achieved through the SATA interface host bridge device 100 of the present utility model.

The SATA interface host bridging device of the present invention shown in Fig. 1 to Fig. 5 above, the relevant descriptions and drawings disclosed therein are only for the convenience of clarifying the technical content and technical means of the present utility model, and only disclosed preferred embodiments , not to limit the utility model in any form, any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the utility model still belong to the scope of the technical solution of the utility model.

Claims (7)

1, a kind of serial high-order interconnection technique interface main frame bridge-set is characterized in that, comprising:

A pair of solid element, each solid element connect a serial high-order interconnection technique interface host apparatus respectively, and this solid element provides the conversion of serial high-order interconnection technique interface electrical signal and connects;

A pair of link unit, each link unit connects solid element, and this link unit receives the coding of data coding and the data of transmission, will decipher or encodes from the serial high-order interconnection technique interface data of solid element or signal respectively;

A pair of transmit port, each transmit port connects link unit, and this transmit port control SATA interface main frame is to the connection of device and buffer, the state of serial high-order interconnection technique interface;

At least one bridge-jointing unit, connect two transmit pories, Data Transmission Controlling for serial high-order interconnection technique interface host-to-host, serial high-order interconnection technique interface data between two transmit pories is interconnected, directly carries out data transmission between dual serial high-order interconnection technique interface host apparatus and connect.

2, serial high-order interconnection technique interface main frame bridge-set according to claim 1 is characterized in that, described solid element connects a serial high-order interconnection technique port connections.

3, serial high-order interconnection technique interface main frame bridge-set according to claim 1 is characterized in that, described solid element connects a serial high-order interconnection technique interface socket.

4, serial high-order interconnection technique interface main frame bridge-set according to claim 1 is characterized in that, the serial high-order interconnection technique interface host apparatus that described solid element connects is a main frame.

5, serial high-order interconnection technique interface main frame bridge-set according to claim 1 is characterized in that, described transmit port inside is provided with a control buffer.

6, serial high-order interconnection technique interface main frame bridge-set according to claim 1 is characterized in that described bridge-jointing unit comprises:

One data buffer, temporary for the buffering of the data transmission between two transmit pories, it is temporary and carry out data reading-writing under different clock pulse speed to make data can carry out asynchronous first in first out buffering;

One moderator connects this data buffer, and this moderator is for any one data access and data transfer sequence of arbitration two transmit pories, and the data transmission of controlling between two transmit pories connects sequencing;

One biography/admission controller connects data buffer, and this biography/admission controller is controlled data transmission and accepting state between two transmit pories according to the state of data impact damper.

7, serial high-order interconnection technique interface main frame bridge-set according to claim 1 is characterized in that described bridge-jointing unit is a microprocessor.

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