CN208208301U - Voltage-type pixel unit circuit with threshold compensation - Google Patents
Voltage-type pixel unit circuit with threshold compensation Download PDFInfo
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Abstract
本实用新型公开了一种带阈值补偿的电压型像素单元电路,其特征在于它包括:第一晶体管M1、第二晶体管M2、第三晶体管M3、第四晶体管M4、第五晶体管M5、采样保持电容C1、数据信号线VDATA、采样控制信号线SMP、保持信号线HLD、电源线VDD、发光器件的共阴极电源线VCOM、发光器件。本专利提出的新型带阈值补偿的电压型像素单元驱动电路,能有效解决驱动管阈值变化对像素阵列驱动电流带来的波动,进而提高整个显示器的显示一致性。
The utility model discloses a voltage type pixel unit circuit with threshold value compensation, which is characterized in that it comprises: a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sampling and holding Capacitor C1, data signal line VDATA, sampling control signal line SMP, hold signal line HLD, power line VDD, common cathode power line VCOM of the light emitting device, and the light emitting device. The novel voltage-type pixel unit drive circuit with threshold compensation proposed in this patent can effectively solve the fluctuation of the drive current of the pixel array caused by the change of the threshold of the drive tube, thereby improving the display consistency of the entire display.
Description
技术领域technical field
本实用新型涉及自发光显示的像素单元电路,尤其涉及OLED/LED微显示驱动的像素单元电路。The utility model relates to a pixel unit circuit for self-luminous display, in particular to a pixel unit circuit driven by an OLED/LED micro display.
背景技术Background technique
近些年随着AR(Augmented Reality,增强现实)/VR((Virtual Reality,虚拟现实)技术的发展,与之紧密相关的微显示技术也得到了广泛的关注。微显示(Microdisplay)技术是显示技术领域的一个分支,一般将显示器对角线尺寸小于1英寸(2.54cm)或者指那些小到需要光学放大的显示器称为微显示器。目前常见的微显示技术有OLEDoS(OrganicLight-Emitting Diode on Silicon,硅基有机发光)、LEDoS(Light Emitting Diode onSilicon,硅基二极管发光)、LCoS(Liquid Crystal on Silicon,硅基液晶)和DMD(DigitalMicro mirror Device,数字微镜器件)四种,其中OLEDoS和LEDoS都属于主动发光,而LCoS和DMD则属于被动发光;同时,OLEDoS和LEDoS还具有低功耗、高对比度以及快速响应的优点,因此它们更适合应用于AR和VR技术中。In recent years, with the development of AR (Augmented Reality, augmented reality)/VR ((Virtual Reality, virtual reality) technology, the closely related micro-display technology has also received extensive attention. Micro-display (Microdisplay) technology is a display A branch of the technical field generally refers to displays whose diagonal size is less than 1 inch (2.54cm) or those that are small enough to require optical amplification as microdisplays. Currently common microdisplay technologies include OLEDoS (Organic Light-Emitting Diode on Silicon , Silicon-based organic light emitting), LEDoS (Light Emitting Diode on Silicon, silicon-based diode light emitting), LCoS (Liquid Crystal on Silicon, liquid crystal on silicon) and DMD (Digital Micro mirror Device, digital micromirror device) four, of which OLEDoS and LEDoS Both belong to active light emission, while LCoS and DMD belong to passive light emission; at the same time, OLEDoS and LEDoS also have the advantages of low power consumption, high contrast and fast response, so they are more suitable for application in AR and VR technologies.
OLEDoS和LEDoS微显示器与常规的利用非晶硅、微晶硅或者低温多晶硅工艺不同,其是以单晶硅芯片为基板,也就是说其可以采用现有成熟的集成电路CMOS(ComplementaryMetal-Oxide-Semiconductor,互补金属氧化物半导体)工艺,因此其不但可以实现显示屏像素的有源寻址矩阵也可以实现扫描链电路、数字模拟转换电路、带隙基准等各种功能的驱动控制电路,从而大大减少了器件的外部连线,增加了可靠性,实现了轻量化。OLEDoS and LEDoS micro-displays are different from conventional processes using amorphous silicon, microcrystalline silicon or low-temperature polycrystalline silicon. Semiconductor (complementary metal oxide semiconductor) technology, so it can not only realize the active addressing matrix of display screen pixels, but also realize the drive control circuit of various functions such as scan chain circuit, digital-to-analog conversion circuit, and bandgap reference, thus greatly The external wiring of the device is reduced, the reliability is increased, and the weight is realized.
OLEDoS和LEDoS的像素单元电路是微显示器显示阵列中实现每个像素点电流大小控制的电路,每个像素电流控制的精确程度直接影响整个微显示器的显示一致性;而目前传统的电压型像素单元电路由于制造工艺的偏差,会导致像素与像素之间驱动管参数的不一致,进而导致各个像素单元之间的电流存在一定的差异。另外,不同结构的像素单元电路会影响整体驱动方案的设计,由此像素单元电路设计的合理性就显得至关重要。The pixel unit circuit of OLEDoS and LEDoS is a circuit that realizes the current control of each pixel in the display array of the microdisplay. The accuracy of each pixel current control directly affects the display consistency of the entire microdisplay; while the current traditional voltage-type pixel unit Due to the deviation of the manufacturing process of the circuit, the parameters of the driving tube between the pixels will be inconsistent, which will lead to a certain difference in the current between the pixel units. In addition, pixel unit circuits with different structures will affect the design of the overall driving scheme, so the rationality of pixel unit circuit design is very important.
现有的像素单元电容如图1所示,其属于电压型的像素单元电路,由最基本的2T1C(2个晶体管1个电容)构成。其基本的工作原理是:The existing pixel unit capacitor is shown in FIG. 1 , which belongs to the voltage type pixel unit circuit and is composed of the most basic 2T1C (two transistors and one capacitor). Its basic working principle is:
(1)数据写入阶段:当WR为高电平的时候,M2管导通,输入的电压信号VDATA写入到M1管的栅极和电容C1上;(1) Data writing stage: when WR is at a high level, the M2 tube is turned on, and the input voltage signal VDATA is written to the gate of the M1 tube and the capacitor C1;
(2)发光阶段:WR变为低电平,M2管关断,存储到C1上的数据电压驱动M1管产生对应的驱动电流,驱动电流流过OLED或者LED器件并发光,发光的亮度大小与写入数据电压相对应。(2) Light-emitting stage: WR becomes low level, M2 tube is turned off, the data voltage stored on C1 drives M1 tube to generate corresponding drive current, the drive current flows through the OLED or LED device and emits light, and the brightness of the light is the same as write data corresponding to the voltage.
现有技术方案存在的问题:Problems existing in the prior art solutions:
由于微显示器的分辨率一般在800×600或者以上(1280×1024甚至更高),因此像素单元电路的数量达到了几十万甚至百万级别。而现有的CMOS工艺由于在制造过程中的偏差,不同的像素单元电路中M1管的阈值电压(Vth)会存在一定的差异,进而像素阵列中各个驱动管(M1)在将输入电压转换为电流时也会存在一定的差异,并最终影响显示的一致性。Since the resolution of a microdisplay is generally 800×600 or above (1280×1024 or even higher), the number of pixel unit circuits reaches hundreds of thousands or even millions. However, due to the deviation in the manufacturing process of the existing CMOS process, there will be certain differences in the threshold voltage (Vth) of the M1 transistor in different pixel unit circuits, and then each driving transistor (M1) in the pixel array converts the input voltage to There will also be certain differences in the current, which will eventually affect the consistency of the display.
实用新型内容Utility model content
针对现有自发光显示器采用的电压型像素单元电路驱动管由于阈值偏差带来的显示一致性问题,提供一种新型带阈值补偿的电压型像素单元电路结构。Aiming at the problem of display consistency caused by the threshold deviation of the voltage-type pixel unit circuit driving tube used in the existing self-luminous display, a novel voltage-type pixel unit circuit structure with threshold compensation is provided.
本实用新型首先公开了一种带阈值补偿的电压型像素单元电路,它包括:第一晶体管M1、第二晶体管M2、第三晶体管M3、第四晶体管M4、第五晶体管M5、采样保持电容C1、数据信号线VDATA、采样控制信号线SMP、保持信号线HLD、电源线VDD、发光器件的共阴极电源线VCOM、发光器件,The utility model firstly discloses a voltage-type pixel unit circuit with threshold value compensation, which includes: a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, and a sampling and holding capacitor C1 , data signal line VDATA, sampling control signal line SMP, hold signal line HLD, power line VDD, common cathode power line VCOM of the light emitting device, light emitting device,
所述电源线VDD一方面连接采样保持电容C1的上极板,另一方面连接第四晶体管M4的源极;所述采样保持电容C1的下极板分别连接第一晶体管M1的栅极、第二晶体管M2的漏极;The power line VDD is connected to the upper plate of the sampling and holding capacitor C1 on the one hand, and connected to the source of the fourth transistor M4 on the other hand; the lower plate of the sampling and holding capacitor C1 is respectively connected to the gate of the first transistor M1, the second transistor M1 the drain of the second transistor M2;
所述采样控制信号线SMP分别连接第二晶体管M2的栅极、第三晶体管M3的栅极;The sampling control signal line SMP is respectively connected to the gate of the second transistor M2 and the gate of the third transistor M3;
所述保持信号线HLD连接第三晶体管M4的栅极、第五晶体管M5的栅极;The holding signal line HLD is connected to the gate of the third transistor M4 and the gate of the fifth transistor M5;
所述数据信号线VDATA连接第三晶体管M3的漏极;The data signal line VDATA is connected to the drain of the third transistor M3;
所述第一晶体管M1的漏极、第二晶体管M2的源极、第四晶体管M4的漏极彼此互联;The drain of the first transistor M1, the source of the second transistor M2, and the drain of the fourth transistor M4 are interconnected;
所述第一晶体管M1的源极、第三晶体管M3的源极、第五晶体管M5的源极彼此互联;The source of the first transistor M1, the source of the third transistor M3, and the source of the fifth transistor M5 are interconnected;
所述第五晶体管M5的漏极与发光器件的阳极相连;The drain of the fifth transistor M5 is connected to the anode of the light emitting device;
所述发光器件的阴极与电源线VCOM相连。The cathode of the light emitting device is connected to the power line VCOM.
优选的,所述发光器件为OLED或LED。Preferably, the light emitting device is OLED or LED.
优选的,第一晶体管M1为NMOS管,第二晶体管M2、第三晶体管M3、第四晶体管M4和第五晶体管M5均为PMOS管。Preferably, the first transistor M1 is an NMOS transistor, and the second transistor M2, the third transistor M3, the fourth transistor M4 and the fifth transistor M5 are all PMOS transistors.
本实用新型还公开了一种阈值电压补偿的驱动方法,基于所述的带阈值补偿的电压型像素单元电路,包括两个阶段:The utility model also discloses a threshold voltage compensation driving method, based on the voltage-type pixel unit circuit with threshold compensation, including two stages:
(1)数据采样和阈值补偿阶段:此阶段采样控制信号线SMP为低电平,保持信号线HLD为高电平,第一晶体管M1、第二晶体管M2和第三晶体管M3导通,第四晶体管和第五晶体管M5截止,发光器件处于不发光状态;此时第一晶体管M1的栅极和漏极通过第二晶体管M2短接在一起,从而第一晶体管M1构成一个二极管连接形式;与此同时,数据信号线VDATA通过第三晶体管M3与第一晶体管M1的源极连接在一起,在此阶段,由于第四晶体管M4截止,故第四晶体管M4的栅极即采样保持电容C1的下极板保持电压为VDATA+Vth,其中Vth为第一晶体管M1的阈值电压;(1) Data sampling and threshold compensation stage: In this stage, the sampling control signal line SMP is at low level, the signal line HLD is kept at high level, the first transistor M1, the second transistor M2 and the third transistor M3 are turned on, and the fourth The transistor and the fifth transistor M5 are turned off, and the light-emitting device is in a non-luminous state; at this time, the gate and drain of the first transistor M1 are short-circuited together through the second transistor M2, so that the first transistor M1 forms a diode connection form; with this At the same time, the data signal line VDATA is connected to the source of the first transistor M1 through the third transistor M3. At this stage, since the fourth transistor M4 is cut off, the gate of the fourth transistor M4 is the lower pole of the sample and hold capacitor C1. The board holding voltage is VDATA+Vth, wherein Vth is the threshold voltage of the first transistor M1;
(2)发光阶段:此阶段采样控制信号线SMP为高电平,HLD为低电平,第二晶体管M2和第三晶体管M3截止,第四晶体管M4和第五晶体管M5导通,保持在采样保持电容C1上的电压VDATA+Vth驱动第一晶体管M1生成驱动电流IM1并流过第五晶体管M5和发光器件,发光器件根据驱动电流IM1的大小发出对应强度的光;驱动电流IM1的大小具体为:(2) Light-emitting stage: In this stage, the sampling control signal line SMP is at high level, HLD is at low level, the second transistor M2 and the third transistor M3 are cut off, the fourth transistor M4 and the fifth transistor M5 are turned on, and the sampling control signal line is kept at the sampling level. The voltage VDATA+Vth on the storage capacitor C1 drives the first transistor M1 to generate a driving current I M1 and flows through the fifth transistor M5 and the light emitting device, and the light emitting device emits light of corresponding intensity according to the magnitude of the driving current I M1 ; the driving current I M1 The size is specifically:
(2-1)若第一晶体管M1工作在亚阈值区:(2-1) If the first transistor M1 works in the subthreshold region:
式中,I0表示第一晶体管M1工作在亚阈值时归一化的漏端电流,Vth表示第一晶体管M1的阈值电压,n为与工艺相关的经验值,VT为热电压,W和L分别表示第一晶体管M1沟道的宽度和长度,VDATA表示输入的数据电压,Vx表示第一晶体管M1源端电压;In the formula, I 0 represents the normalized drain current when the first transistor M1 works at the subthreshold, V th represents the threshold voltage of the first transistor M1, n is an empirical value related to the process, V T is the thermal voltage, W and L respectively represent the width and length of the channel of the first transistor M1, V DATA represents the input data voltage, and V x represents the source terminal voltage of the first transistor M1;
(2-2)若第一晶体管M1工作在线性区:(2-2) If the first transistor M1 works in the linear region:
式中μ表示第一晶体管M1的迁移率,Cox表示第一晶体管M1单位面积的栅氧电容,VDS,M1表示第一晶体管M1的源漏电压,Vth表示第一晶体管M1的阈值电压,VDATA表示输入的数据电压,Vx表示第一晶体管M1源端电压,W和L分别表示第一晶体管M1沟道的宽度和长度;In the formula, μ represents the mobility of the first transistor M1, C ox represents the gate-oxygen capacitance per unit area of the first transistor M1, V DS,M1 represents the source-drain voltage of the first transistor M1, and V th represents the threshold voltage of the first transistor M1 , V DATA represents the input data voltage, V x represents the source terminal voltage of the first transistor M1, W and L represent the width and length of the channel of the first transistor M1 respectively;
(2-3)若第一晶体管M1工作在饱和区:(2-3) If the first transistor M1 works in the saturation region:
式中μ表示第一晶体管M1的迁移率,Cox表示第一晶体管M1单位面积的栅氧电容,Vth表示第一晶体管M1的阈值电压,VDATA表示输入的数据电压,Vx表示第一晶体管M1源端电压,W和L分别表示第一晶体管M1沟道的宽度和长度。In the formula, μ represents the mobility of the first transistor M1, C ox represents the gate oxygen capacitance per unit area of the first transistor M1, V th represents the threshold voltage of the first transistor M1, V DATA represents the input data voltage, and V x represents the first The source terminal voltage of the transistor M1, W and L respectively represent the width and length of the channel of the first transistor M1.
本实用新型还公开了一种图像或者视频的显示方法,基于所述的阈值电压补偿的驱动方法,其两个工作阶段的交替运行完成一帧帧的显示数据更新,进而完成图像或者视频的显示。The utility model also discloses an image or video display method. Based on the threshold voltage compensation driving method, the alternate operation of the two working stages completes the update of the display data of one frame, and then completes the display of the image or video. .
本实用新型的有益效果Beneficial effects of the utility model
本专利提出的新型带阈值补偿的电压型像素单元驱动电路,能有效解决驱动管阈值变化对像素阵列驱动电流带来的波动,进而提高整个显示器的显示一致性。The novel voltage-type pixel unit drive circuit with threshold compensation proposed in this patent can effectively solve the fluctuation of the drive current of the pixel array caused by the change of the threshold of the drive tube, thereby improving the display consistency of the entire display.
附图说明Description of drawings
图1为传统电压型像素单元电路Figure 1 is a traditional voltage-type pixel unit circuit
图2为本实用新型的电压型像素单元电路Fig. 2 is the voltage type pixel unit circuit of the present utility model
图3为本实用新型的电压型像素单元电路的采样补偿阶段Fig. 3 is the sampling compensation stage of the voltage type pixel unit circuit of the present invention
图4为本实用新型的电压型像素单元电路的发光阶段Fig. 4 is the light-emitting stage of the voltage-type pixel unit circuit of the present invention
图5为本实用新型的电压型像素单元电路工作时序图Fig. 5 is the working timing diagram of the voltage-type pixel unit circuit of the present invention
具体实施方式Detailed ways
下面结合实施例对本实用新型作进一步说明,但本实用新型的保护范围不限于此:The utility model will be further described below in conjunction with embodiment, but protection scope of the utility model is not limited to this:
结合图2,带阈值补偿的电压型像素单元电路,它包括:第一晶体管M1、第二晶体管M2、第三晶体管M3、第四晶体管M4、第五晶体管M5、采样保持电容C1、数据信号线VDATA、采样控制信号线SMP、保持信号线HLD、电源线VDD、发光器件的共阴极电源线VCOM、发光器件,In conjunction with FIG. 2, a voltage-type pixel unit circuit with threshold compensation includes: a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sampling and holding capacitor C1, and a data signal line VDATA, sampling control signal line SMP, hold signal line HLD, power line VDD, common cathode power line VCOM of the light emitting device, light emitting device,
所述电源线VDD一方面连接采样保持电容C1的上极板,另一方面连接第四晶体管M4的源极;所述采样保持电容C1的下极板分别连接第一晶体管M1的栅极、第二晶体管M2的漏极;The power line VDD is connected to the upper plate of the sampling and holding capacitor C1 on the one hand, and connected to the source of the fourth transistor M4 on the other hand; the lower plate of the sampling and holding capacitor C1 is respectively connected to the gate of the first transistor M1, the second transistor M1 the drain of the second transistor M2;
所述采样控制信号线SMP分别连接第二晶体管M2的栅极、第三晶体管M3的栅极;The sampling control signal line SMP is respectively connected to the gate of the second transistor M2 and the gate of the third transistor M3;
所述保持信号线HLD连接第三晶体管M4的栅极、第五晶体管M5的栅极;The holding signal line HLD is connected to the gate of the third transistor M4 and the gate of the fifth transistor M5;
所述数据信号线VDATA连接第三晶体管M3的漏极;The data signal line VDATA is connected to the drain of the third transistor M3;
所述第一晶体管M1的漏极、第二晶体管M2的源极、第四晶体管M4的漏极彼此互联;The drain of the first transistor M1, the source of the second transistor M2, and the drain of the fourth transistor M4 are interconnected;
所述第一晶体管M1的源极、第三晶体管M3的源极、第五晶体管M5的源极彼此互联;The source of the first transistor M1, the source of the third transistor M3, and the source of the fifth transistor M5 are interconnected;
所述第五晶体管M5的漏极与发光器件的阳极相连;The drain of the fifth transistor M5 is connected to the anode of the light emitting device;
所述发光器件的阴极与电源线VCOM相连。The cathode of the light emitting device is connected to the power line VCOM.
其中:所述发光器件可以为OLED或LED。第一晶体管M1为NMOS管,第二晶体管M2、第三晶体管M3、第四晶体管M4和第五晶体管M5均为PMOS管。Wherein: the light emitting device may be OLED or LED. The first transistor M1 is an NMOS transistor, and the second transistor M2 , the third transistor M3 , the fourth transistor M4 and the fifth transistor M5 are all PMOS transistors.
一种阈值电压补偿的驱动方法,基于所述的带阈值补偿的电压型像素单元电路,包括两个阶段:A driving method for threshold voltage compensation, based on the voltage-type pixel unit circuit with threshold compensation, including two stages:
(1)数据采样和阈值补偿阶段:结合图3,此阶段采样控制信号线SMP为低电平,保持信号线HLD为高电平,第一晶体管M1、第二晶体管M2和第三晶体管M3导通,第四晶体管和第五晶体管M5截止,发光器件处于不发光状态;此时第一晶体管M1的栅极和漏极通过第二晶体管M2短接在一起,从而第一晶体管M1构成一个二极管连接形式;与此同时,数据信号线VDATA通过第三晶体管M3与第一晶体管M1的源极连接在一起,在此阶段,由于第四晶体管M4截止,故第四晶体管M4的栅极即采样保持电容C1的下极板保持电压为VDATA+Vth,其中Vth为第一晶体管M1的阈值电压;(1) Data sampling and threshold compensation stage: in combination with FIG. 3 , at this stage, the sampling control signal line SMP is at a low level, and the holding signal line HLD is at a high level, and the first transistor M1, the second transistor M2 and the third transistor M3 conduct turn on, the fourth transistor and the fifth transistor M5 are cut off, and the light-emitting device is in a non-luminous state; at this time, the gate and drain of the first transistor M1 are short-circuited together through the second transistor M2, so that the first transistor M1 forms a diode connection At the same time, the data signal line VDATA is connected to the source of the first transistor M1 through the third transistor M3. At this stage, since the fourth transistor M4 is cut off, the gate of the fourth transistor M4 is the sample and hold capacitor The lower plate of C1 maintains a voltage of VDATA+Vth, wherein Vth is the threshold voltage of the first transistor M1;
(2)发光阶段:结合图4,此阶段采样控制信号线SMP为高电平,HLD为低电平,第二晶体管M2和第三晶体管M3截止,第四晶体管M4和第五晶体管M5导通,保持在采样保持电容C1上的电压VDATA+Vth驱动第一晶体管M1生成驱动电流IM1并流过第五晶体管M5和发光器件,发光器件根据驱动电流IM1的大小发出对应强度的光;驱动电流IM1的大小具体为:(2) Light-emitting stage: in combination with FIG. 4 , at this stage, the sampling control signal line SMP is at high level, HLD is at low level, the second transistor M2 and the third transistor M3 are turned off, and the fourth transistor M4 and the fifth transistor M5 are turned on , the voltage VDATA+Vth kept on the sampling and holding capacitor C1 drives the first transistor M1 to generate a driving current I M1 and flows through the fifth transistor M5 and the light-emitting device, and the light-emitting device emits light of corresponding intensity according to the magnitude of the driving current I M1 ; The magnitude of the current I M1 is specifically:
(2-1)若第一晶体管M1工作在亚阈值区:(2-1) If the first transistor M1 works in the subthreshold region:
式中,I0表示第一晶体管M1工作在亚阈值时归一化的漏端电流,Vth表示第一晶体管M1的阈值电压,n为与工艺相关的经验值,VT为热电压,W和L分别表示第一晶体管M1沟道的宽度和长度,VDATA表示输入的数据电压,Vx表示第一晶体管M1源端电压;In the formula, I 0 represents the normalized drain current when the first transistor M1 works at the subthreshold, V th represents the threshold voltage of the first transistor M1, n is an empirical value related to the process, V T is the thermal voltage, W and L respectively represent the width and length of the channel of the first transistor M1, V DATA represents the input data voltage, and V x represents the source terminal voltage of the first transistor M1;
(2-2)若第一晶体管M1工作在线性区:(2-2) If the first transistor M1 works in the linear region:
式中μ表示第一晶体管M1的迁移率,Cox表示第一晶体管M1单位面积的栅氧电容,VDS,M1表示第一晶体管M1的源漏电压,Vth表示第一晶体管M1的阈值电压,VDATA表示输入的数据电压,Vx表示第一晶体管M1源端电压,W和L分别表示第一晶体管M1沟道的宽度和长度;In the formula, μ represents the mobility of the first transistor M1, C ox represents the gate-oxygen capacitance per unit area of the first transistor M1, V DS,M1 represents the source-drain voltage of the first transistor M1, and V th represents the threshold voltage of the first transistor M1 , V DATA represents the input data voltage, V x represents the source terminal voltage of the first transistor M1, W and L represent the width and length of the channel of the first transistor M1 respectively;
(2-3)若第一晶体管M1工作在饱和区:(2-3) If the first transistor M1 works in the saturation region:
式中μ表示第一晶体管M1的迁移率,Cox表示第一晶体管M1单位面积的栅氧电容,Vth表示第一晶体管M1的阈值电压,VDATA表示输入的数据电压,Vx表示第一晶体管M1源端电压,W和L分别表示第一晶体管M1沟道的宽度和长度。In the formula, μ represents the mobility of the first transistor M1, C ox represents the gate oxygen capacitance per unit area of the first transistor M1, V th represents the threshold voltage of the first transistor M1, V DATA represents the input data voltage, and V x represents the first The source terminal voltage of the transistor M1, W and L respectively represent the width and length of the channel of the first transistor M1.
可以看到由于在采样阶段补偿了一个Vth,因此最终的电流公式与Vth并没有关系。本专利提出的新型带阈值补偿的电压型像素单元驱动电路,能有效解决驱动管阈值变化对像素阵列驱动电流带来的波动,进而提高整个显示器的显示一致性。It can be seen that since a Vth is compensated in the sampling stage, the final current formula has nothing to do with Vth. The novel voltage-type pixel unit drive circuit with threshold compensation proposed in this patent can effectively solve the fluctuation of the drive current of the pixel array caused by the change of the threshold of the drive tube, thereby improving the display consistency of the entire display.
一种图像或者视频的显示方法,基于所述的阈值电压补偿的驱动方法,结合图5,其两个工作阶段的交替运行完成一帧帧的显示数据更新,进而完成图像或者视频的显示。An image or video display method, based on the threshold voltage compensation driving method, with reference to Figure 5, the alternate operation of the two working stages completes a frame of display data update, and then completes the image or video display.
本文中所描述的具体实施例仅仅是对本实用新型精神做举例说明。本实用新型所属技术领域的技术人员可以对所描述的具体实施例做各种各样的修改或补充或采用类似的方式替代,但并不会偏离本实用新型的精神或者超越所附权利要求书所定义的范围。The specific embodiments described herein are only examples to illustrate the spirit of the present invention. Those skilled in the technical field to which the utility model belongs can make various modifications or supplements to the described specific embodiments or adopt similar methods to replace them, but they will not deviate from the spirit of the utility model or go beyond the appended claims defined range.
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