CN207007346U - Long-wave light-guide infrared detector Nonuniformity Correction circuit - Google Patents

Abstract

This patent discloses a kind of long-wave light-guide infrared detector Nonuniformity Correction circuit, for in infrared detector reading circuit, the correcting circuit includes electric resistance structure component, counter, comparator and biasing module, heterogeneity of the energy adaptively correcting resistance value in 200 below Ω guide type infrared detector.The method that circuit passes through ADC and DAC, it is that each detection member matches input voltage of the equal reference voltage as difference amplifier reference edge before signal-obtaining, reference voltage is provided by the partial pressure of the electric resistance structure component of counter controls, rolling counters forward is controlled by comparator output signal, the partial pressure size of comparator comparison resistance construction package and detector.Circuit can realize that two input terminal voltages of the difference amplifier when detector does not receive radiation are almost equal.The advantages of this patent, is：Heterogeneity can effectively be corrected to be reduced in 0.5%, be designed without traditional blind element detector corresponding with response element, and the scope for adapting to correction is big.

Description

Non-uniformity Correction Circuit for Long-wave Photoconductive Infrared Detector

technical field

This patent relates to the field of infrared detector readout circuits, in particular to non-uniformity correction circuits for linear and area array long-wave photoconductive infrared detectors.

Background technique

Infrared detectors play an irreplaceable role in aerospace detection. Long-wave infrared detectors (wavelength above 10 microns) have extremely important uses in the fields of low-temperature target detection, over-the-horizon detection, and anti-jamming target recognition. Therefore, they have always been An important direction for the development of infrared detector technology. For HgCdTe long-wave infrared photoconductive detectors, how to solve the non-uniformity of readout signals between different detector elements is a key problem in circuit design and a research focus.

In the manufacturing process of HgCdTe long-wavelength photoconductive detectors, due to process deviation and material component defects, photoconductive infrared detectors have certain non-uniformity. The non-uniformity brought by this process not only seriously affects the dynamic range of the readout circuit, but also causes the output to show non-uniformity, especially the detector chips that use the column-level readout channel will have obvious column stripes, which is The spatial noise generated by this non-uniformity is usually much larger than the temporal noise. The photoconductive infrared detector has low resistance and large non-uniformity. The main factors that affect the non-uniformity of the photoconductive detector are resistance, temperature coefficient of resistance, thermal conductivity, infrared absorptivity, heat capacity, etc. Among them, the non-uniformity of resistance has a great influence on the output have the greatest impact. At present, the infrared detectors with a wavelength of more than 10 microns are still dominated by HgCdTe photoconductive detectors, and the resistance is about 40Ω. Based on the current technology, the resistance generally has a non-uniformity of about 10%. Although the general non-uniformity can be corrected by an external circuit, it will reduce the dynamic range of the detector, and the pertinence is not strong, the effect is general, and it has certain limitations. At present, there are almost no on-chip correction circuits for the non-uniformity of long-wavelength photoconductive detectors at home and abroad.

Contents of the invention

The purpose of this patent is to provide a long-wave photoconductive infrared detector non-uniformity on-chip correction circuit to solve the problem that the circuit output swing exceeds the dynamic range caused by the uneven resistance of the long-wave photoconductive infrared detector, thereby improving the long-wave photoconductive infrared detector. The performance level of the system.

A digital-analog hybrid adaptive correction on-chip circuit designed in this patent is suitable for correcting the non-uniformity of photoconductive detectors with a resistance value less than 200Ω. The unit structure of its circuit is shown in Figure 1, including a comparator, a counter, a resistance structure component and two bias modules. In the two bias modules, the No. 1 bias module is composed of a voltage source V ₁ connected in series with a resistor R _a , and the No. 2 bias module is composed of a voltage source V ₂ connected in series with a resistor R _b , and the values of R _a and R _b are In 0.5 ~ 5KΩ, V ₁ and V ₂ are between 1V ~ 5V, the circuit can adjust V ₂ according to different detector resistance and chip process error of the resistance structure component, so as to adjust the voltage division range of the resistance structure component and expand the circuit scope of application. The circuit uses the method of ADC and DAC to match the equal reference voltage for each detection element before the signal is read as the input voltage of the reference terminal of the differential amplifier. The reference voltage is provided by the voltage division of the resistive structure components controlled by the counter. The output signal of the comparator is controlled, and one end of the comparator is connected to the voltage division of the resistance structure component, and the other end is connected to the voltage division of the detector.

The resistor structure component is composed of a 20-100Ω resistor R ₀ connected in parallel with n weight resistors R ₁ ... R _n , n≥5, each weight resistor is connected in series with a MOS switch, R _{n is} 0.2-1KΩ, R _{n- 1} = 2R _n . The resistance value of resistor R ₀ is best set to the maximum resistance value of the detector. If the number of weighted resistors is less than five, the range is too small or the accuracy is too low, and the correction effect cannot be achieved. The more weighted resistors, the larger the resistance value. The higher the calibration accuracy is. Compared with the series type and R-2R type structure of traditional DAC, this parallel connection method saves the number of resistors, has small error, higher precision and wider application range. The number and resistance value of weight resistors determine the effect of circuit non-uniformity correction.

The counter is an n-bit binary counter, where n is equal to the number of weighted resistors. The counter is provided with an input terminal T, a reset terminal R, and n-bit output terminals Q ₀ ... Q _n-1 . The input terminal T controls whether the counter counts under the clock. The binary counter can be an addition or subtraction counter, and the reset terminal R controls the reset of the counter. It is best to use a synchronous counter composed of T flip-flops and a one-way counting method.

The comparator is a conventional comparator, the closer it is to the ideal comparator, the better. A CMOS comparator can be used, and the output terminal is connected to the input terminal T of the counter. When an adding counter is used, the non-inverting terminal is connected to the resistive structural component for voltage division, and the inverting terminal is connected to the detection The voltage divider, the output signal is 1 at the beginning, and becomes 0 after the correction is completed, and the connection rule is reversed for the subtraction counter.

The connection relationship of the circuit is: the No. 1 bias module is connected in series with the detector and then grounded, the No. 2 bias module is connected in series with the resistance structure component and then grounded, and the output terminal Q ₀ of the counter is connected to the ground. Q _n-1 is respectively connected to the gate of the MOS switch corresponding to the resistance structure components R ₁ ... R _n , the output terminal of the comparator is connected to the input terminal T of the counter, one input terminal of the comparator is connected to the detector voltage divider, and the other input terminal Connect the resistive structural components to divide the voltage.

The working principle of the circuit is as follows: the specific process of the correction circuit is divided into two steps, taking the counter as an example of an addition counter, the first step, the comparator and the counter are powered on, the reset potential and counting pulse are input, the comparator circuit compares the detector The terminal voltage V _Rd and the terminal voltage V _Rref of the resistance structure component, if V _Rref >V _Rd , then T=1, the counter counts, the counter controls the resistance R _ref of the resistance structure component, and the decrease of R _ref leads to the decrease of V _Rref Small, keep circulating until V _Rref ≦ V _Rd , T = 0, the counter remains unchanged, and the self-adaptive correction process is completed within 2 ⁿ clock cycles. In the second step, after the correction is completed, the comparator power supply and clock pulse are disconnected to reduce power consumption, and then read out serially through the differential amplifier to obtain a uniform signal.

The advantages of this patent are as follows:

1. Resistive structural components, counters, comparators and bias modules constitute an automatic correction system, which can effectively reduce the non-uniformity of the detector to within 0.5%;

2. There is no need for the traditional blind element detector design that corresponds to the response element one by one, which reduces the complexity of the detector process;

3. The calibration accuracy of the circuit is high and the application range is wide, and it can work normally at room temperature and low temperature;

4. The power supply of the correction circuit can be set to be powered off, and the power consumption is low;

5. The repeatability of manufacturing by sub-micron CMOS process is good.

Description of drawings

Fig. 1 Structural diagram of the non-uniformity correction circuit unit of the long-wave photoconductive infrared detector.

Figure 2 is a structural diagram of the resistor structure assembly.

Figure 3 7-bit synchronous binary addition counter circuit structure diagram.

Figure 4 Comparator circuit schematic.

Figure 5 Correction circuit timing diagram.

Fig. 6 Variation process of divided voltage V _Rref of resistive structure components.

detailed description

Below in conjunction with accompanying drawing, the specific embodiment of this patent is described in further detail:

Embodiment 1

The unit structure of the correction circuit is shown in Figure 1, including a comparator, a counter, a resistance structure component and two bias modules. _V2 can be adjusted according to different detector resistances and process errors of the resistance structure components, so as to adjust the voltage division range of the resistance structure components. The voltage source of the bias module should not be too large or too small. If it is too large, the detector will heat up, and if it is too small, the signal of the detector will be small. The resistance of the detector is about 40Ω. When the process error of the resistance structure components is not considered, V ₁ =2.5V, V ₂ =2.5V, R _a =R _b =1KΩ can be set. The specific process of the circuit work is divided into two steps, taking the counter as an example of an addition counter, the first step, the comparator and the counter are powered on, the reset potential and the counting pulse are input, the comparator circuit compares the voltage of the detector end and the resistance structure component end If V _Rref >V _Rd , then T=1, the counter counts, the counter controls the size of the resistance of the resistance structure component, R _ref decreases, resulting in a decrease of V _Rref , and the cycle continues until V _Rref ≦V _Rd , T= 0, the counter remains unchanged, and the correction process is completed within 2 ⁿ clock cycles. In the second step, after the calibration is completed, the power supply of the comparator is turned off to reduce power consumption, and the counter is not powered on, so that the divided voltage of the resistive structure components remains unchanged, and the readout signals are basically equal before receiving infrared radiation, and then serially Read out to get a uniform signal.

The resistance structure components are shown in Figure 2. When the maximum resistance of the detector is 50Ω, the resistance R ₀ can be set to 50Ω. The W/L ratio of the NMOS tube switch is as large as possible to reduce the switch resistance, which can be set to 200/1.

The resistance reference dimensions of the resistance structure components are shown in the table below (in ohms).

resistance R ₀ R ₁ R ₂ R ₃ R ₄ R ₅ R ₆ R ₇ Resistance 50 16K 8K 4K 2K 1K 0.5K 0.25K

Under this condition, when all the resistors of R ₁ ~ R ₇ are not selected, the maximum resistance value of the resistance structure component is 50Ω, and when they are all selected, the minimum value is 35.79Ω, and the change step is 0.15Ω It is suitable for detectors with resistance non _- uniformity in the range of 35.79~50Ω, but the size of V2 can also be adjusted to make the voltage division of the resistance structure components fluctuate up and down. Generally speaking, the non-uniformity of the detector resistance is within 15Ω. If the non-uniformity is too large, the size and number of the weight resistors R1~R7 should be changed.

The circuit structure of the 7-bit synchronous binary addition counter that can be used is shown in Figure 3. It is composed of a 7-bit rising edge T flip-flop. A potential reset is added at the beginning of counting, and then the clock pulse is counted. The period of the pulse should be greater than that of the comparator The transmission delay time, otherwise the counter counts too much, resulting in V _Rref <V _Rd . The counter is composed of 7 rising edge T flip-flops, 12 AND gates and a NAND gate. When the input terminal T=1, the counter counts one bit on a rising edge in a pulse period. When T=0, the counter keeps constant. The counter adopts one-way counting. When the output is all 1, it will automatically stop counting. In order to prevent the counter from circulating, after the seventh counter, it is fed back to T through a NAND gate and an AND gate, so that when the detector divides the voltage When it is less than the minimum value of the voltage division of the resistance structure component, the minimum value of the voltage division of the resistance structure component can be taken.

Figure 4 is a schematic diagram of the amplifying circuit of the comparator that can be used. The CMOS comparator uses a two-stage differential amplifier circuit. The open-loop gain exceeds 90dB at room temperature. The first stage is a pre-amplification circuit, and the second stage is a folded common source. The common gate circuit uses a P tube as the input tube, P is the non-inverting input terminal, N is the inverting input terminal, and the output terminal OUT is connected to the input terminal T of the counter. The detector divides the pressure, the output signal is 1 at the beginning, and becomes 0 after the calibration is completed. The subtraction counter is connected in the opposite way. The reference size of each tube is shown in the table below (unit is micron).

tube M1 M2, M3 M4, M5 M6, M7 M8, M9, M10, M11 W/L 8/2 8/2 10/2 10/2 3/8 tube M12 M13, M14 M15, M16 M17, M18 M19, M20 W/L 4/5 20/2 3/4 6/3 15/2

Embodiment 2

Assume that the resistance Rd of a certain detection element is 40Ω, set V ₁ =V ₂ =2.5V, R _a =R _b =1KΩ, use a 7-bit synchronous binary addition counter, and at a low temperature of 66K, in the Cadence software environment, use Specter emulator simulation, the corresponding correction simulation timing diagram is shown in Figure 5, and the change process of the voltage division V _Rref of the resistance structure component is shown in Figure 6, the value of the binary counter after correction is _1010001 , and the voltage division V Rref of the resistance structure component is 95.89mV, which is 0.26mV different from the detector pixel partial pressure 96.15mV. Within the error range, when the detector resistance changes below 200Ω, the difference between the resistance structure components and the detector resistance value of the calibration result is within 0.5% relative to the detector. That is, the non-uniformity after correction is controlled within 0.5%, and increasing the number of weight resistance digits can make the non-uniformity after correction even smaller.

The patent has been described above through specific embodiments, but the patent is not limited to this specific embodiment. Those skilled in the art should understand that various modifications, equivalent replacements, changes, etc. can also be made to this patent. As long as these changes do not deviate from the spirit of this patent, they should all be within the scope of protection of this patent.

Claims (1)

1. A long-wave photoconductive infrared detector non-uniformity correction circuit, comprising a resistance structure assembly, a counter, a comparator and two bias modules, characterized in that: In the two bias modules, the No. 1 bias module is composed of a voltage source V ₁ connected in series with a resistor R _a , and the No. 2 bias module is composed of a voltage source V ₂ connected in series with a resistor R _b , and the values of R _a and R _b are In 0.5～5KΩ, V ₁ and V ₂ are between 1V and 5V; The resistance structure component is composed of a 20-100Ω resistor R ₀ connected in parallel with n weight resistors R ₁ ... R _n , n≥5, each weight resistor is connected in series with a MOS switch, R _{n is} 0.2-1KΩ, Rn _-1 = _2Rn ; The counter is an n-bit binary counter, which is provided with an input terminal T, a reset terminal R, and n-bit output terminals Q ₀ ... Q _n-1 , and the input terminal T controls whether the counter counts under the clock; The No. 1 bias module is connected in series with the detector and then grounded, the No. 2 bias module is connected in series with the resistance structure component and then grounded, and the output terminals Q ₀ ... Q _n-1 of the counter are respectively connected to The gate of the MOS switch corresponding to the resistance structure components R1... _Rn , the output terminal _of the comparator is connected to the input terminal T of the counter, one input terminal of the comparator is connected to the detector for voltage division, and the other input terminal is connected to the resistance structure component for voltage division .