CN206348814U - A kind of fingerprint recognition circuit and device - Google Patents

Abstract

The utility model is applicable to the field of integrated circuits, and provides a fingerprint recognition circuit and device. The circuit includes a fingerprint detection module and a cascaded multi-stage modulation signal generator, and the output end of the last stage modulation signal generator is connected to the fingerprint detection module. The modulated signal receiving end is connected, the multi-level modulated signal generator generates the modulated signal according to the control signal generated by the fingerprint detection module and/or the external circuit and amplifies the amplitude step by step, and provides the modulated signal to the fingerprint detection module, and the modulated signal of the fingerprint detection module receives Terminal is the power terminal or ground terminal of the fingerprint detection module. The utility model adopts a cascading method for modulation, and the generated modulation signal will increase a certain amplitude every time it passes through a modulation signal generator, and finally the modulation signal received by the fingerprint detection module is greatly enhanced, thereby satisfying the sensitivity of fingerprint recognition Requirements, avoiding the problem of increasing the sensitivity of fingerprint recognition through high voltage, which leads to high cost and the addition of driver chips.

Description

A fingerprint identification circuit and device

technical field

The utility model belongs to the field of integrated circuits, in particular to a fingerprint identification circuit and a device.

Background technique

Since the introduction of fingerprint recognition technology in Apple mobile phones, the unlocking settings of mobile phones have evolved from the initial digital password and graphic unlocking to fingerprint recognition. At present, capacitive fingerprint detection devices, as a biometric device, have been widely used in various electronic devices to help people authenticate and make the use of our mobile phones more and more secure.

However, the application environment of the fingerprint identification module is complex, and it is necessary to add protective materials on the surface of the fingerprint identification chip. At present, more mature solutions include sapphire, coating, ceramic cover and glass cover. Due to the popularity of front fingerprint recognition, more and more glass cover solutions are introduced, but the thicker the glass cover, the smaller the capacitance between the finger and the fingerprint detection electrode, and the weaker the sensitivity of fingerprint recognition. This has become a major bottleneck limiting the glass cover solution.

At present, capacitive fingerprint recognition technology is divided into at least two categories, one is called active, and the other is called passive. Active fingerprint recognition requires an external modulation signal, so that each detection electrode produces different charge changes according to the pattern of the user's fingerprint, and the charge difference is amplified by the charge amplifier, and processed into a fingerprint pattern by ADC and other modules for identifying fingerprint features, such as , Fig. 1 shows the structure of a current common active fingerprint identification-active capacitive floating modulation fingerprint detection system, including external circuit and fingerprint detection system, further comprising: fingerprint detection module 101, power management in the fingerprint detection system module 102, modulation signal generator 103, level shifter 104 and fingerprint processing module 105, wherein the fingerprint detection module 101 includes functional modules such as an array of detection electrodes, a charge amplifier, and an ADC.

In the above structure, the power supply SVDD and ground SGND of the fingerprint detection module 101 are different from the power supply and ground DGND of the entire fingerprint detection system. charge changes on the . The fingerprint detection module 101 is powered by a dedicated power management module 102. During the modulation to the ground SGND, the relative voltage between the power supply SVDD and the ground SGND remains almost constant. The system ground DGND of the modulation signal generator 103 is the reference ground of the entire fingerprint detection system, and the potential remains unchanged during the working process of the fingerprint detection system. The detection result of the fingerprint detection module 101 communicates with the fingerprint processing module 105 through the level converter 104, and is given to the fingerprint processing module 105 for further processing of the fingerprint information, such as extracting fingerprint features and encryption, identifying target users, etc., after processing Then output the fingerprint information to the external circuit, and the external circuit controls, processes and stores the fingerprint feature information of the entire fingerprint detection system.

The detection principle of the fingerprint detection module 101 is combined with Fig. 2, wherein, when the ground SGND receives the modulation signal, it will change relative to the system ground DGND, and the waveform can be various waveforms such as square wave and sine wave. The capacitance between the finger and the finger is Cfinger, and the feedback capacitance of the charge amplifier is Cref, then after passing through the charge amplifier, the output voltage Vout=(Cfinger/Cref)*Vin. Of course, a floating power supply modulation fingerprint detection structure can also be used, and its output voltage is also Vout=(Cfinger/Cref)*Vin.

Obviously, no matter which modulation method is used, the output voltage Vout of the detection unit=(Cfinger/Cref)*Vin. As the thickness of the current cover increases, the Cfinger will become smaller and smaller. In order to increase Vout and maintain a sufficient signal-to-noise ratio, the most direct method is to increase the modulation signal amplitude Vin. In many current solutions, in order to increase Vin from the common standard CMOS process voltage of 1.8V or 3.3V to 5V, 10V or even 20V, a high-voltage process is used. Generally speaking, a high-voltage driver chip will be added outside the sensor chip. On the one hand, this increases the number of module chips, which is not conducive to integration. On the other hand, the high-voltage process also increases the cost of the module.

Utility model content

The purpose of the embodiments of the present invention is to provide a fingerprint identification circuit, aiming to solve the problem that the existing fingerprint identification device increases the modulation signal amplitude through the high-voltage drive chip to maintain the detection sensitivity, which leads to high cost and is not conducive to integration.

The embodiment of the utility model is achieved in this way, a fingerprint identification circuit, including a fingerprint detection module, said circuit also includes:

A cascaded multi-stage modulation signal generator, the output end of the last stage modulation signal generator is connected to the modulation signal receiving end of the fingerprint detection module, and the multi-stage modulation signal generator is based on the control signal generated by the fingerprint detection module and /or the control signal generated by the external circuit generates a modulation signal and amplifies the amplitude of the modulation signal step by step, and provides the modulation signal to the fingerprint detection module, and the modulation signal receiving end of the fingerprint detection module is the power supply terminal or ground terminal of the fingerprint detection module .

Further, the modulation signal is a square wave, a sine wave or a sawtooth wave.

Further, the circuit also includes:

A single-level or cascaded multi-level level converter for transmitting signals between different power domains, the communication end of the first level level converter is connected to the output end of the fingerprint detection module;

Further, the circuit also includes:

A fingerprint processing module for further processing the detected fingerprint information, the processing end of the fingerprint processing module is connected to the processing end of the last level converter, and the external connection end of the fingerprint processing module is connected to an external circuit.

Further, the circuit also includes:

The drive ring is connected to the external drive port of the fingerprint detection module. When the modulation signal receiving end of the fingerprint detection module is the power supply end of the fingerprint detection module, the drive ring changes the relative system The potential of ground VSS to enhance the excitation signal; or

Drive ring for improved ESD performance. Connect to system ground.

Furthermore, each modulation signal generator includes: a first control terminal, a second control terminal, an input terminal and an output terminal;

The output end of the first-stage modulation signal generator is connected to the input end of the second-stage modulation signal generator, the output end of the second-stage modulation signal generator is connected to the input end of the next-stage modulation signal generator, and the last stage modulation The output end of the signal generator is connected with the modulated signal receiving end of the fingerprint detection module;

The first control terminal receives the modulation source signal, the second control terminal receives the enable signal, and the first control terminals of the modulation signal generators at all levels are connected at the same time to receive a common modulation source signal. The second control terminal respectively receives corresponding enabling signals;

Both the modulation source signal and the enabling signal are control signals provided by the fingerprint detection module or the external circuit.

Furthermore, each level of modulation signal generator is powered by a corresponding system power supply, or multi-level modulation signal generators are powered by one system power supply.

Furthermore, the circuit is packaged in a chip, and the chip is manufactured based on CMOS technology, and the power domain of the multi-level modulation signal generator is isolated by setting a deep well in the chip.

Furthermore, the fingerprint detection module is packaged in one chip, and the cascaded multi-level modulation signal generator is packaged in another chip.

Another object of the embodiments of the present utility model is to provide a fingerprint identification device comprising the above-mentioned fingerprint identification circuit.

The embodiment of the utility model adopts a cascading method for modulation, and the generated modulation signal will increase by a certain amplitude every time it passes through a modulation signal generator, and finally the modulation signal received by the fingerprint detection module is greatly enhanced, thereby satisfying the requirement of fingerprint identification. Sensitivity requirements, avoiding the problem of increasing the sensitivity of fingerprint recognition through high voltage, which leads to high cost and the addition of driver chips.

Description of drawings

1 is a structural diagram of an existing active capacitive floating modulation fingerprint detection system;

Fig. 2 is the detection schematic diagram of the fingerprint detection module in the existing active capacitive floating modulation fingerprint detection system;

Fig. 3 is the structural diagram of the fingerprint recognition circuit that the utility model embodiment provides;

Fig. 4 is the preferred structural diagram of the fingerprint identification circuit provided by the embodiment of the present invention;

Fig. 5 is a cascaded structure diagram of the modulating signal generator in the floating fingerprint recognition circuit provided by the embodiment of the utility model;

Fig. 6 is another cascade structure diagram of the modulating signal generator in the floating fingerprint identification circuit provided by the embodiment of the utility model;

Fig. 7 is a cascade structure diagram of the modulating signal generator in the floating power type fingerprint identification circuit provided by the embodiment of the utility model;

Fig. 8 is another cascade structure diagram of the modulating signal generator in the floating power type fingerprint identification circuit provided by the embodiment of the present invention;

FIG. 9 is a cross-sectional structure diagram of an isolation device in a single-chip floating power fingerprint identification circuit implemented based on a CMOS process provided by an embodiment of the present invention.

detailed description

In order to make the purpose, technical solution and advantages of the utility model clearer, the utility model will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the utility model, and are not intended to limit the utility model. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not constitute conflicts with each other.

In the embodiment of the utility model, two power supply domains are set in a single fingerprint identification chip, which integrates the functions of fingerprint sensing, voltage modulation and interface conversion, thereby improving the packaging yield and reducing the size of the substrate.

Fig. 3 shows the structure of the fingerprint identification circuit provided by the embodiment of the present invention, and for the convenience of description, only the parts related to the present invention are shown.

As an embodiment of the present invention, the fingerprint identification circuit includes a fingerprint detection module 10 and a cascaded multi-level modulation signal generator 11;

The output terminal of the last stage modulation signal generator 11 is connected with the modulation signal receiving end of the fingerprint detection module 10, and the multilevel modulation signal generator 11 generates according to the control signal generated by the fingerprint detection module 10 and/or the control signal generated by the external circuit 20 Modulate the signal and amplify the amplitude of the modulated signal step by step, and provide the modulated signal to the fingerprint detection module 10. The receiving terminal of the modulated signal of the fingerprint detection module 10 is the power supply terminal SVDD or the ground terminal SGND of the fingerprint detection module 10.

In the embodiment of the present utility model, among the cascaded multi-stage modulation signal generators 11, each modulation signal generator 11 can be controlled to modulate by the control signal generated by the fingerprint detection module 10; Each generator 11 controls the modulation through the control signal generated by the external circuit 20; each modulation signal generator 11 can also control the modulation through the control signal generated by the fingerprint detection module 10 and the external circuit 20 at the same time.

In addition, the modulating signal may be a square wave, a sine wave, or a sawtooth wave, which is not limited here.

The embodiment of the utility model adopts cascading mode for modulation, and the generated modulation signal will increase by a certain amplitude every time it passes through a modulation signal generator 11, and finally the modulation signal received by the fingerprint detection module 10 is greatly enhanced, thereby satisfying The sensitivity requirement of fingerprint identification avoids the problem of increasing the sensitivity of fingerprint identification through high voltage, which leads to high cost and the problem of adding a driver chip.

As a preferred embodiment of the present utility model, in conjunction with Fig. 4, the fingerprint identification circuit may also include:

A single-stage or cascaded multi-stage level shifter 12, the input end of the first-stage level shifter 12 is connected to the output end of the fingerprint detection module 10, and is used to transmit signals between different power domains;

In the above-mentioned utility model embodiments, the cascaded connection relationship between the modulation signal generator 11 and the level shifter 12 means that the output terminal of the first stage is connected with the input terminal of the second stage, and the output terminal of the second stage is connected with the input terminal of the second stage. The input ends of the third stages are connected, ...the output ends of the N-1th stage are connected with the input ends of the Nth stage.

It is worth noting that the input and output ends of the first-level level converter 12 can be realized by I/O interfaces, and bidirectional data transmission can be carried out. For example, the first-level level converter 12 can send data to the fingerprint detection module 10. Sending out the control signal, the fingerprint detection module 10 can also send the detected fingerprint information to the first-stage level shifter 12 .

As a preferred embodiment of the present invention, the fingerprint recognition circuit may also include:

Fingerprint processing module 13, the processing end of fingerprint processing module 13 is connected with the output end of last level converter 12, the external connection end of fingerprint processing module 13 is connected with external circuit 20, is used for further processing to the fingerprint information that detects processing.

As a preferred embodiment of the present invention, the fingerprint recognition circuit may also include:

The drive ring 14 is connected to the external drive port of the fingerprint detection module 10, and is used to change the power supply end of the fingerprint detection module 10 relative to the system ground VSS when the modulated signal receiving end of the fingerprint detection module 10 is the power supply end of the fingerprint detection module 10. potential to enhance the excitation signal; or

The drive ring 14 is connected to the system ground for improving ESD performance.

Fig. 5 shows a cascaded structure of modulation signal generators in the floating fingerprint identification circuit provided by the embodiment of the present invention. For the convenience of description, only the parts related to the present invention are shown.

As an embodiment of the present invention, each modulation signal generator 11 includes an input terminal, an output terminal, a first control terminal, and a second control terminal;

The first control terminal receives the modulation source (Vsignal) signal, and the second control terminal receives the enable (Vctrl) signal. Both the Vsignal signal and the Vctrl signal can be the control signal provided by the fingerprint detection module 10 or the control signal provided by the external circuit 20 .

The output end of the first stage modulation signal generator is connected with the input end of the second stage modulation signal generator, the output end of the second stage modulation signal generator is connected with the input end of the next stage modulation signal generator, and the last stage ( The output terminal of the Nth stage) modulated signal generator is connected with the modulated signal receiving terminal of the fingerprint detection module 10 .

In the embodiment of the present utility model, the first control terminals of the modulation signal generators 11 at all levels are connected at the same time to receive a common Vsignal signal, and the second control terminals of each modulation signal generator 11 receive corresponding Vctrl signals respectively (the first The level modulation signal generator corresponds to receiving Vctrl1, and the Nth level modulation signal generator corresponds to receiving Vctrln).

The first stage modulation signal generator 11 includes:

Buffer B1, AND gate AND1, NAND gate NAND1, first switch SW1A, second switch SW1B, third switch SW1C and capacitor C1A;

The input terminal of the buffer B1 is the first control terminal of the modulation signal generator 11, and the output terminal of the buffer B1 is connected with an input terminal of the AND gate AND1 and the NAND gate NAND1 at the same time, and the other of the AND gate AND1 and the NAND gate NAND1 One input terminal is the second control terminal of the modulation signal generator 11 at the same time, the output terminals of the AND gate AND1 and the NAND gate NAND1 are respectively connected with the control terminals of the second switch SW1B and the third switch SW1C, and the output terminals of the AND gate AND1 are also It is connected to the control end of the first switch SW1A, one end of the first switch SW1A and the third switch SW1C are connected to the system power supply DVDD1 at the same time, one end of the second switch SW1B is the input end of the modulation signal generator 11 and connected to the system ground DVSS, the third switch The other end of SW1C is connected to the other end of the second switch SW1B, the other end of the first switch SW1A is connected to one end of the capacitor C1A, and the other end of the capacitor C1A is the output end of the modulation signal generator 11 and the other end of the second switch SW1B connect.

Taking the Nth modulation signal generator as an example, the second to Nth modulation signal generators 11 include:

Buffer Bn, AND gate ANDn, NAND gate NANDn, first switch SWNA, second switch SWNB, third switch SWNC, capacitor CNA, fourth switch SWND, capacitor CNB;

The input end of buffer Bn is the first control end of modulating signal generator 11, and the output end of buffer Bn is connected with an input end of AND gate ANDn, NAND gate NANDn simultaneously, the other of AND gate ANDn, NAND gate NANDn An input end is the second control end of modulation signal generator 11 simultaneously, and the output end of AND gate ANDn, the output end of NAND gate NANDn is connected with the control end of second switch SWNB, the 3rd switch SWNC respectively, and the output end of AND gate ANDn also It is connected with the control end of the first switch SWNA, the input end of the buffer Bn is also connected with the control end of the fourth switch SWND, one end of the fourth switch SWND is connected with the system power supply DVDDN, and the other end of the fourth switch SWND is simultaneously connected with the first switch SWND. One end of SWNA and the third switch SWNC is connected, the other end of the fourth switch SWND is also connected with one end of the capacitor CNB, the other end of the capacitor CNB is the input end of the modulation signal generator 11 and connected with one end of the second switch SWNB, the second The other end of the switch SWNB is connected to the other end of the third switch SWNC, the other end of the first switch SWNA is connected to the power output end of the modulation signal generator 11 and one end of the capacitor CNA, and the other end of the capacitor CNA is the modulation signal generator 11 The output end of is connected to the other end of the second switch SWNB.

In the embodiment of the utility model, n and N in the above-mentioned devices correspond to the number of modulation signal generators, and the number of modulation signal generators can be brought into n or N to obtain the corresponding number of devices and their connection relationship.

Specifically, each of the switches SWnA-SWnD may be composed of semiconductor devices such as diodes, triodes, or MOS transistors.

In the embodiment of the present invention, the input terminals of the modulation signal generator 11 of the latter stage are all connected to the output terminals of the modulation signal generator 11 of the previous stage, and the input terminals of the modulation signal generator 11 of the first stage are connected to the system ground DVSS, The output end of the last stage modulation signal generator 11 is connected to the modulation signal receiving end of the fingerprint detection module 10, each stage modulation signal generator 11 is respectively connected to the corresponding system (direct current) power supply DVDD1～DVDDN, and the last stage modulation signal generation The device 11 outputs power to the fingerprint detection module 10 when the switch is turned on, and charges the capacitor CAN at the same time, and the capacitor CAN serves as a short-term power supply for the fingerprint detection module 10 when the switch is turned off. In the utility model embodiment, the work of modulation signal generator 11 is divided into two phases:

In the first phase, Vsignal=0, SW1A～SWNA, SW1B～SWNB, SW2D～SWND are all closed, SW1C～SWNC are all open, V(DVDD1)=V(SVDD1), V(DVDD2)=V(SVDD2A )=V(SVDD2B)...The power supply voltage of fingerprint detection module 10 is V(SVDDNB)=V(DVDDN), ground V(SVSSN)=V(SVSS1)=V(SVSS2)=...=V(DVSS) ＝0, the modulation signal is 0 at this time, and all capacitors are fully charged;

In the second phase, Vsignal=1, SW2D~SWND are disconnected, the state of SW1A~SWNA, SW1B~SWNB, SW1C~SWNC is determined by Vctrl1~Vctrln, when the X stage (X=1, 2,..., n) Modulation signal generator 11 When Vctrlx=0, this stage does not participate in modulating the ground signal of the fingerprint detection module 10; In this way, by selectively cascading the modulation signal generators 11 in multiple stages, the number of stages involved in fingerprint modulation can be arbitrarily controlled.

Since the working principles and states of the modulation signal generators 11 of the second to the Nth stages are similar, the entire working process is described by taking the modulation signal generators 11 of the first and second stages as examples:

For the first-level modulation signal generator 11, when Vsignal=1, assuming Vctrl1=0, then SW1A and SW1B are closed, SW1C is open, V(SVDD1)=V(DVDD1), V(SVSS1)=V(DVSS) =0, the potential on SVSS1 does not change, and the first-level modulation signal generator 11 does not participate in signal modulation. And if Vctrl1=1, then SW1A and SW1B are disconnected, SW1C is closed, V(SVSS1)=V(DVDD1), the potential of SVSS1 raises the voltage range of DVDD1, and the first-stage modulation signal generator 11 participates in signal modulation. At this time, the charges stored on C1 temporarily supply power to other circuits of the first-stage modulation signal generator 11, keeping the relative voltage between SVDD1 and SVSS1 unchanged.

For the second-level modulation signal generator 11, when Vsignal=1, SW2D must be turned off. Suppose Vctrl2=0, SW2A and SW2B are closed, SW2C is open, V(SVSS1)=V(SVSS2), V(SVDD2A)=V(SVDD2B). The charges stored on C2A and C2B temporarily supply power to other circuits of the second-level modulation signal generator 11, keeping the relative voltages between SVDD2A and SVSS1, SVDD2B and SVSS2 unchanged. In this way, the second-level modulation signal generator 11 does not participate in raising the ground potential of the fingerprint detection module 10, and does not participate in signal modulation. Assuming that Vctrl2=1, SW2A and SW2B are disconnected, SW2C is closed, V(SVSS2)=V(SVDD2A), since C2A keeps the relative voltage of SVDD2A and SVSS1 unchanged, SVSS2 raises the voltage range of DVDD2 relative to SVSS1 voltage. The second level modulation signal generator 11 participates in signal modulation. At this time, the charges stored on C2A and C2B temporarily supply power to other circuits of the second-level modulation signal generator 11, keeping the relative voltages at both ends of them unchanged. The working principles of other X-level (X>2) modulation signal generators 11 can be deduced by analogy.

Finally, the amplitude of the modulated signal is at least the minimum voltage of DVDD1-DVDDN, and the highest is the sum of the voltages of DVDD1-DVDDN.

Since the power domains of each modulation signal generator 11 are different, the buffers, AND gates and NAND gates in the figure also serve as level shifters 12 in addition to their corresponding logic functions, converting the received The control signals are converted to signals for the respective power domains.

It is conceivable that the embodiment of FIG. 5 takes the modulated signal receiving end of the fingerprint detection module 10 as the ground terminal as an example. Of course, the modulated signal receiving end of the fingerprint detection module 10 can also be a power supply. Referring to FIG. 7, the fingerprint detection module can be realized 10 negative voltage modulation of the power supply SVDDNB, the minimum absolute value of the modulation amplitude is the minimum voltage of DVDD1~DVDDN, the highest is the sum of the voltages of DVDD1~DVDDN, and the modulation direction is negative voltage.

In the cascade structure of modulation signal generator 11 in Fig. 5, each level of modulation signal generator 11 needs a DC power supply DVDDX to supply power, so just need multiple groups of power supplies, the utility model provides another kind of modulation signal The cascaded structure of the generator 11 is shown in FIG. 6 . The cascaded structure in FIG. 6 can save the second group of power supplies. Of course, this method can also be referred to to save other groups of power supplies.

The cascaded structure of the multi-stage modulation signal generator 11 in Fig. 6 is specifically:

The first stage modulation signal generator 11 includes:

Buffer B1, AND gate AND1, NAND gate NAND1, first switch SW1A, second switch SW1B, third switch SW1C and capacitor C1A;

The input terminal of the buffer B1 is the first control terminal of the modulation signal generator 11, and the output terminal of the buffer B1 is connected with an input terminal of the AND gate AND1 and the NAND gate NAND1 at the same time, and the other of the AND gate AND1 and the NAND gate NAND1 One input terminal is the second control terminal of the modulation signal generator 11 at the same time, the output terminals of the AND gate AND1 and the NAND gate NAND1 are respectively connected with the control terminals of the second switch SW1B and the third switch SW1C, and the output terminals of the AND gate AND1 are also It is connected to the control end of the first switch SW1A, one end of the first switch SW1A and the third switch SW1C are connected to the system power supply DVDD1 for the power supply end of the modulation signal generator 11 at the same time, and one end of the second switch SW1B is the power supply end of the modulation signal generator 11. The input end is connected to the system ground DVSS, the other end of the third switch SW1C is connected to the other end of the second switch SW1B, the other end SVDD1 of the first switch SW1A is the power output end of the modulation signal generator 11, and is connected to one end of the capacitor C1A. The other end of C1A is the output end of the modulation signal generator 11 and connected to the other end of the second switch SW1B.

Taking the Nth modulation signal generator as an example, the second to Nth modulation signal generators 11 include:

Buffer Bn, AND gate ANDn, NAND gate NANDn, first switch SWNA, second switch SWNB, third switch SWNC, capacitor CNA, fourth switch SWND, capacitor CNB;

The input end of buffer Bn is the first control end of modulating signal generator 11, and the output end of buffer Bn is connected with an input end of AND gate ANDn, NAND gate NANDn simultaneously, the other of AND gate ANDn, NAND gate NANDn An input end is the second control end of modulation signal generator 11 simultaneously, and the output end of AND gate ANDn, the output end of NAND gate NANDn is connected with the control end of second switch SWNB, the 3rd switch SWNC respectively, and the output end of AND gate ANDn also It is connected with the control end of the first switch SWNA, and the input end of the buffer Bn is also connected with the control end of the fourth switch SWND, and one end of the fourth switch SWND is the power supply end of the modulation signal generator 11, and the other end of the fourth switch SWND At the same time, it is connected to one end of the first switch SWNA and the third switch SWNC, and the other end of the fourth switch SWND is also connected to one end of the capacitor CNB, and the other end of the capacitor CNB is the input end of the modulation signal generator 11 and the second switch SWNB. One end is connected, the other end of the second switch SWNB is connected to the other end of the third switch SWNC, the other end SVDDNB of the first switch SWNA is the power supply output end of the modulation signal generator 11 and is connected to one end of the capacitor CNA, and the other end of the capacitor CNA The output end of the modulation signal generator 11 is connected to the other end of the second switch SWNB.

In the embodiment of the utility model, n and N in the above-mentioned devices correspond to the number of modulation signal generators, and the number of modulation signal generators can be brought into n or N to obtain the corresponding number of devices and their connection relationship.

Specifically, each of the switches SWnA-SWnD may be composed of semiconductor devices such as diodes, triodes, or MOS transistors.

In the embodiment of the present invention, the input terminals of the modulation signal generator 11 of the latter stage are all connected to the output terminals of the modulation signal generator 11 of the previous stage, and the input terminals of the modulation signal generator 11 of the first stage are connected to the system ground DVSS, The output end of the last stage modulation signal generator 11 is connected to the modulation signal receiving end of the fingerprint detection module 10, the power supply end of the first stage modulation signal generator 11 is connected to the system (direct current) power supply DVDD1, the second stage to the Nth stage The power supply terminal of any one-level or multi-level modulation signal generator 11 can be connected with the power output terminal of the first-level modulation signal generator 11 or the previous level modulation signal generator 11, for example, the first level, the second level The modulation signal generators 11 share a system power supply, and the modulation signal generators 11 of the third stage, the fourth stage, and the fifth stage can also share a system power supply, so as to share the system power supply and reduce the amount of system power supply. Under this structure, the working status of the two phases is:

In the first phase, Vsignal=0, SW1A～SWNA, SW1B～SWNB are still closed, and SW1C～SWNC are still open, so, V(SVDD2A)=V(SVDD2B)=V(SVDD1)=V(DVDD1 ), that is to say, the place that originally needs DVDD2 power supply becomes DVDD1 power supply. C2A and C2B are now fully charged.

In the second phase, Vsignal=1, SW2D is disconnected. Regardless of whether Vctrl2 is 0 or 1, the working principle is the same as in Figure 5.

Through the above method, the DC power supply of DVDD2 is omitted, and the power supply is indirectly replaced by DVDD1. Through this method, all DC power supplies except DVDD1 can be omitted, and only DVDD1 is finally realized, but the highest amplitude of the modulation voltage is N times the voltage of DVDD1.

Fig. 7 shows the cascade structure of the modulating signal generator in the floating-source fingerprint recognition circuit provided by the embodiment of the present invention. For the convenience of description, only the parts related to the present invention are shown.

As an embodiment of the present invention, each modulation signal generator 11 includes an input terminal, an output terminal, a first control terminal, and a second control terminal;

The first control terminal receives the modulation source (Vsignal) signal, and the second control terminal receives the enable (Vctrl) signal. Both the Vsignal signal and the Vctrl signal can be the control signal provided by the fingerprint detection module 10 or the control signal provided by the external circuit 20 .

The output end of the first stage modulation signal generator is connected with the input end of the second stage modulation signal generator, the output end of the second stage modulation signal generator is connected with the input end of the next stage modulation signal generator, and the last stage ( The output terminal of the Nth stage) modulated signal generator is connected with the modulated signal receiving terminal of the fingerprint detection module 10 .

In the embodiment of the present utility model, the first control terminals of the modulation signal generators 11 at all levels are connected at the same time to receive a common Vsignal signal, and the second control terminals of each modulation signal generator 11 receive corresponding Vctrl signals respectively (the first The level modulation signal generator corresponds to receiving Vctrl1, and the Nth level modulation signal generator corresponds to receiving Vctrln).

The first stage modulation signal generator 11 includes:

Buffer B1, AND gate AND1, NAND gate NAND1, first switch SW1A, second switch SW1B, third switch SW1C and capacitor C1A;

The input terminal of the buffer B1 is the first control terminal of the modulation signal generator 11, and the output terminal of the buffer B1 is connected with an input terminal of the AND gate AND1 and the NAND gate NAND1 at the same time, and the other of the AND gate AND1 and the NAND gate NAND1 One input terminal is the second control terminal of the modulation signal generator 11 at the same time, the output terminals of the AND gate AND1 and the NAND gate NAND1 are respectively connected with the control terminals of the first switch SW1A and the third switch SW1C, and the output terminals of the AND gate AND1 are also It is connected to the control end of the second switch SW1B, one end of the first switch SW1A is connected to the system power DVDD1, the other end of the first switch SW1A is connected to one end of the third switch SW1C and one end of the capacitor C1A, the other end of the third switch SW1C is connected to the One end of the second switch SW1B is connected to the system ground DVSS as the input end of the modulation signal generator 11 , and the other end of the second switch SW1B is connected to the other end of the capacitor C1A as the output end of the modulation signal generator 11 .

Taking the second-level modulation signal generator as an example, the modulation signal generator 11 from the second level to the N-1th level (intermediate level) includes:

Buffer B2, AND gate AND2, NAND gate NAND2, first switch SW2A, second switch SW2B, third switch SW2C, capacitor C2A, fourth switch SW2D, capacitor C2B;

The input end of the buffer B2 is the first control end of the modulation signal generator 11, the output end of the buffer B2 is connected with an input end of the AND gate AND2 and the NAND gate NAND2 at the same time, and the other end of the AND gate AND2 and the NAND gate NAND2 One input end is the second control end of modulation signal generator 11 at the same time, and the output end of AND gate AND2, the output end of NAND gate NAND2 is connected with the control end of first switch SW2A, the 3rd switch SW2C respectively, and the output end of AND gate AND2 also It is connected with the control end of the second switch SW2B, the input end of the buffer B2 is also connected with the control end of the fourth switch SW2D, one end of the fourth switch SW2D is connected with the system power supply DVDD2, and the other end of the fourth switch SW2D is connected with the first switch at the same time. One end of SW2A is connected to one end of capacitor C2B, the other end of the first switch SW2A is connected to one end of the third switch SW2C and one end of capacitor C2A at the same time, and the other end of capacitor C2B is the input end of the modulation signal generator 11. The other end of the switch SW2C is connected to one end of the second switch SW2B, and the other end of the second switch SW2B is the output end of the modulation signal generator 11 and connected to the other end of the capacitor C2A.

Taking the Nth-level modulation signal generator as an example, the last-level modulation signal generator 11 includes:

Buffer Bn, AND gate ANDn, NAND gate NANDn, first switch SWNA, second switch SWNB, third switch SWNC, capacitor CNA, fourth switch SWND, capacitor CNB;

The input end of buffer Bn is the first control end of modulating signal generator 11, and the output end of buffer Bn is connected with an input end of AND gate ANDn, NAND gate NANDn simultaneously, the other of AND gate ANDn, NAND gate NANDn An input end is the second control end of modulation signal generator 11 simultaneously, and the output end of AND gate ANDn, the output end of NAND gate NANDn is connected with the control end of first switch SWNA, the 3rd switch SWNC respectively, and the output end of AND gate ANDn also It is connected with the control end of the second switch SWNB, the input end of the buffer Bn is also connected with the control end of the fourth switch SWND, one end of the fourth switch SWND is connected with the system power supply DVDDN, and the other end of the fourth switch SWND is connected with the first switch simultaneously. One end of SWNA and one end of capacitor CNB are connected, the other end of the first switch SWNA is the output end of the modulation signal generator 11 and is simultaneously connected with one end of the third switch SWNC and one end of the capacitor CNA, and the other end of the capacitor CNB is the modulation signal generator The input end of the device 11 is connected to the other end of the third switch SWNC and one end of the second switch SWNB at the same time, and the other end of the second switch SWNB is connected to the other end of the capacitor CNA.

In the embodiment of the utility model, n and N in the above-mentioned devices correspond to the number of modulation signal generators, and the number of modulation signal generators can be brought into n or N to obtain the corresponding number of devices and their connection relationship.

Specifically, each of the switches SWnA-SWnD may be composed of semiconductor devices such as diodes, triodes, or MOS transistors.

In the embodiment of the present invention, the input terminals of the modulation signal generator 11 of the latter stage are all connected to the output terminals of the modulation signal generator 11 of the previous stage, and the input terminals of the modulation signal generator 11 of the first stage are connected to the system ground DVSS, The output end of the last stage modulation signal generator 11 is connected to the modulation signal receiving end of the fingerprint detection module 10, each stage modulation signal generator 11 is respectively connected to the corresponding system (direct current) power supply DVDD1～DVDDN, and the last stage modulation signal generation The device 11 outputs power to the fingerprint detection module 10 when the switch is turned on, and the other end of the capacitor CNA is connected to the ground terminal of the fingerprint detection module 10 to form a voltage difference to charge the capacitor CAN when the switch is turned on, and to charge the fingerprint when the switch is turned off. The detection module 10 outputs a short-time power supply.

In the cascaded structure of modulation signal generators 11 in Fig. 7, modulation signal generators 11 of each stage all need a DC power supply DVDDX to supply power, so just need multiple groups of power supplies, the utility model provides another kind of floating power supply The cascaded structure of the modulating signal generator 11 is shown in FIG. 8. The cascaded structure in FIG. 8 can save the second group of power supplies. Of course, you can also refer to this method to save other groups of power supplies.

The structure of the modulation signal generator 11 in the embodiment of Fig. 8 is the same as that of the embodiment in Fig. 7, the difference is that in the embodiment of Fig. The power supply end of any one or multi-level modulation signal generator 11 in the Nth level can be connected with the power supply output end of the first level modulation signal generator 11 or the previous level modulation signal generator 11, for example, the first level can be The first and second modulation signal generators 11 share one system power supply, and the third, fourth and fifth modulation signal generators 11 can also share one system power supply, so as to share the system power supply and reduce the amount of system power supply.

The working principle of the modulating signal generator 11 in the embodiment shown in Fig. 7 and Fig. 8 is the same as that in the embodiment shown in Fig. 5 and Fig. 6 , except that it is changed to a floating power source structure, and will not be repeated here.

The embodiment of the utility model adopts a cascade modulation method, which can simplify the process and improve the integration.

Preferably, the fingerprint detection module 10 can be packaged in one chip, and the cascaded multi-level modulation signal generator 11 is independent of the chip where the fingerprint detection module 10 is located, and is packaged in another chip, which can be realized without using a high-voltage process. The modulation of high voltage amplitude greatly reduces the cost.

Figure 9 shows the cross-sectional structure of the isolation device in the CMOS-based single-chip floating-source fingerprint identification circuit provided by the embodiment of the present invention. For the convenience of illustration, only the parts related to the present invention are shown.

As a preferred embodiment of the present invention, the multi-level modulation signal generator 11 can also be integrated into the chip where the fingerprint detection module 10 is located. Since the power domain where each level modulation signal generator 11 is located is independent, it needs to be In the CMOS process, isolation devices are used to isolate multiple power domains.

Preferably, multiple power domains can be isolated by setting the Deep-Nwell. As long as the reverse breakdown voltage of the parasitic diode between the Deep-Nwell and the PSUB is high enough, the number of cascaded modulation stages can be increased, usually supporting two to Three-level cascade.

Taking two power domains as an example, they are DVDD1/DVSS and SVDD1/SVSS1 respectively. As the first stage, the NMOS of the inverter between DVDD1/DVSS is built on the substrate PSUB, and the PMOS is built on Nwell1. The NMOS of the inverter between SVDD1/SVSS1 is built on the Deep-Nwell isolated Pwell, and the PMOS is built on the Deep-Nwell isolated Nwell2. The devices on both sides are completely isolated. Both Deep-Nwell and Nwell2 are N-type injections, so they can be considered as short-circuited, that is, the potentials of Deep-Nwell and Nwell2 are equal, which is equal to the potential of SVDD1. During modulation by the modulation signal generator 11 of the first stage, the potential of SVDD1 may rise to twice the potential of DVDD1. At this time, in addition to the isolation of Deep-Nwell, due to its relatively low injection concentration, the reverse breakdown voltage of the parasitic diode between Deep-Nwell and PSUB is high, which can ensure that no parasitic diode occurs at this time. breakdown event. Starting from the second-level modulation signal generator 11, the circuit can be built by using the isolation method of the inverter between SVDD1/SVSS1.

In the embodiment of the utility model, the multi-level modulation signal generator 11 is integrated into the chip where the fingerprint detection module 10 is located, and the integration can be realized without changing the CMOS process adopted by the fingerprint detection module 10, which increases the integration degree of the process.

Another object of the embodiments of the present utility model is to provide a fingerprint identification device comprising the above-mentioned fingerprint identification circuit.

The embodiment of the utility model adopts a cascading method for modulation, and the generated modulation signal will increase by a certain amplitude every time it passes through a modulation signal generator, and finally the modulation signal received by the fingerprint detection module is greatly enhanced, thereby satisfying the requirement of fingerprint identification. Sensitivity requirements, avoiding the problem of increasing the sensitivity of fingerprint recognition through high voltage, which leads to high cost and the addition of driver chips.

The above are only preferred embodiments of the present utility model, and are not intended to limit the present utility model. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present utility model should be included in the utility model. within the scope of protection.

Claims (10)

1. A fingerprint identification circuit, comprising a fingerprint detection module, is characterized in that, the circuit also includes: A cascaded multi-stage modulation signal generator, the output end of the last stage modulation signal generator is connected to the modulation signal receiving end of the fingerprint detection module, and the multi-stage modulation signal generator is based on the control signal generated by the fingerprint detection module and /or the control signal generated by the external circuit generates a modulation signal and amplifies the amplitude of the modulation signal step by step, and provides the modulation signal to the fingerprint detection module, and the modulation signal receiving end of the fingerprint detection module is the power supply terminal or ground terminal of the fingerprint detection module . 2. The circuit according to claim 1, wherein the modulation signal is a square wave, a sine wave or a sawtooth wave. 3. The circuit according to claim 1, further comprising: A single-stage or cascaded multi-stage level shifter for transmitting signals between different power domains, the communication end of the first-stage level shifter is connected to the output end of the fingerprint detection module. 4. The circuit according to claim 3, further comprising: A fingerprint processing module for further processing the detected fingerprint information, the processing end of the fingerprint processing module is connected to the processing end of the last level converter, and the external connection end of the fingerprint processing module is connected to an external circuit. 5. The circuit of claim 1, further comprising: The drive ring is connected to the external drive port of the fingerprint detection module. When the modulation signal receiving end of the fingerprint detection module is the power supply end of the fingerprint detection module, the drive ring changes the relative system The potential of ground VSS to enhance the excitation signal; or Drive ring for improved ESD performance. Connect to system ground. 6. The circuit according to claim 1, wherein each modulation signal generator comprises: a first control terminal, a second control terminal, an input terminal and an output terminal; The output end of the first-stage modulation signal generator is connected to the input end of the second-stage modulation signal generator, the output end of the second-stage modulation signal generator is connected to the input end of the next-stage modulation signal generator, and the last stage modulation The output end of the signal generator is connected with the modulated signal receiving end of the fingerprint detection module; The first control terminal receives the modulation source signal, the second control terminal receives the enable signal, and the first control terminals of the modulation signal generators at all levels are connected at the same time to receive a common modulation source signal. The second control terminal respectively receives corresponding enabling signals; Both the modulation source signal and the enabling signal are control signals provided by the fingerprint detection module or the external circuit. 7. The circuit according to claim 6, wherein each level of modulation signal generator is powered by a corresponding system power supply, or multi-level modulation signal generators are powered by one system power supply. 8. The circuit according to claim 1, wherein the circuit is packaged in a chip, and the chip is made based on a CMOS process, and the power supply of the multi-level modulation signal generator is isolated by setting a deep well in the chip area. 9. The circuit according to claim 1, wherein the fingerprint detection module is packaged in one chip, and the cascaded multi-level modulation signal generator is packaged in another chip. 10. A fingerprint recognition device, characterized in that the device comprises the fingerprint recognition circuit according to any one of claims 1-9.