CN204993296U - Circuit of GPIO extension button - Google Patents

Abstract

The utility model discloses a circuit for extending GPIO keys, which includes a CPU microprocessor and a keyboard matrix. The GPIO expansion port and the expansion circuit of the keyboard are bridged between the basic rows. The utility model realizes the expansion of the key circuit of the mobile phone by using a diode separation device to form an AND gate circuit or specially utilizing an AND logic device.

Description

A GPIO extended button circuit

technical field

The utility model relates to a key circuit, in particular to a GPIO (General Purpose Input Output, general purpose input and output) extended key circuit.

Background technique

Currently, the key signals provided by the mobile phone platform are Keyou0-out6 and Keyin0-keyin5, and generally can support up to 7*6=42 keys. Then if you want to realize more than 42 physical buttons, it will be troublesome, and there is no effective solution.

Contents of the invention

In order to overcome the deficiencies in the above-mentioned prior art, one purpose of the present invention is to provide a GPIO extended button circuit, which uses a diode separation device to build an AND gate circuit or specifically uses an AND logic device to realize the mobile phone button circuit. expand.

For reaching above-mentioned and other purposes, the utility model proposes a kind of circuit of GPIO expansion button, comprises CPU microprocessor, keyboard matrix, and this circuit also comprises expansion circuit, expands basic row with certain behavior keyboard of described keyboard matrix, in The expansion circuit is bridged between the GPIO expansion port of the CPU microprocessor and the keyboard expansion basic row.

Further, the expansion circuit includes several diodes, and each diode is connected between the keyboard expansion basic row and each GPIO expansion port.

Further, the cathode of the diode is connected to the GPIO expansion port, and the anode is connected to the keyboard expansion basic row.

Further, the expansion circuit includes an AND circuit, the input pin of the AND circuit is connected to the GPIO expansion port, and the output pin of the AND circuit is connected to the keyboard expansion basic row.

Further, the row scanning GPIO port of the CPU microprocessor is set as output, and the column scanning GPIO port is set as interrupt input, and the keyboard matrix composed of a self-resetting button is connected between each row and each column.

Further, a pull-up resistor is set on each column scanning GPIO port.

Further, the diode is a Schottky diode with relatively low forward conduction voltage.

Compared with the prior art, the utility model is a GPIO extended button circuit, which realizes the expansion of the mobile phone button circuit by using a diode separation device to build an AND gate circuit or specially using an AND logic device.

Description of drawings

Fig. 1 is the circuit structural diagram of the first preferred embodiment of the circuit of a kind of GPIO expansion button of the utility model;

Fig. 2 is a circuit structure diagram of a second preferred embodiment of the circuit of a GPIO extension key according to the present invention.

detailed description

The implementation of the utility model will be described below through specific examples and in conjunction with the accompanying drawings. Those skilled in the art can easily understand other advantages and effects of the utility model from the content disclosed in this specification. The utility model can also be implemented or applied through other different specific examples, and various modifications and changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the utility model.

FIG. 1 is a circuit structure diagram of a first preferred embodiment of a circuit of a GPIO extension key according to the present invention. As shown in FIG. 1 , a circuit of a GPIO extended button of the present invention includes a CPU microprocessor 10 , a keyboard matrix 20 and an extended circuit 30 . The CPU microprocessor 10 and the keyboard matrix 20 are conventional circuits, and the row scanning GPIO ports are set as output, shown as KEYOUT0-6, and the column scanning GPIO ports are set as interrupt input, shown as KEYIN0-5 and GPIO0-2, each row A self-resetting button is connected between each column to form a keyboard matrix 20, the i+1th row KEYOUTi and the first column KEYIN0, the second column KEYIN1, the third column KEYIN2, the fourth column KEYIN3, the fifth column KEYIN4, and the sixth column KEYIN5 And the extension column (the column corresponding to the GPIO expansion port) GPIO0, GPIO1, and GPIO2 are respectively connected with a self-resetting switch to form the i+1th row of keyboards, and the value of i is from 0 to 6, so that a total of 7 rows of keyboards are obtained, and a certain behavior is selected The keyboard extension basic row, shown as KEYIN5 in the figure, connects diodes D1-D3 between the GPIO expansion ports GPIO0, GPIO1, GPIO2 and the keyboard extension basic row to form an extension circuit 30 .

Preferably, the diode used in the utility model selects a Schottky diode with a relatively low forward conduction voltage (the forward conduction voltage is about 0.2V). If a common diode is selected, due to the voltage drop of 0.7V, the KEYIN5 Interruption may not be judged.

Fig. 2 is a circuit structure diagram of a first preferred embodiment of a circuit of a GPIO extension key according to the present invention. Different from the first preferred embodiment, in the second preferred embodiment, the expansion circuit 30 is formed by an AND gate, the input pin of the AND gate is connected to the GPIO expansion ports GPIO0, GPIO1, and GPIO2, and the output pin of the AND gate is connected to the keyboard expansion port. The base row (KEYIN5).

In this utility model, KEYOUT0-6 of the GPIO port is set as scan output, and KEYIN0-5 of the GPIO port is set as interrupt input. If there is an internal pull-up resistor, turn on the internal pull-up resistor to reduce costs. Pull-up resistor. As shown in Figure 1, R1-R9, select the appropriate GPIO expansion port (allow to be set as interrupt input) as shown in the figure GPIO0-2, use diodes to realize keyboard expansion, 3 GPIO expansion ports, 3 columns can be expanded on the basis of KEYIN5 Keyboard, each GPIO expansion port can expand 7 keyboards (KEYOUT0-6). Of course, the number of GPIO expansion ports is determined by the number of expansion keyboards required, and is not limited here.

The following illustrates the principle of the utility model:

When no button is pressed, KEYIN5 and GPIO0-2 will not trigger a button interrupt at this time because they have no pull-up resistors and are in a high level state.

If a button is pressed on the KEYIN5 column, KEYIN5 will be pulled low to trigger a button interrupt. At this time, the CPU needs to judge the state of the GPIO keyboard extension basic row 0-2. The three GPIOs are still in high power due to the reverse cut-off of the diode. In the flat state, the specific key value can be determined.

If the extended button of GPIO0-2 is pressed, the GPIO of the corresponding column will be pulled down. At this time, the diode is forward-conducting, and at the same time, KEYIN5 will be pulled down, which will trigger the button interrupt of KEYIN5. At this time, the CPU needs to judge The state of GPIO0-2 can determine the specific key value. Since the specific judgment of the key value by the CPU is a prior art, it will not be repeated here, and it does not belong to the scope of protection of the present invention.

Since the principle of the expansion circuit composed of AND gates is the same as that of the expansion circuit composed of diodes, it will not be repeated here.

The above-mentioned embodiments only illustrate the principles and effects of the present utility model, but are not intended to limit the present utility model. Any person skilled in the art can modify and change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, the protection scope of the utility model should be as listed in the claims.

Claims (7)

1. the circuit of a kind of GPIO expansion key, comprise CPU microprocessor, keyboard matrix, it is characterized in that: this circuit also comprises expansion circuit, expands basic row with a certain behavior keyboard of described keyboard matrix, in described CPU microprocessor The GPIO expansion port of the device and the expansion circuit are bridged between the basic row of the keyboard expansion. 2 . The circuit of a GPIO extension key according to claim 1 , wherein the extension circuit includes a plurality of diodes, and each diode is connected between the keyboard extension basic row and each GPIO extension port. 3 . 3. The circuit of a GPIO extension button as claimed in claim 2, wherein the diode cathode is connected to the GPIO extension port, and the anode is connected to the keyboard extension basic row. 4. The circuit of a kind of GPIO expansion button as claimed in claim 1, characterized in that: the expansion circuit comprises an AND gate circuit, the input pin of the AND gate circuit is connected to the GPIO expansion port, and the AND gate circuit The output pin is connected to the keyboard extension base row. 5. the circuit of described a kind of GPIO expansion button as claimed in claim 2 or 4, it is characterized in that: the line scan GPIO mouth of described CPU microprocessor is set to output, and column scan GPIO mouth is set to interrupt input, The keyboard matrix composed of a self-resetting button is connected between each row and each column. 6 . The circuit of a GPIO extension button according to claim 5 , wherein a pull-up resistor is set on each of the row-scanning GPIO ports. 7 . 7. The circuit of a GPIO extended button according to claim 2, wherein the diode is a Schottky diode with relatively low forward voltage.