CN204632803U - A kind of CSP LED and substrate - Google Patents

Abstract

The utility model discloses a kind of CSP LED and substrate, CSP LED comprises substrate, flip-chip and is coated on the fluorescent adhesive layer of flip-chip except bottom surface, described substrate comprises substrate body, described substrate body is provided with boss, described boss is convexed to form towards described flip-chip side by described substrate body, described flip-chip is located on boss, and fluorescent adhesive layer is positioned at outside the surrounding of boss.The utility model solves and existingly causes being electrically connected unreliable between flip-chip with substrate and being connected unstable technical problem because fluorescent adhesive layer cutting exists burr and flip-chip with being heated in substrate welding process.

Description

A kind of CSP LED and substrate

technical field

The utility model relates to a CSP LED, in particular to a substrate for a CSP LED.

Background technique

Chip-level packaging, or CSP (chip scale package), has the advantages of small size, light weight and good electrical performance. Under the advantages of high light efficiency, high reliability and easy integration, it is widely used in CSP packaging technology.

The current manufacturing process of a single CSP without a substrate is: first lay a film on the machine, then place multiple chips on the film, then encapsulate the fluorescent glue on the film, let the fluorescent glue cure, and let the fluorescent glue cover On the chip except the bottom surface, the above-mentioned molded chip group is then cut into individual CSPs. During the cutting process, downward burrs may be formed on the lower edge of the fluorescent adhesive layer, resulting in the existence of a gap between the fluorescent adhesive layer and the bottom of the chip. The phenomenon of unevenness, when a single CSP is packaged on a flat substrate, due to the existence of burrs, it is difficult to make close contact between the chip and the substrate, which affects the reliability of the electrical connection.

In addition, the connection between CSP and the substrate is usually the eutectic welding process between metal and metal. At present, the eutectic process in the industry generally has the following types: (1) eutectic reflow soldering with flux and solder; (2) Ultrasonic thermocompression welding process using gold ball bonding; (3) eutectic reflow soldering process of gold-tin alloy. Among them, the first and third methods are to first use solder paste or solder resist to paste the chip on the surface of the substrate, and then perform reflow soldering, so that the fluorescent adhesive layer will expand due to heat during the heating process, which will cause the fluorescent adhesive layer to contact with the bottom of the chip. The surface is uneven, which leads to poor contact or even no contact between the chip and the pad on the substrate, which affects the reliability of the electrical connection between the chip and the substrate. In the second method, since there is a gold ball between the substrate and the chip, and then a specific welding machine is used to control the pressure of the die-bonding head and the ultrasonic power for precise control, the gold ball will be deformed to a certain extent, and the contact area will be increased. Under the action of friction and ultrasonic friction, the metal on the chip and the substrate can be bonded, but due to the need to use a specific welding machine and precise temperature control, the process is complicated and the manufacturing cost is high.

In the patent document with the application number CN201410806022.7 and the application date being 2014.12.18, a flip-chip LED chip packaging structure is disclosed, which specifically discloses a substrate, a flip chip, and a silica gel layer, and a circuit layer is provided on the substrate. The circuit layer area where the electrode of the flip chip is connected is provided with a boss, and then the silica gel is encapsulated on the flip chip, so that the silica gel is covered on the flip chip and the silica gel is in close contact with the substrate. This patent relates to the flip chip connected The technical problem to be solved by the bosses on the circuit layer is to achieve better exhaust and heat dissipation. The silicone is packaged after the flip chip is installed, so there will be no contact between the flip chip and the circuit layer due to the thermal expansion of the silicone Bad phenomenon.

Similarly, a patent document with the application number CN201320880311.2 and the filing date of 2013.12.30 also discloses a LED light emitting device based on dispensing molding lens. The lens in the light emitting device is also formed after the chip is installed, and The edge of the lens is formed on the upper edge of the boss, so there is no phenomenon of poor contact between the flip chip and the circuit layer due to thermal expansion of the glue.

Contents of the invention

The purpose of this utility model is to provide a reliable CSP LED and a substrate to solve the problem of poor electrical connection between the flip chip and the substrate due to burrs in the cutting of the fluorescent adhesive layer and heat during the welding process of the flip chip and the substrate. Technical issues with reliability and weak connections.

In order to achieve the above object, a CSP LED includes a substrate, a flip chip, and a fluorescent adhesive layer coated on the flip chip except the bottom surface, and is characterized in that: the substrate includes a substrate body, and the substrate body is provided with a convex The boss is formed by protruding from the substrate body toward the side of the flip chip, the flip chip is arranged on the boss, and the fluorescent glue layer is located outside the periphery of the boss.

In the above-mentioned structure, since the boss is provided only for carrying the flip chip, the formed fluorescent glue layer is located outside the boss, so that there is a space of the height of the boss between the fluorescent glue layer and the substrate body, so even if The fluorescent adhesive layer has downward burrs, which will not affect the close contact between the flip chip and the boss. When connecting the CSP, if the fluorescent adhesive layer is heated and expands, the fluorescent adhesive layer will also give it room for expansion. Therefore, it is solved Due to the burrs in the cutting of the fluorescent adhesive layer and the unreliable electrical connection between the flip chip and the substrate caused by heat during the welding process of the flip chip and the substrate, the connection between the flip chip and the boss is more firm.

Further, the boss is a circuit layer, and this structure is easy to manufacture.

Further, a circuit layer is provided on the upper surface of the boss.

Furthermore, the height of the boss is 0.2-0.3 mm, so that the technical problems of unreliable electrical connection and unstable fixation can be solved, and the thickness of the CSP LED can be reduced.

Further, there is a gap between the lower surface of the fluorescent glue layer and the upper surface of the substrate body, which reserves enough space for burrs and expansion of the fluorescent glue.

Further, the downward projection surface of the top surface of the boss is equal to or smaller than the projection surface of the area enclosed by the inner side of the fluorescent glue layer.

In order to achieve the above object, a substrate includes a substrate body, the substrate body is provided with a boss for carrying a flip chip and is located inside the fluorescent adhesive layer of the flip chip, and the boss is directed from the substrate body to the The bumps on one side of the flip chip are formed.

In the above-mentioned structure, since the boss is provided only for carrying the flip chip, the formed fluorescent glue layer is located outside the boss, so that there is a space of the height of the boss between the fluorescent glue layer and the substrate body, so even if The fluorescent adhesive layer has downward burrs, which will not affect the close contact between the flip chip and the boss. When connecting the CSP, if the fluorescent adhesive layer is heated and expands, the fluorescent adhesive layer will also give it room for expansion. Therefore, it is solved Due to the burrs in the cutting of the fluorescent adhesive layer and the unreliable electrical connection between the flip chip and the substrate caused by heat during the welding process of the flip chip and the substrate, the connection between the flip chip and the boss is more firm.

Further, the boss is a circuit layer, this structure is easy to manufacture and can form a boss.

Further, a circuit layer is provided on the upper surface of the boss.

Furthermore, the height of the boss is 0.2-0.3 mm, so that the technical problems of unreliable electrical connection and unstable fixation can be solved, and the thickness of the CSP LED can be reduced.

Description of drawings

FIG. 1 is a schematic structural view of the substrate of the present invention.

Fig. 2 is a structural schematic diagram of the utility model CSP LED.

Detailed ways

The utility model will be described in further detail below in conjunction with the accompanying drawings and specific embodiments.

Example 1.

As shown in Figure 1, the substrate 1 includes a substrate body 11, the substrate body 11 is provided with a boss 12 for carrying a flip chip and is located inside the fluorescent adhesive layer of the flip chip, and the boss 12 is formed by the substrate The body 11 protrudes toward the side of the flip chip.

The height of the boss 12 is the best of 0.2-0.3mm. The boss 12 can be directly formed by the circuit layer, or can be formed on the substrate body, and the circuit layer is arranged on the boss.

In this embodiment, since the boss 12 only used to carry the flip chip is provided, the formed fluorescent glue layer is located outside the boss 12, so that there are 12 bosses between the fluorescent glue layer and the substrate body 11. Therefore, even if the fluorescent adhesive layer has downward burrs, it will not affect the close contact between the flip chip and the boss 12. When connecting the CSP, if the fluorescent adhesive layer is heated and expanded, the fluorescent adhesive layer will also give it Therefore, it solves the problem of unreliable electrical connection between the flip chip and the substrate due to the burrs in the cutting of the fluorescent adhesive layer and the heat during the welding process of the flip chip and the substrate, making the connection between the flip chip and the boss more convenient firm.

Example 2.

As shown in Figure 2, a CSP LED includes a substrate 1, a circuit layer 2, a flip chip 3 and a fluorescent glue layer 4.

The substrate 1 includes a substrate body 11, and the substrate body 11 is provided with a boss for carrying a flip chip and located inside the fluorescent adhesive layer of the flip chip, and the boss is directed from the substrate body 11 toward the flip chip One side is raised.

The height of the boss 12 is the best of 0.2-0.3mm. The boss can be directly formed by the circuit layer 2 , or formed on the substrate body, and the circuit layer 2 is arranged on the boss.

The flip chip 3 is electrically connected to the boss, and the fluorescent glue layer 4 is coated on the flip chip 3 except the bottom surface. The fluorescent glue layer 4 is located outside the boss, that is, the top of the boss faces downward. The projection surface is equal to or smaller than the projection surface of the area enclosed by the inside of the fluorescent glue layer; there is a gap between the lower surface of the fluorescent glue layer 4 and the upper surface of the substrate body 11 .

In this embodiment, since the boss is provided only for carrying the flip chip, the formed fluorescent glue layer is located outside the boss, so that there is a space of the height of the boss between the fluorescent glue layer and the substrate body 11, so , even if the fluorescent adhesive layer has downward burrs, it will not affect the close contact between the flip chip and the boss. When connecting the CSP, if the fluorescent adhesive layer is heated and expanded, the fluorescent adhesive layer will also give it room for expansion. Therefore, It solves the problem of unreliable electrical connection between the flip chip and the substrate due to the burrs in the cutting of the fluorescent adhesive layer and the heating during the welding process of the flip chip and the substrate, and makes the connection between the flip chip and the boss more firm.

Claims (10)

1. A CSP LED, comprising a substrate, a flip chip and a fluorescent adhesive layer coated on the flip chip except the bottom surface, characterized in that: the substrate includes a substrate body, and the substrate body is provided with a boss, so The boss is formed by the substrate body protruding toward the side of the flip chip, the flip chip is arranged on the boss, and the fluorescent glue layer is located outside the periphery of the boss. 2. The CSP LED according to claim 1, characterized in that: the boss is a circuit layer. 3. The CSP LED according to claim 1, characterized in that: a circuit layer is provided on the upper surface of the boss. 4. The CSP LED according to claim 1, characterized in that: the height of the boss is 0.2-0.3mm. 5. The CSP LED according to claim 1, characterized in that there is a gap between the lower surface of the fluorescent adhesive layer and the upper surface of the substrate body. 6. The CSP LED according to claim 1, characterized in that: the downward projection surface of the top surface of the boss is equal to or smaller than the projection surface of the area enclosed by the inner side of the fluorescent adhesive layer. 7. A substrate, comprising a substrate body, characterized in that: the substrate body is provided with a boss for carrying a flip chip and positioned within the inside of the flip-chip fluorescent adhesive layer, and the boss is directed toward the substrate by the substrate body A bump is formed on one side of the flip chip. 8. The substrate according to claim 7, wherein the boss is a circuit layer. 9. The substrate according to claim 7, wherein a circuit layer is provided on the boss. 10. The substrate according to claim 7, wherein the height of the boss is 0.2-0.3 mm.