CN1930322A - Hardware development to reduce bevel deposition - Google Patents

Abstract

Embodiments in accordance with the present invention relate to various techniques which may be employed alone or in combination, to reduce or eliminate the deposition of material on the bevel of a semiconductor workpiece (882). In one approach, a shadow ring (880) overlies the edge of the substrate (882) to impede the flow of gases to bevel regions. The geometric feature at the edge (880a) of the shadow ring directs the flow of gases toward the wafer in order to maintain thickness uniformity across the wafer while shadowing the edge. In another approach, a substrate heater/support is configured to flow purge gases to the edge of a substrate being supported. These purge gases prevent process gases from reaching the substrate edge and depositing material on bevel regions.

Description

Hardware equipment to reduce inclined wall deposition

related application

This nonprovisional patent application claims priority to U.S. Provisional Patent Application No. 60/550,530, filed March 5, 2004, and U.S. Provisional Patent Application No. 60/575,621, filed May 27, 2004, both of which were adopted It is incorporated herein by reference in its entirety.

technical field

The present invention relates to hardware devices for reducing sloping wall deposition.

Background technique

Integrated circuits (ICs) are fabricated by forming discrete semiconductor devices on the surface of a semiconductor substrate. Examples of such substrates are silicon (Si) or silicon dioxide (SiO ₂ ) substrates. Semiconductor devices are often fabricated on a very large scale, where thousands of microelectronic devices (eg, transistors, capacitors, etc.) are formed on a single substrate.

In order to interconnect devices on the substrate, a multi-level network interconnection structure is formed. Multiple layers of material are deposited on a substrate and selectively removed in a series of controlled steps. In this way, various conductive layers are interconnected to facilitate the propagation of electrical signals.

One way of depositing films in the semiconductor industry is chemical vapor deposition (CVD). CVD can be used to deposit various types of films including intrinsic and doped amorphous silicon, silicon oxide, silicon nitride, silicon oxynitride, and the like. Semiconductor CVD processing is generally performed in a vacuum chamber by heating precursor gases that decompose and react to form a desired film. To deposit films at low temperatures and high deposition rates, a plasma can be formed from precursor gases in the chamber during deposition. Such a process is called plasma enhanced chemical vapor deposition (PECVD).

Accurate reproduction of substrate processing is an important factor in improving productivity when manufacturing integrated circuits. To achieve consistent results across substrates and reproducible results across substrates requires precise control of various processing parameters. More specifically, manufacturing needs to obey these parameters.

In a CVD processing chamber, a substrate is typically arranged on a heated substrate support during processing. The substrate support typically includes embedded electrical heating elements for controlling the temperature of the substrate. The substrate support may additionally include channels and trenches for gases (eg, helium (He), argon (Ar), etc.) to facilitate heat transfer between the substrate support and the substrate. In addition, the substrate heater assembly may also include embedded RF electrodes for applying radio frequency (RF) bias to the substrate during various plasma enhanced processes.

During deposition processes (eg, chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), etc.), the central and peripheral regions of the substrate are exposed to different process environments. Variations in the processing environment generally result in less uniform deposition layers. For example, substrates processed on conventionally heated substrate supports often experience deposition all the way to the edge of the substrate, and deposited layers near the edge of the substrate may also have a larger thickness of. The non-uniformity of the deposited layer limits the throughput and productivity of the deposition process and the overall performance of the integrated circuit. Additionally, deposited material along the edges of the substrate can create problems with properly positioning the substrate on the robotic transport mechanism. If the substrate is not held in a predetermined position on the robotic transport mechanism, the substrate may be damaged or detached during transport, or misaligned when placed in the processing apparatus, resulting in poor processing results.

Accordingly, there is a need in the art for a substrate heater assembly for conveniently depositing a uniform layer of material on a substrate during integrated circuit fabrication in a semiconductor substrate processing system without depositing material along the edges of the substrate.

Contents of the invention

Embodiments in accordance with the present invention relate to various techniques that may be used alone or in combination to reduce or eliminate deposition of material on sloped walls of a semiconductor workpiece. In one approach, a shadow ring is positioned over the edge of the substrate to block gas flow to the sloped wall region. The geometry of the edge of the shadow ring directs the gas flow towards the wafer in order to maintain thickness uniformity across the wafer while shadowing the edge. In another approach, the substrate heater/support is configured to flow purge gas to the edge of the supported substrate. These purge gases block the process gases from reaching the edge of the substrate and depositing material on the sloped wall regions.

An embodiment of a method for chemical vapor deposition of material on a workpiece according to the present invention includes positioning a shadow ring characterized by an angled protrusion over an edge region of a substrate supported within a processing chamber, the a shadow ring extending a distance between about 0.8-2.0 mm above the edge region and separated from the edge region by a gap of about 0.0045" ± 0.003"; flowing a process gas to the chamber; and applying energy to the chamber, A plasma is generated in the chamber such that reaction of the process gas causes deposition of material outside the edge region.

Another embodiment of a method of chemical vapor deposition of a dielectric film according to the present invention comprises: positioning a substrate on a support within a processing chamber; flowing a purge gas through said support to an edge region of said substrate; a gas to the chamber; and applying energy to the chamber to generate a plasma in the chamber such that the flow of the purge gas blocks the flow of the process gas to the edge region and inhibits dielectric material in the edge region deposition in.

An embodiment of an apparatus for depositing a dielectric material on a workpiece according to the present invention includes: a vertically movable substrate support positioned within a processing chamber; an energy source configured to apply energy to the processing chamber to generate A plasma is generated in the processing chamber; a pump liner defines an exhaust orifice and a vertical channel; a shadow ring is configured to extend a distance of about 0.8-2.0 mm above the edge region and when the substrate supports A raised portion separated from the edge region by a gap of about 0.0045" ± 0.003" when engaged with the shadow ring.

A further understanding of the embodiments according to the present invention can be made by referring to the following detailed description in conjunction with the accompanying drawings.

Description of drawings

FIG. 1 is a top view of an exemplary semiconductor processing system. The processing system includes a pair of deposition chambers housing the processing kit of the present invention.

2 is a cross-sectional view of an illustrative deposition chamber for comparison. The chambers of Figure 2 are twin chambers or series chambers. However, it should be understood that the processing kits described herein can be used in a single chamber design.

Fig. 3 is a partial sectional view of a general chamber main body. The chamber body is shown schematically for the purpose of showing the gas flow path. Arrows show the primary and parasitic airflow paths within the chamber.

Figure 4 is a perspective view of a portion of a deposition chamber. The chamber body is configured to define the substrate processing area and to support various liners. A wafer slit valve with a wafer passing slit can be seen in the chamber body.

FIG. 5 shows a partially cut away perspective view of the illustrative deposition chamber of FIG. 4 . Visible in Figure 5 is the top pad, or "pump pad", supported by the surrounding C-groove pads.

Figure 6 shows the chamber body of Figure 5, highlighting two exposed areas in a partially cut away view. These two cross-sectional areas are labeled Area 6A and Area 6B.

FIG. 6A is an enlarged view of the cross-sectional area 6A in FIG. 6 . Similarly, FIG. 6B is an enlarged view of the cross-sectional area 6B. The top liner and supporting C-slot liner are visible in each figure.

FIG. 7 is an exploded view of the chamber body of FIG. 4 . In this figure, the individual pads of the treatment kit in one embodiment can be more clearly identified.

8A is a simplified cross-sectional view of an embodiment of a shadow ring positioned on a pump pad and matingly engaged with a substrate support in accordance with the present invention.

8B is a simplified perspective view, partially cut away, of the shadow ring of FIG. 8A.

Figure 8C is a simplified top view of the shadow ring of Figure 8A.

8D is a simplified enlarged perspective view of a portion of the shadow ring of FIG. 8A.

8E-8F are simplified top views illustrating dimensions of one embodiment of a shadow ring according to the present invention for use with a substrate having a diameter of 300 mm.

8G-8H are simplified cross-sectional views illustrating other dimensions of the embodiment of the shadow ring shown in FIGS. 8E-8F.

Figure 9A plots the average thickness and uniformity of a batch of 25 wafers processed using the shadow rings of Figures 8A-8H.

Figure 9B plots the sum of different size particle contaminations for the lot of wafers of Figure 9A.

Figure 9C plots the thickness of the deposited film versus the distance from the center of the wafer of Figure 9A.

10AA-10EA are simplified schematic illustrations of shadow rings having different compositions and shapes.

10AB-10EB plot the relationship between the deposited film thickness and the radial distance of the shadow ring of FIGS. 10AA-10EA, respectively.

11A is a simplified cross-sectional view of another alternative embodiment of a shadow ring positioned within a pump liner in accordance with the present invention.

11B is a simplified perspective view, partially cut away, of the shadow ring of FIG. 11A.

12A is a simplified cross-sectional view of an alternative embodiment of a shadow ring positioned within a pump liner and matingly engaged with a substrate support in accordance with the present invention.

12B is a perspective view of the shadow ring of FIG. 12A.

Figure 12C plots the relationship between deposited material thickness and radial distance of the shadow ring of Figure 12A.

Figure 13 is a simplified cross-sectional view of an alternative embodiment of a shadow ring in accordance with the present invention.

14A is a simplified cross-sectional view of a heater featuring an edge purge gas system in accordance with an embodiment of the present invention.

14B is a simplified enlarged cross-sectional view of the heater of FIG. 14A.

Figure 14C plots deposited film thickness versus position for a substrate characterized by nitrogen edge purge gas flow.

Figure 14D plots deposited film thickness versus position for a substrate featuring a helium purge gas.

15A-15F are simplified cross-sectional views of process steps for forming polysilicon features on a substrate.

15BA-15DA and 15FA are cross-sectional electron micrographs of various steps used to form polysilicon features.

Detailed ways

Reliable formation of high aspect ratio features at desired critical dimensions requires precise patterning and subsequent etching of the substrate. A technique sometimes used to form more precise patterns on a substrate is photolithography. This technique generally involves directing light energy through a lens or "reticle" and onto the substrate.

In a conventional photolithography process, a photoresist material to be etched is first applied to a substrate. For optical resists, the resist material is sensitive to radiation or "light energy" such as ultraviolet or laser sources. The resist material preferably represents a polymer that can be tuned to the particular wavelength of light or different exposure sources used.

After the resist is deposited on the substrate, the light source is activated to emit ultraviolet (UV) light or low X-ray light, which is directed, for example, onto the substrate covered by the resist. The selected light source chemically alters the composition of the photoresist material. However, only the photoresist layer is selectively exposed. Thus, a photomask or "reticle" is positioned between the light source and the substrate being processed.

The photomask is patterned to contain the desired feature configuration for the substrate. A patterned photomask allows transmission of light energy onto the substrate surface in a precise pattern. The exposed underlying substrate material can then be etched, forming patterned features on the substrate surface, while the remaining resist material remains as a protective coating for the unexposed underlying substrate material. In this way, contacts, vias or interconnections can be precisely formed.

The material underlying the developed photoresist film may include various materials such as silicon dioxide (SiO ₂ ) and carbon-doped silicon oxide. Dielectric anti-reflective coatings (DARCs ₎ may also underlie the developed photoresist film, and such DARCs may include silicon oxynitride (SiON) and silicon nitride ( _Si3N4 ). Hafnium dioxide ( _HfO2 ) may also be present underneath the developed photoresist film.

Recently, Applied Materials of Santa Clara, California has developed an effective carbon-based membrane. This film is called Advanced Patterning Film ^™ (or APF). APF ^TM typically includes a film of SiON and amorphous carbon (or alpha carbon).

Details regarding the formation of APF ^™ membranes can be found in US Patent No. 6,573,030, which is incorporated herein by reference in its entirety. Details regarding the use of APF ^™ films to form gate structures for field effect transistors (FETs) can be found in Published US Patent Application No. 2004/0058517, which is incorporated herein by reference in its entirety. A processing kit for depositing APF ^™ films can be found in co-pending US nonprovisional patent application Ser. No. 10/322,228, filed December 17, 2002, which is hereby incorporated by reference in its entirety.

Amorphous carbon layers are typically deposited by plasma enhanced chemical vapor deposition (PECVD) of a gas mixture comprising a carbon source. The gas mixture can be formed from a carbon source that is a liquid precursor or a gaseous precursor. Preferably, the carbon source is a gaseous hydrocarbon. For example, the carbon source may be propylene (C ₃ H ₆ ). The injection _{of C3H6} is accompanied by the generation of RF plasma within the process chamber. The gas mixture may further include a carrier gas such as helium (He) or argon (Ar). The carbon-containing layer can be deposited to a thickness between about 100 Angstroms and about 20,000 Angstroms as desired.

Deposition of carbon-based (or organic) films such as APF ^™ , silicon oxycarbide, or DARC at high deposition rates (e.g., at deposition rates greater than 2,000 Angstroms/minute) can result in non-uniformity over the sloped wall regions of the wafer deposition (compared to central wafer area). If not completely removed by the subsequent _O2 ashing step, extra material on the edge of the wafer may flake off, causing wafer contamination. Thus, formation of carbon-containing films such as APF( ^TM ) by PECVD is preferably achieved with embodiments of the shadow ring according to the present invention.

15A-15F illustrate simplified cross-sectional views of processing steps for forming polysilicon features on a substrate. 15BA-15FA show cross-sectional electron micrographs of various steps used to form polysilicon features.

As shown in FIG. 15A , a polysilicon layer 1500 is first deposited on a substrate 1502 with a thickness of 2000 angstroms. Polysilicon layer 1500 will be patterned into features using photolithographic techniques as described below. During this subsequent photolithography process, the polysilicon layer 1500 is expected to support an amorphous carbon (α-C) layer 1504 and a dielectric antireflective coating (DARC) 1506 comprising silicon oxynitride.

Amorphous carbon layer 1504 serves as a hard mask and may also serve as an anti-reflective coating. The DARC1506 is used to conveniently focus the incident light during photolithography processing to a precise depth of field. Both the alpha-C layer 1504 and the DARC layer 1506 are deposited using chemical vapor deposition techniques. Also, as described further below, CVD of both the α-C layer 1504 and the DARC layer 1506 results in the formation of additional thicknesses of material in the sloped wall region of the wafer, which may in turn lead to contamination and other problems.

As further shown in FIG. 15A , undeveloped photoresist material 1508 is then spin-coated on DARC 1506 . 15B-15BA illustrate resist exposure and development steps in which selected portions of undeveloped photoresist material 1508 are exposed to incident radiation, followed by chemical development, resulting in the formation of patterned photoresist 1510 .

Figures 15C-15FA illustrate a further step in the process in which the developed photoresist 1510 is trimmed (Figures 15C-15CA), removing portions of the DARC 1506 not masked by the photoresist 1510 (Figures 15D-15DA), removing Resist 1510 and DARC 1506 mask portions of alpha-C layer 1504 (FIG. 15E). 15F-15FA illustrate the final steps in the process in which the developed photoresist is removed and the portion of the polysilicon layer 1500 not masked by the remaining DARC 1506 and α-C layer 1504 is removed until it stops on the substrate 1502, which This results in the formation of polysilicon feature 1512 .

In the initial stages of the process shown in and described in connection with FIG. 15A, a-C layer 1504 and DARC layer 1506 are created using plasma assisted CVD techniques. The deposition process for these two layers results in an additional thickness of material on the sloped wall region of the wafer. Deposition of these materials on the sloped walls of the wafer can cause contamination and other problems.

Accordingly, embodiments of the present invention relate to techniques that may be used to reduce or eliminate material deposition on sloped walls of a semiconductor workpiece. In one approach, a shadow ring is positioned on the edge of the substrate to block gas flow to the sloped wall region. Sloped geometric features on the edge of the shadow ring direct the gas flow towards the wafer to maintain a uniform thickness across the wafer while shadowing the wafer. In another approach, the substrate heater/support is configured to flow purge gas to the edge of the supported substrate. These purge gases block the process gases from reaching the edge of the substrate and depositing material on the sloped wall regions. Exemplary Processing System

FIG. 1 is a top view of an exemplary semiconductor processing system 100 . The processing system 100 includes a processing chamber 106 that receives a processing kit of the present invention, as described below. Illustrative chambers 106 are arranged in pairs to further increase processing throughput.

System 100 generally includes a number of distinct areas. The first area is the front bench area 102 . The front end table area 102 supports wafer cassettes 109 to be processed. The wafer cassette 109 in turn supports a substrate or wafer 113 . A front-end wafer handling device 118, such as a robot arm, is mounted on a stage adjacent to the pod turntable. Next, the system 100 includes a load chamber 120 . Wafers 113 are loaded into or unloaded from the load chamber 120 . Preferably, the front-end wafer handler 118 includes a wafer mapping system to mark the substrates 113 in each cassette 109 in preparation for loading the substrates 113 into cassettes arranged in the load chamber 120 . Next, the transfer chamber 130 is provided. The transfer chamber 130 accommodates a wafer handling device 136 that handles the substrate 113 received from the load chamber 120 . The wafer handler 136 includes a robot assembly 138 mounted on the bottom of the transfer chamber 130 . Wafer handler 136 transfers the wafer through sealed channel 136 . A slit valve actuator 134 actuates a sealing mechanism for passage 136 . Channel 136 cooperates with wafer channel 236 in processing chamber 140 (shown in FIG. 2 ) to allow substrate 113 to enter the processing region for positioning on a wafer heater pedestal (shown at 228 in FIG. 2 ).

The backend 150 is configured to accommodate various supporting facilities (not shown) required by the operating system 100 . Examples of such facilities include gas panels, switchboards, and generators. The system can be modified to accommodate various processes such as CVD, PVD and etch and support its chamber hardware. The examples described below are for a system employing a 300 mm APF deposition chamber. However, it should be understood that other process and chamber configurations are also contemplated by the present invention.

Exemplary processing chamber

FIG. 2 shows a schematic cross-sectional view of a deposition chamber 200 for comparison. The deposition chamber is a CVD chamber for depositing carbon-based gas species such as a carbon-doped silicon oxide sublayer. This figure is based on the characteristics of the Producer S(R) APF chamber currently manufactured by Applied Materials. The Producer(R) CVD chamber (200mm or 300mm) has two isolated process areas that can be used to deposit carbon-doped silicon oxide and other materials. A chamber with two isolated processing regions is described in US Patent No. 5,855,681, which is hereby incorporated by reference in its entirety.

Chamber 200 has a body 212 defining an interior chamber region. Separate treatment areas 218, 220 are provided. Each chamber 218 , 220 has a pedestal 228 for supporting a substrate (not shown) in the chamber 200 . Base 228 generally includes a heating element (not shown). Preferably, a base 228 is movably arranged in each treatment area 218 , 220 by a rod 226 extending through the bottom of the chamber body 212 and connected to the drive system 203 at the bottom of the chamber body 212 . Internally movable lift pins (not shown) are preferably provided in the base 228 to engage the lower surface of the substrate. Preferably, a support ring (not shown) can also be disposed above the base 228 . The support ring may be part of a multi-component substrate support assembly including a cover ring and a capture ring. Lift pins act on the ring to receive the substrate prior to processing, or to lift the substrate after deposition for transfer to the next stage.

Each processing region 218 , 220 also preferably includes a gas distribution assembly 208 disposed through the chamber lid 204 to deliver gases into the processing region 218 , 220 . The gas distribution assembly 208 for each processing zone generally includes gas inlet passages 240 that deliver gas into a showerhead assembly 242 . The showerhead assembly 242 includes an annular base plate 248 having a baffle plate 244 disposed in the middle of a face plate 246 . The showerhead assembly 242 includes a plurality of nozzles (shown schematically at 248 in FIG. 2 ) through which the gas mixture is sprayed during processing. Nozzles 248 direct gases (eg, propylene and argon) down over the substrate, thereby depositing an amorphous carbon film. An RF (radio frequency) feedthrough provides a bias potential to showerhead assembly 242 to facilitate plasma generation between faceplate 246 and heater pedestal 228 of showerhead assembly 242 . The pedestal 228 may serve as a cathode for generating an RF bias within the chamber wall 212 during a plasma enhanced chemical vapor deposition process. The cathode is electrically coupled to an electrode power supply to generate a capacitive electric field in the deposition chamber 200 . Typically, an RF voltage is applied to the cathode while the chamber body 212 is electrically grounded. Electrical energy applied to pedestal 228 generates a substrate bias in the form of a negative voltage on the upper surface of the substrate. This negative voltage is used to attract ions from the plasma formed in the chamber 200 to the upper surface of the substrate. The capacitive electric field creates a bias that accelerates the induced plasma particles toward the substrate to impart vertically oriented anisotropy to film formation during deposition and substrate etching during cleaning.

FIG. 3 shows a simplified cross-sectional view of the substrate support of an exemplary Producer(R) reactor as processing chamber 200 . The images in Figure 3 are simplified for illustrative purposes and are not drawn to scale.

The support pedestal 228 includes a substrate heater assembly 348 , a base plate 352 , and a backside assembly 354 . Backside assembly 354 is coupled to substrate bias voltage source 322 , controlled heater power supply 338 , and backside gas source 336 (eg, helium (He) source) and to lift pin mechanism 356 . The support pedestal 228 supports the substrate 312 and controls the temperature and bias of the substrate during substrate processing. Substrate 312 is typically a standardized semiconductor wafer, such as a 200mm or 300mm wafer.

Substrate heater assembly 348 includes a main body (heater member 332 ), which also includes a plurality of embedded heating elements 358 , a temperature sensor (eg, thermocouple) 360 , and a plurality of radio frequency (RF) electrodes 362 .

Embedded heating element 358 is coupled to heater power supply 338 . A temperature sensor 360 monitors the temperature of the heater member 332 in a conventional manner. The measured temperature is used in a feedback loop to regulate the output of heater power supply 338 .

Embedded RF electrodes 362 couple source 322 to substrate 312 and to the plasma of the process gas mixture in the reaction zone. Source 322 generally includes RF generator 324 and matching network 328 . Generator 324 is typically capable of generating up to 5000W of continuous or pulsed power at frequencies ranging from about 50kHz to 13.6MHz. In other embodiments, generator 324 may be a pulsed DC power generator.

The temperature of the substrate 312 is controlled by stabilizing the temperature of the heater member 332 . In one embodiment, helium gas from gas source 336 is provided via gas line 366 to a groove (or, alternatively, a positive dimple) 350 (shown in phantom below FIG. The heater member 332 is formed below the substrate 312 . Helium provides heat transfer between the heater member 332 and the substrate 312 and facilitates uniform heating of the substrate. Using such thermal control, substrate 312 may be maintained at a temperature between about 200°C and 800°C.

FIG. 4 is a perspective view of a portion of a deposition chamber 400 . Deposition chamber 400 includes processing kit 40 in one embodiment of the present invention. The chamber body 402 is configured to define a substrate processing area 404 and is used to support the various liners of the processing suite 40 . Wafer slots 406 are visible in chamber body 402 and define slots through which wafers pass. In this manner, substrates may be selectively moved into and out of chamber 400 . The substrate is not shown inside the hollow chamber. The slit 406 is selectively opened and closed by a gate device (not shown). The door arrangement is supported by the chamber wall 402 . The door isolates the chamber environment during substrate processing.

The chamber body 402 is preferably fabricated from alumina or other ceramic compound. Ceramic materials are preferred because of their low thermal conductivity properties. Chamber body 402 may be cylindrical or otherwise shaped. The exemplary body 402 of FIG. 4 has a polygonal outer profile, and a circular inner diameter. However, the present invention is not limited to any particular configuration or size of processing chamber.

As noted, the body 402 is configured to support a series of pads and other interchangeable treatment components. These processing components may generally be disposable and provided as part of a "processing kit" 40 specific to a particular chamber application or configuration. Process kits include top pump gaskets, middle gaskets, lower gaskets, gas distribution plates, gas diffuser plates, heaters, showerheads, or other components. Some pads may be integrally formed; however in some applications it may be preferable to provide separate pads stacked together to allow for thermal expansion between the pads. Figure 7 is a perspective view of a treatment kit 40 in one embodiment. The liners and other devices of the processing kit 40 are shown in exploded form above the deposition chamber 400 . The chamber 400 of Figure 7 will be discussed in more detail below.

FIG. 5 shows a partially cut away perspective view of the illustrative deposition chamber 400 of FIG. 4 . The geometry of the chamber body 402 can be more easily seen, which includes sides 408 and a bottom 409 of the body 402 . An opening 405 is formed in a side 408 of the chamber body 402 . The opening 405 serves as a channel for receiving a process gas during a deposition process, an etching process, or a cleaning process.

The substrate is not shown in the hollow chamber 404 . However, it is understood that the substrate is supported within the hollow chamber 404 on a pedestal, such as the pedestal 228 of FIG. 2 . The base is supported by a shaft extending through an opening 407 in the bottom 409 of the body 402 . Additionally, it will be appreciated that chamber 400 is provided with a gas handling system (not shown in FIG. 5 ). An opening 478 is provided in illustrative chamber 400 for receiving gas conduits. Pipes deliver the gas to gas boxes (see 472 in Figure 7). Gas is passed from the cylinder into chamber 404 .

Certain components of the processing kit 40 for the deposition chamber are visible in FIGS. 4 and 5 . These components include a top pumping gasket 410 , a supporting C-slot gasket 420 , a middle gasket 440 and a bottom gasket 450 . As indicated, these pads 410, 420, 440 and 450 will be shown below in connection with FIG. 7 and will be described in more detail. Sealing member 427 is provided at the interface of C-slot liner 420 and pump port liner 442, and at the interface of pump liner 410 and pump port liner 442, which will also be shown in more detail below in connection with FIG. 6A. described.

FIG. 6 shows another perspective view of the chamber body 402 of FIG. 5 . Reference numerals in Figure 5 are repeated in some cases. Figure 6 is used to emphasize the two regions exposed by the cutaway view. The two cross-sectional areas are area 6A and area 6B. The features of chamber 400 shown in regions 6A and 6B can be seen more clearly in the respective enlarged cross-sectional views of FIGS. 6A and 6B . These features will be described in detail below.

FIG. 7 provides an exploded view of chamber body portion 400 . In this case, the chamber body 400 represents a series processing chamber. An example is the Producer S chamber manufactured by Applied Materials. Various components of the processing kit 40 can be seen removed from the processing area 404 to the right of the main body 402 .

The first item of equipment visible in the view of FIG. 7 is the top cover 470 . A top cover 470 is centrally located inside the processing area 404 and protrudes through a chamber cover (not shown). The top cover 470 serves as a plate to support some gas transfer device. This apparatus includes a gas cylinder 472 which receives gas through a gas supply line (not shown). (The tubing is inserted through the opening 478 in the bottom 409 of the chamber body 402, as shown in Figure 5). The gas cylinder 472 supplies gas to the gas input port 476 . The gas input port 476 defines an arm that extends all the way to the center of the top cover 470 . In this way, process gases and cleaning gases can be centrally introduced into the process region 404 above the substrate.

RF power is supplied to gas cylinder 472 . This is used to generate plasma from the process gas. A constant voltage gradient 474 is provided between the gas cylinder 472 and the gas inlet 476 . A constant voltage gradient 474 (CVG) controls the power level as the gas moves from the cylinder 474 to the grounded base within the processing area 404 .

Immediately below the top cover 470 is a baffle plate 480 . The baffle plate 480 defines a plate concentrically positioned below the top cover 470 . The blocking plate 480 includes a plurality of bolt holes 482 . The bolt holes 482 serve as through openings through which screws or other connectors may be placed for securing the blocking plate 480 to the top cover 470 . A certain spacing is selected between the barrier plate 480 and the top cover 470 . During processing, gases are distributed into this compartment and then passed through the barrier plate 480 through a plurality of holes 484 . In this way, process gases may be uniformly delivered into the process region 404 of the chamber 400 . The barrier plate 480 also provides a high voltage drop for the gas as it diffuses.

Below the barrier plate 480 is a shower head 490 . The spray head 490 is placed concentrically under the top cover 470 . Showerhead 490 includes a plurality of nozzles (not shown) for directing gas down to a substrate (not shown). Faceplate 496 and spacer ring 498 are secured to showerhead 490 . Isolation ring 498 electrically isolates showerhead 490 from chamber body 402 . Spacer ring 498 is preferably made of a smooth and relatively heat resistant material such as Teflon or ceramic.

Disposed below the showerhead 490 is a top gasket or “pump gasket” 410 . In the embodiment of FIG. 7 , the pumping gasket 410 defines a circumferential body having a plurality of pumping holes 412 arranged therearound. In the configuration of Figure 7, the pump holes 412 are equally spaced. During wafer processing, a vacuum is drawn from the backside of top pad 410, drawing gas through pump holes 412 into channel region 422 (more clearly seen in FIGS. 6A and 6B). The pump holes 412 provide the primary flow path for the process gas, as shown in the schematic diagram of FIG. 3 .

Turning to the enlarged cross-sectional views of FIGS. 6A and 6B , features of the top gasket 410 can be seen more clearly. FIG. 6A provides an enlarged view of the cross-sectional area 6A of FIG. 6 . Likewise, FIG. 6B provides an enlarged view of area 6B of FIG. 6 . The pump liner 410 is visible in each of these magnifications.

The pump liner 410 defines a circumferential body 410' and serves to hold a plurality of pump ports 412. In the configuration of Fig. 7, the pump gasket 410 includes an upper lip 414 on the upper surface area and a lower shoulder 416 along the lower surface area. In one aspect, upper flange 414 extends outwardly from a radius of top gasket 410 and lower shoulder 416 extends radially inward. The upper flanges 414 are arranged along a circumference. For this reason, the upper flange 414 is visible in both Figures 6A and 6B. However, the lower shoulder 416 does not circumferentially surround the top gasket 410 but leaves an opening in the region of the upper pump port gasket 442 .

Turning to FIG. 4 , the chamber 400 includes a circumferential groove liner 420 . In the configuration of Figure 7, the liner 420 has an inverted "C" shaped profile. In addition, the liner 420 includes a groove portion 422 . For these reasons, liner 420 is referred to as a "C-slot liner". The inverted "C"-shaped configuration can be seen more clearly in the enlarged cross-sectional view of Figure 6B.

Referring again to FIG. 6B , the C-slot liner 420 has an upper arm 421 , a lower arm 423 , and an intermediate inner body 422 . The upper arm 421 has an upper shoulder 424 formed therein. Upper shoulder 424 is configured to support upper flange 414 of pump pad 410 . Meanwhile, the lower arm 23 is configured to support the lower shoulder 416 of the top pad 410 . The interlocking configuration of the top liner 410 and the C-groove liner 420 provides a tortuous interface that greatly reduces unwanted parasitic pumping. Thus, as gas is expelled from the processing region 404 of the chamber 400 through the pump holes 412 of the pump gasket 410, the gas preferentially dissipates through the groove portion 422 of the C-groove gasket 420 rather than in the top gasket 410 and C-shaped gasket 410. The interface between slot liners 420 is lost.

It should be noted that the interlocking relationship between the upper flange 414 of the pump gasket 410 and the upper shoulder 424 of the C-slot gasket 420 is illustrative only. Likewise, the interlocking relationship between the lower shoulder 416 of the pump liner 410 and the lower flange 426 of the C-slot liner 420 is also illustrative only. In this regard, any interlock structure included between the pump liner 410 and the C-groove liner 420 to inhibit parasitic pumping of process, cleaning, or etch gases is within the scope of the present invention. For example, and not limitation, both upper flange 414 and lower shoulder 416 of pump gasket 410 may be configured to extend outwardly from a radius of top gasket 410 . In such a configuration, the lower flange 426 of the C-slot liner 420 can be reconfigured to interlock with the lower shoulder 416 of the pump liner 410 .

In the treatment kit configuration of FIGS. 6A , 6B and 7 , the upper shoulder 424 is arranged along the circumference of the upper arm 421 . For this reason, upper shoulder 424 is visible in both Figures 6A and 6B. However, the lower flange 426 does not circumferentially surround the C-slot liner 420 , which still leaves an opening in the region of the upper pump liner 442 . Accordingly, the radial portion is left open to form the pump port gasket opening 429 .

As shown in the cutaway perspective view provided in FIG. 6 , regions 6A and 6B show opposite ends of chamber 400 . The cross-sectional ends of region 6A include gas exit ports, referred to as "pump port pads" 442,444. The upper pump port liner is disposed below the slot portion 422 of the C-shaped slot liner 420 . The lower pump port gasket 444 is then placed in fluid communication with the upper port gasket 442 . The gas may then exit the lower pump port liner 444 and exit the process chamber 400 through an exhaust system.

To further limit parasitic pumping in the region of the pump port liners 442, 444, sealing members 427 are provided at the interface between the C-groove liner 420 and the upper pump port liner 442 and between the top liner 410 and the upper pump port liner. interface between port pads 442 . The sealing member is visible at 427 in both Figures 7 and 6B. Preferably, the sealing member 427 defines a ring around the upper pumping gasket 442 . Sealing member 427 is preferably fabricated from Teflon or other material that includes a highly polished surface. The sealing member 427 also enables the C-slot liner 420 to interlock with the pump ports 442, 444, limiting gas leakage.

Referring again to FIG. 7 , the intermediate liner 440 is then disposed below the C-slot liner 420 . The middle liner 440 is located at the same height as the slot 432 in the processing area 404 . As can be seen in Figure 7, the middle pad 440 is a C-shaped pad, rather than annular. The open area in the intermediate gasket 440 is configured to receive the wafer as it is input into the processing chamber 400 . A middle liner 440 is partially visible in FIGS. 6A and 6B , which underlies the C-slot liner 420 and the top liner 410 .

The bottom pad 450 is also visible in FIG. 7 . In the configuration of FIG. 7 , the bottom gasket 450 is disposed below the middle gasket 440 in the chamber 400 . Bottom liner 450 is located between middle liner 44 and bottom surface 409 of chamber 400 .

It should be noted that it is also possible within the scope of the present invention to employ treatment kits in which the pads of choice are integral with each other. For example, the middle pad 440 may be integrally formed with the bottom pad 450 . Similarly, top gasket 410 may be integral with C-slot gasket 420 . However, preferably, the individual pads (eg, pads 410, 420, 440, and 450) remain separate. This greatly reduces the risk of cracks caused by thermal expansion during heat treatment. The use of separate but interlocking pump liners 410 and C-slot liners 420 provides an improved, novel configuration for chamber processing suites.

Additional treatment kit products seen in FIG. 7 include a filler member 430 and a pressure balance port gasket 436 . A filler member 430 is placed adjacent to the middle gasket 440 and the bottom gasket 450 to fill the space between the outer diameters of these gaskets 440 , 450 and the surrounding chamber body 402 . The presence of the packing member 430 helps to direct the collection of carbon residue behind the liners 440 , 450 by preventing carbon residue from forming behind the liners 440 , 450 .

It should be noted that, similar to the intermediate liner 440, the filler member 430 is not completely circular. In this aspect, an open portion remains in the packing member 430 to provide fluid communication between the two process chambers 404 . The pressure balance port gasket 436 controls fluid communication between the two processing regions 404 by defining a sized orifice. The presence of the pressure balance port gasket 436 ensures that the pressure between the two processing regions 404 remains the same.

It should be noted at this point that packing member 430, pressure balance port gasket 436, upper pump port gasket 442 and lower pump port gasket 444 are preferably coated with a highly smooth material. An example is a bright aluminum coating. Other materials provided with very smooth surfaces (eg, less than 15Ar) help to reduce the deposition that builds up on the surface. Such smooth materials can be polished aluminum, polymer coatings, Teflon, ceramic and quartz.

To further help reduce deposits on chamber components, a slit valve liner 434 is provided along the slit 432 . The slot liner 434 is also preferably fabricated from a highly smooth material such as those mentioned above.

Preferably, the processing region 404 is heated during the deposition process or the etch process. For this purpose, the heater is provided with a base for supporting the wafer. The heater base is visible at 462 in the chamber structure 400 of FIG. 7 . More preferably, the heater is energized to a temperature above 110°C during the plasma cleaning process. Optionally, ozone can be used as the cleaning gas since ozone does not require plasma decomposition. Without the use of ozone, it is more desirable to heat the chamber body, thereby increasing the cleaning rate.

Referring again to FIG. 7 , a base assembly 460 is provided. Base assembly 460 is used to support the substrate during processing. Base assembly 460 includes not only heater plate 462 but also shaft 468 , pin lifter 464 and lift ring 466 disposed thereabout. Pin lifters 464 and lift rings 466 help selectively lift wafers above heater plate 462 . Pin holes 467 are disposed in heater plate 462 to receive lift pins (not shown).

It should be understood that the AFP ^™ chamber 400 of FIG. 7 is illustrative, and that the modifications of the present invention are feasible in any deposition chamber capable of PECVD. Accordingly, other embodiments of the invention may also be provided. For example, pump liner 410 may have a smaller inner diameter than C-slot liner 420 . Reducing this size of the top pump gasket 410 serves to reduce the inner diameter of the pump port 405 , thereby increasing the velocity at which gas moves out of the inner chamber 404 and through the pump port 405 . The increased speed is desirable because it reduces the chance of carbonaceous residues accumulating on chamber surfaces. It is also desirable for the liner to be fabricated from a material with a highly smooth surface. This serves to reduce the build-up of amorphous carbon deposits on the surface. Examples of such materials also include polished aluminum, polymer coatings, Teflon, ceramic, and quartz.

It should also be noted that carbon accumulates faster on cooler surfaces than on warmer surfaces. Because of this phenomenon, carbon tends to accumulate preferentially in the pumping system connected to the deposition chamber. The pumping system is preferably heated to a temperature above 80°C to reduce this preferential accumulation. Alternatively or additionally, a cold trap can be integrated into the pumping system to collect unreacted carbon by-products. The cold trap can be cleaned or replaced at normal maintenance intervals.

shadow ring

The processing suite of FIGS. 1-7 described above may be modified in accordance with embodiments of the present invention to feature a shadow ring for inhibiting deposition of material on sloped wall portions of a semiconductor workpiece.

8A shows a simplified cross-sectional view of an embodiment of a treatment kit featuring a shadow ring embodiment in accordance with the present invention. 8B shows a simplified perspective view, partially cut away, of the shadow ring of FIG. 8A. Figure 8C shows a simplified top view of the processing kit of Figure 8A. Figure 8D shows a simplified enlarged perspective area view of the shadow ring of Figure 8A.

As shown in FIGS. 8A-8D , shadow ring 880 includes a protruding portion 880a that extends a lateral distance X above the edge of wafer 882 supported on heater/support 828 including embedded electrode 862 . Shadow ring 880 is configured such that protruding portion 880a is separated from wafer 882 by a vertical distance Y.

The upper surface of heater/support 828 centrally defines a recessed heater 828b configured to receive end-positioned wafer 882 . A detailed description of an embodiment of a "tight pocket" heater ("TP Htr") design can be found in nonprovisional U.S. Patent Application No. 10/864,054, filed October 10, 2003, which The patent is hereby incorporated by reference in its entirety.

The edge of the upper surface of heater/support 828 defines a recess 828a configured to receive a vertical protrusion 880c protruding from the underside of ring 880 . The cooperation between the vertical protrusion 880c and the indentation 828a facilitates the alignment of the shadow ring on the heater/support 828 .

The heater/support 828 also features a protrusion 880d protruding from its edge in a horizontal direction. The improved pump gasket 810 defines a channel 810a configured to receive the protrusion 88Od, thereby allowing movement of the shadow ring 880 in a vertical direction.

Specifically, wafer 882 is initially loaded onto heater/support 828 with dimples 828b ensuring specific positioning of the wafer thereon. Next, the heater/support 828 is raised so that the recess 828a engages and mates with the vertical protrusion 880c on the underside of the shadow ring 880, thereby ensuring proper alignment between the shadow ring and the wafer positioned in the well.

Once the wafer heater/support has been raised to the processing position, gases flow into the chamber through the upper showerhead (not shown) and reaction by-products are exhausted through an orifice (not shown) in the modified pump pad 810 .

When the deposition is complete, the wafer heater/support 828 is lowered and the projection 880d of the shadow ring 880 rests on the ledge defined by the bottom of the vertical channel defined by the pump pad 810 . Once disengaged from the shadow ring 880, the wafer heater/support continues lowering to allow the wafer to be transferred to the next processing stage.

Chemical vapor deposition of AFP ^™ and other materials can occur with the formation of an energized plasma. Presence of such a plasma in the process chamber may create a sufficient potential difference between the wafer and the overlying shadow ring to cause an arcing event that may damage the wafer.

Accordingly, embodiments of the shadow ring of the present invention should be designed to balance the need to avoid sloping wall deposits with the need to minimize such arcing events. 8E-8F are simplified top views illustrating various dimensions (in inches) of one embodiment of a shadow ring for depositing APF ^™ material on a 300 mm diameter substrate in accordance with the present invention. 8G-8H are simplified cross-sectional views illustrating dimensions of the embodiment of the shadow ring of FIGS. 8E-8F.

Typically, deposition of APF ^™ material involves applying RF power to the chamber of about 800-1200W for 200mm diameter wafers and 1400-1800W for 300mm diameter wafers. The lateral protrusion distance X may range between about 0.8-2.0 mm, and the vertical separation distance Y may be 0.0045"±0.003". The exact ideal size range may vary for other embodiments of shadow rings configured to inhibit the deposition of material on the sloped walls of the wafer under different circumstances.

Figure 9A plots the average thickness and uniformity of a batch of 25 wafers supporting an APF ^™ layer deposited using an embodiment of a shadow ring according to the present invention. Figure 9A illustrates these properties of materials deposited using the apparatus of Figure 9A so as to remain consistent across wafers.

Figure 9B plots the sum of particle contamination of two different sizes for the batch of wafers of Figure 9A. Figure 9B shows that the use of a shadow ring does not result in significant contamination of the wafer.

Figure 9C plots the relationship between deposited film thickness and distance from the center of the wafer of Figure 9A. Figure 9 shows that a reduced thickness of material deposited at the edge of the wafer is observed compared to a Best Known Method (BKM) deposition apparatus lacking a shadow ring.

Shadow ring embodiments according to the present invention may take on various shapes, may be constructed of different materials or held in different electrical states. The table below summarizes the results of depositing a dielectric anti-reflective coating (DARC) of silicon oxynitride on a 300mm diameter wafer using a shadow ring having the physical properties shown in the simplified cross-sectional views in Figures 10AA-10AE.

DARC materials are formed by plasma-assisted chemical vapor deposition including silane, _N2O , and helium. 10AB-10EB plot the thickness of deposited material versus the radial distance of the deposition ring of FIGS. 10AA-10EA, respectively.

surface Shadowing Ring Diagram 10AA 10BA 10CA 10DA 10EA X-heat (mil) 53 53 73 73 873 Distance from Center of Wafer to Start of Protrusion - Cold (mil) 7716 7716 7665 7665 7665 Shadow Ring Components Anod.Al Anod.Al Anod.Al Al ₂ O ₃ Al ₂ O ₃ Prominent inclination (degrees) +10 -10 +10 +10 +90 Thickness of SiONDARC deposited at radial distance (mm) -99.8 20 116 15 0 0 -98.9 116 202 46 14 117 -98.0 392 304 373 174 338 -97.1 441 382 431 399 469 -96.2 467 437 461 445 559 +96.2 454 408 424 461 463 +97.1 426 350 349 436 328 +98.0 362 267 20 382 72 +98.9 20 166 11 56 0 +99.8 0 0 0 11 0 Line scan average thickness (Angstroms) (not including 3mm edge) 508 508 508 504 714 Standard deviation/mean (%) (not including 3mm edge) 2.1 3.6 3.1 2.3 4.7 (max-min)/2 ^* average(%)(all points) 49.4 51.7 50.5 51.6 53.5 (Maximum-Minimum)/2 ^* Average(%)(excluding 3mm edge) 8.8 16.3 16.3 11.0 18.8

Anod.Al = grounded anodized aluminum

Al ₂ O ₃ = aluminum oxide

This table and Figures 10AB-10EB show that the highest average uniformity of deposited DARC layers was obtained using the angled anodized aluminum shadow ring of Figure 10AA, which extended the shortest distance (53 mils) over the wafer perimeter. A simple experiment of reversing this shadow ring design (FIG. 10BA) resulted in increased inhomogeneity of the deposited material.

Utilizing a slanted anodized aluminum shadow ring modified to extend farther above the wafer perimeter (FIG. 10CA) resulted in a less uniform deposited film than the film deposited using the shadow ring of FIG. 10AA. This is believed to be due to the loss of distance available for deposition from the edge of the shadow ring to the border not including the 3 mm edge. Specifically, with a shortened shadow ring, material is formed in the "lost" distance, allowing the deposited layer to reach an average thickness value before reaching the boundary that does not include the 3mm edge, thereby increasing thickness uniformity.

The composition and electrical state of the shadow ring also affects the quality of material deposition. Deposition using each of the deposition rings of FIGS. 10AA-10CA occurred using a shadow ring comprising conductive anodized aluminum in electrical communication with a ground plane. In contrast, deposition using the shadow rings of FIGS. 10D-10E occurred using a shadow ring with a dielectric material - aluminum oxide (Al ₂ O ₃ ).

While embodiments of shadow rings according to the present invention may include conductive or dielectric materials, grounded shadow rings supported by at least a conductive surface may improve the uniformity of deposited material. In particular, such a grounded conductive shield ring does not significantly alter the shape of the electromagnetic field above the wafer surface. In this way, the grounded conductive shadow ring can be used as a purely physical barrier to material deposition on the sloped wall portion of the wafer. Conversely, a shadow ring comprising a dielectric material may alter the electromagnetic field over the edge region of the wafer, thereby affecting the material deposited therefrom and the uniformity of the plasma.

Embodiments of shadow rings according to the present invention may be constructed from a variety of materials. Examples of these materials include aluminum, anodized aluminum, aluminum oxide, aluminum nitride, quartz, and other materials such as nickel alloys such as ICONEL ^™ and Hasteelloy. According to some embodiments, the shadow ring may comprise a material composition, for example a dielectric core with a conductive surface such as nickel by electroplating and/or flame spraying.

Finally, using an extended alumina shadow ring with blunt rather than beveled ends (FIG. 10EA) resulted in the lowest values for thickness uniformity. This may be due to the blunt end having the effect of blocking process gases from reaching the non-shaded wafer regions near the edge of the shadow ring. The sloped edge design of the shadow rings of Figures 10AA and 10CA enhances airflow to such non-shaded areas, thereby facilitating deposition of material in these areas at comparable thicknesses to other non-shaded areas.

Embodiments in accordance with the invention are not limited to the specific support mechanisms shown in FIGS. 8A-8D . 11A shows a simplified perspective view, partially cut away, of another alternative embodiment of a shadow ring positioned within a pump liner in accordance with the present invention. FIG. 11B shows an enlarged simplified perspective view, partially cut away, of the shadow ring of FIG. 11A . The design of Figures 11A-11B is similar to that shown in Figures 8A-8H, except that when not in use, the shadow ring 1180 is supported by pure aluminum fingers 1190 rather than by the vertical channels present in the pump liner. Flange support.

Embodiments of the shadow ring according to the invention may include features of its type. For example, as described above, the wafer heater/support includes embedded electrodes. This embedded electrode is responsible for generating an electric field that imparts directionality to the charged species present in the reaction chamber.

As shown in Figures 3 and 8A, the embedded electrodes extend a distance beyond the desired edge of the supported wafer. This is because the electric field associated with the electrode edges does not exhibit a planar shape and intensity. By extending the electrodes, these field inhomogeneities associated with the electrode edges are moved beyond the wafer edge, thereby ensuring a higher homogeneity of the deposited material.

As further shown in FIG. 8A, a portion of the shadow ring according to one embodiment of the present invention also overlies the embedded electrodes, and its magnetic permeability may undesirably alter the shape and strength of the electric field generated by the electrodes.

Accordingly, an alternative embodiment of the shadow ring according to the present invention features a gap between the protruding portion and the edge portion to help maintain the uniformity of the electric field over the edge of the wafer.

Figure 12A shows a simplified cross-sectional view of such an embodiment of a "webbed" shadow ring according to the present invention. Figure 12B shows a perspective view of the shadow ring of Figure 12A.

Webbed shadow ring 980 is similar to that shown in FIGS. 8A-8D and features horizontal protrusions 980 a and vertical protrusions 980 b configured to mate with recessed features of pumping pad 910 and wafer support 928 , respectively. However, webbed shadow ring 980 is characterized by a gap 980c between protruding portion 98d and edge portion 980e, which remain in physical contact with inserted spar portion 980f.

Figure 12C plots the relationship between the deposited material thickness and the radial distance of the shadow ring of Figure 12A. The presence of gap 980c helps to ensure uniformity of the magnetic field at the edge region of the wafer, and thereby ensures uniformity of deposited material at the non-shaded edge region.

Figure 13 shows a simplified cross-sectional view of yet another embodiment of a shadow ring design according to the present invention. In particular, the protrusion 1380a of the shadow ring 1380 is characterized by one or more protrusions 1380b on its underside. Protrusion 1380b makes physical contact with underlying wafer 1382 .

The use of shadow rings of the type shown in FIG. 13 can enhance processing by a number of possible mechanisms. The protrusions can be used as physical spacers, ensuring that a narrow but minimum required spacing exists between the protruding portion of the shadow ring and the underlying wafer. In this role as a physical spacer, it may thus allow for a relaxation of the tolerance limit of the protrusions, thereby allowing for a closer spacing between the shadow ring and the wafer, since the tolerance limit must account for the inherent tolerances in the wafer and shadow ring thickness profiles. Variety.

The presence of protrusions can also establish electrical contact between the shadow ring and the underlying wafer. By maintaining the shadow ring and wafer at the same electrical potential, arcing accidents between the shadow ring and wafer that cause process non-uniformity can be reduced or eliminated.

The protrusion 1380b is designed to contact the substrate 1382 only at the edge region 1382a that is not included. Therefore, any possible contamination caused by physical contact between the shadow ring 1380 and the underlying wafer 1382 will not affect wafer throughput.

According to one embodiment of the present invention, a shadow ring for depositing material on a 300 mm wafer comprises three raised AlN diameters of 0.05"±0.01", height of 0.0045", tolerances +0.0002" and -0.0001". Embodiments of the shadow ring according to the invention may feature at least three protrusions (there may be a higher number).

edge purge heater

The process kits described above may be modified according to embodiments of the present invention, featuring edge purge heater configurations. It includes a heater structure modified to flow a purge gas to an edge portion of the substrate to inhibit deposition of material on the sloped wall portion.

Figure 14A shows a simplified cross-sectional view of a heater featuring an edge purge gas system according to one embodiment of the invention. Figure 14B shows a simplified enlarged cross-sectional view of the heater of Figure 14A.

14A-14B show heater/support 1400 positioned in chamber 1402 below gas distribution showerhead 1404 . A substrate 1406 is positioned on a support 1400 within a well defined by a peripheral edge ring 1408 . The heater 1400 is configured to include a channel 1400a for flowing a purge gas 1410 to the substrate of the edge ring 1408, between the edge ring 1408 and the edge of the substrate. By directing the flow of purge gas outward along the edge of the wafer, the flow of process gas to the substrate edge/sloped wall regions is impeded, thereby reducing or eliminating material deposition in these edge regions.

14C plots the thickness of DARC material deposited on a wafer supported by the heater structure of FIG. 14A versus position for various flow rates of nitrogen purge gas to the edge ring. 14D plots the relationship between the thickness of DARC material deposited on a wafer supported by the heater structure of FIG. 14A versus position for various flow rates of helium purge gas to the edge ring.

Although the above description focuses on the use of related techniques to reduce the deposition of silicon oxynitride DARC or APF ^™ layers on the sloped walls of a wafer, embodiments in accordance with the present invention are not limited to these specific applications. For example, films exhibiting low dielectric constants (K) have been increasingly used in applications such as shallow trench isolation (STI), pre-metal dielectric (PMD), and inter-metal dielectric (IMD).

Forming such a low-K film may include depositing silicon oxide containing a large amount of carbon. One such low K film is BLACKDIAMOND( ^TM) sold by Applied Materials, Inc. of Santa Clara, California.

Another type of low-K film is characterized by the use of carbon-containing molecules as porogens after deposition formation. Annealing after deposition releases the porogen, leaving nanopores that reduce the dielectric constant of the film. An example of such a nanoporous membrane is described in US Patent No. 6,541,367, which is hereby incorporated by reference in its entirety.

Increased deposition on the sloped walls of the wafer has been found in plasma assisted CVD formation processes for these films. Accordingly, slanted wall deposition of these and other types of carbon-containing low-K films can be reduced using embodiments of methods and apparatus in accordance with the present invention.

While the above is a complete description of specific embodiments of the invention, various improvements, changes or substitutions may be employed. These equivalents or replacements should be included within the scope of the present invention. Accordingly, the scope of the invention is not limited to the described embodiments, but by the claims and all equivalents thereof.

Claims (22)

1. A method of chemical vapor deposition of material on a workpiece, the method comprising: positioning a shadow ring characterized by an angled protrusion over an edge region of a substrate supported within the processing chamber, the shadow ring extending a distance between about 0.8-2.0 mm above the edge region and aligned with the Edge regions are separated by a gap of approximately 0.0045″±0.003″; flowing process gas to the chamber; and Energy is applied to the chamber to generate a plasma in the chamber such that reaction of the process gas causes deposition of material outside the edge region. 2. The method of claim 1, wherein: positioning the shadow ring includes positioning the shadow ring over a workpiece having a diameter of 200 mm; flowing the process gas comprises flowing a hydrocarbon having the general formula C _X H _Y , wherein X is between 2-4 and Y is between 2-10; and Applying energy includes applying radio frequency energy to deposit the amorphous carbon material, the radio frequency energy having a power between about 800-1200W. 3. The method of claim 1, wherein: positioning the shadow ring includes positioning the shadow ring over a workpiece having a diameter of 300 mm; flowing the process gas comprises flowing a hydrocarbon having the general formula C _X H _Y , wherein X is between 2-4 and Y is between 2-10; and Applying energy includes applying radio frequency energy to deposit the amorphous carbon material, the radio frequency energy having a power of between about 1400-1800W. 4. The method of claim 1, wherein: flowing the process gas comprises flowing a nitrogen-containing gas; and Applying the energy results in deposition of a dielectric antireflective coating material comprising silicon oxynitride. 5. The method of claim 1, wherein: flowing the process gas comprises flowing a carbonaceous process gas; and The applied energy results in the deposition of carbon-containing silicon oxide material. 6. The method of claim 5, wherein: flowing the carbon-containing treatment gas includes a flowing porogen; and The method also includes annealing the carbon-containing silicon oxide to release the porogen. 7. The method of claim 1, wherein the shadow ring contacts an area of the workpiece not covered by an edge at at least one location. 8. The method of claim 1, wherein the shadow ring defines a gap to enhance uniformity of an electric field over the substrate and generated by an embedded substrate support electrode. 9. A method of chemical vapor deposition of a dielectric film, said method comprising: positioning the substrate on a support within the processing chamber; flowing a purge gas through the support to an edge region of the substrate; flowing process gas to the chamber; and Energy is applied to the chamber to generate a plasma in the chamber such that the flow of purge gas blocks the flow of the process gas to the edge region and inhibits deposition of dielectric material in the edge region. 10. The method of claim 9, wherein flowing the purge gas includes flowing at least one of helium, argon, and nitrogen. 11. The method of claim 9, wherein flowing the process gas includes flowing a carbonaceous material. 12. An apparatus for depositing a dielectric material on a workpiece, the apparatus comprising: A vertically movable substrate support positioned within the processing chamber; an energy source configured to apply energy to the processing chamber to generate a plasma in the processing chamber; pump liner, defining exhaust orifices and vertical channels; a shadow ring including a protruding portion configured to extend a distance of about 0.8-2.0 mm above the edge region of the substrate and separated from the edge region by about 0.0045 when the substrate support is raised to engage the shadow ring "±0.003" gap. 13. The apparatus of claim 12, wherein the substrate support defines a recess in an upper surface, and the shadow ring includes a protrusion configured to cooperate with the recess. 14. The apparatus of claim 12, wherein the shadow ring defines a gap to improve uniformity of a magnetic field located above the substrate and generated by a substrate support electrode. 15. The apparatus of claim 12, wherein the shadow ring comprises a dielectric material. 16. The apparatus of claim 15, wherein the dielectric material comprises at least one of aluminum oxide, aluminum nitride, and quartz. 17. The apparatus of claim 12, wherein the shadow ring comprises a conductive material. 18. The apparatus of claim 17, wherein the shield ring is grounded. 19. The apparatus of claim 18, wherein the shadow ring comprises a conductive surface carried by a dielectric core. 20. The apparatus of claim 19, wherein the conductive surface comprises one of plated metal and flame sprayed metal. 21. The apparatus of claim 12, wherein a lower surface of the protruding portion includes a protrusion configured to contact a region of the workpiece not covered by an edge. 22. The apparatus of claim 12, wherein an upper surface of the protruding portion includes a slope configured to direct a process gas flow toward the substrate.

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