CN1983543A - Print mask and method of manufacturing electronic components using the same - Google Patents

Abstract

A printing mask and a method for manufacturing an electronic component using the mask. The printing mask is formed by arranging a plurality of openings in one or more rows, and is used for printing and coating a printing paste on the surface through the openings. On the wafer, thereby forming protrusions on the barrier metal layer on the wafer, it is characterized in that the arrangement density of the openings is different according to the arrangement area, and the arrangement area with the larger arrangement density of the openings is set. The smaller the opening area.

Description

Printing mask and method of manufacturing electronic parts using the same

This application is a divisional application based on the patent application No. 200410033029.6, the title of the invention is "Printing Mask and Method for Manufacturing Electronic Parts Using the Mask", and the filing date is February 25, 2004.

technical field

The present invention relates to a printing mask (also referred to as a mask for screen printing) for printing a paste on a wafer to form bumps, ie bump electrodes, on a barrier metal layer on the wafer. The present invention relates to a method of manufacturing electronic parts using a printed mask, and more particularly to a method of manufacturing a flip-chip type integrated circuit placed on a circuit substrate by flip-chip bonding.

Background technique

〖Patent Document 1〗JP-A-52-68366

Flip-chip bonding is known as a conventional mounting method for integrated circuits. The so-called mounting method is to place the integrated circuit on the circuit substrate with circuit wiring, and make the circuit formation surface opposite to the surface of the circuit substrate, and complete the bonding between the integrated circuit and the electrodes of the circuit substrate in this state. .

The integrated circuit used in the flip-chip bonding method is called a flip-chip integrated circuit (flip-chip IC), and its terminals are generally connected to circuit wiring on a circuit board by solder and a conductive adhesive.

As is well known, conventional flip-chip integrated circuits have a structure in which a plurality of barrier metal layers made of nickel or the like are formed covering one main surface of a semiconductor wafer as pad electrodes, and between the barrier metal layers Electrodes on which solder bumps are selectively formed. When mounting it on a circuit board, position the solder bumps of the flip chip IC on the pad electrodes facing the corresponding circuit wiring on the circuit board, and mount the flip chip IC on the circuit board. On the substrate, thereafter, by heating at a high temperature, the solder bumps are melted, solder is coated, and the barrier metal layer of the flip-chip integrated circuit is placed on the circuit wiring on the circuit substrate.

Such a flip-chip integrated circuit is generally produced by the following process (see FIGS. 4 to 6 ). Right now:

(1) Modulating the semiconductor wafer 11, a plurality of barrier metal layers 13 are linearly arranged on the integrated circuit formation surface of the semiconductor wafer, the circuit wiring 12 covers the area between the adjacent barrier metal layers 13, and the passivation layer 14 covers the circuit wiring 12 . The circuit wiring 12 has the function of supplying power and electrical signals to the semiconductor elements provided on the semiconductor wafer 11. Generally, the wiring is formed in a direction perpendicular to the arrangement direction of the barrier metal layer 13 with a metal material such as aluminum. pattern.

(2) The printing mask 16 is prepared, and the printing mask 16 is formed to have a plurality of oblong openings 17 corresponding to the barrier metal layers 13 one by one and larger than the outer diameter of the barrier metal layers.

(3) Thereafter, the printing mask 16 is placed on the semiconductor wafer 11 so that the openings 17 of the printing mask 16 are located on the barrier metal layer 13 .

(4) Next, the solder paste 15 is supplied onto the print mask 16, the squeegee presses the print mask 16, and at the same time moves the solder paste in a predetermined direction. Print on layer 13.

(5) Finally, the semiconductor wafer is heated to melt the applied solder paste 15 to form spherical solder bumps on the barrier metal layer 13 . Such a semiconductor wafer 11 is cut into a predetermined shape to produce a plurality of flip-chip integrated circuits.

Further, the openings 17 formed in an oblong shape are arranged linearly in the printing mask 16 , and the edge portions along the longitudinal direction of the openings 17 are provided perpendicular to the arrangement direction of the openings 17 . When the printing mask 16 is placed on the semiconductor wafer 11, the edge portions of the openings 17 are arranged substantially parallel to the circuit wiring between the adjacent barrier metal layers 13 (see FIG. 4 ).

Furthermore, in other known printing masks, as shown in FIG. Masks are used for screen printing to form solder bumps for flip-chip ICs. In this example, the openings 17 constituting the three opening rows 17a, 17b, and 17c correspond to the barrier metal layers on the semiconductor wafer. Each opening row is arranged at a predetermined density, and its opening area is the same as that of all the opening rows. 17a, 17b, 17c are approximately equal.

Thus, on the above-mentioned semiconductor wafer 11, since the circuit wiring 12 provided between the adjacent barrier metal layers 13 has a predetermined thickness (for example, 0.5 μm to 1.5 μm), the passivation covering the circuit wiring 12 On the surface of the layer 14, a protruding portion 14a and a step portion are formed, and the protruding portion 14a is protruded into a shape conforming to the thickness profile of the circuit wiring 12. As shown in FIG. When the aforementioned printing mask 16 is provided on the semiconductor wafer 11 having the protruding portion 14 a , at the corner portion at the base of the protruding portion 14 a of the passivation layer 14 , there is always an edge portion along the length direction of the opening 17 . In this state, if the printing mask 16 is pressed to apply pressure to the semiconductor wafer 11, the edge of the opening 17 enters the corner and damages the surface of the passivation layer 14 (see FIGS. 5 and 6 ). As a result, the sealing performance of the passivation layer 14 deteriorates, and there is a possibility that moisture in the atmosphere may corrode the circuit wiring 12 . This problem is conspicuous when the edge portion along the longitudinal direction of the opening portion 17 is formed in a linear shape.

10, when the solder paste placed on the mask is moved by a certain distance with a squeegee, the opening row 17b and the opening row 17b having a smaller arrangement density than the opening row 17a The number of times the solder paste on the mask near the opening row 17 a where the arrangement density of the openings 17 is high flows onto the barrier metal layer is higher than the solder paste near 17 c. The outflow of the paste causes the solder paste on the mask to swirl and flow vigorously, and as a result, the viscosity of the solder paste near the opening row 17a tends to be lower than that of the solder paste near the other opening row.

Therefore, the amount of solder paste coated on the barrier metal layer is more in the opening row 17a than in the opening row 17b, 17c, and there is a disadvantage that the size of the solder bumps varies. If the size of the solder bumps is different, when the flip chip IC is mounted on another circuit board, the flip chip IC will be tilted and the mounting strength of the flip chip IC to the circuit board will be lowered.

Contents of the invention

The object of the present invention is to provide a printing mask, which can effectively prevent the paste from damaging the surface of the passivation layer during printing. It also provides a method for manufacturing flip-chip integrated circuits, which does not scratch the surface of the passivation layer by using a printing mask.

Another object of the present invention is to provide a high-quality printing mask capable of forming bumps of approximately uniform size, and a method of manufacturing electronic components using the mask.

In the aspect of the present invention, the printing mask is formed by arranging a plurality of openings forming a long hole shape, and is used to apply the paste on the object to be printed through the openings, and the edges along the longitudinal direction of the openings are opposite to each other. It is inclined in a direction perpendicular to the direction in which the openings are arranged.

Regarding the inclination angle of the openings, it is preferable that the edge portions along the longitudinal direction of the openings are inclined by 5° to 45° relative to the direction perpendicular to the arrangement direction of the openings.

Moreover, it is preferable that the edge part along the longitudinal direction of an opening part of the printing mask of this invention is linear. In particular, a printing mask in which a plurality of openings are arranged in a straight line can be used. Such a printing mask is widely used in the field of integrated circuit manufacturing and in the manufacturing method of flip-chip integrated circuits.

A method of manufacturing a flip-chip integrated circuit includes the following processes: adjusting a semiconductor wafer so that a plurality of barrier metal layers functioning as bump electrodes are arranged on the wafer, and covering circuit wiring between adjacent barrier metal layers space, and cover the circuit wiring with a passivation layer, thereby forming the semiconductor wafer. A printing mask having a plurality of long-hole-shaped openings corresponding to the barrier metal layer was prepared. Next, the opening portion of the printing mask is provided on the barrier metal layer such that the edge portion in the length direction thereof is inclined with respect to the circuit wiring covering between adjacent barrier metal layers. The printing mask may be in contact with the wafer or may be in a non-contact state. Next, the paste supplied to the printing mask is passed through the openings to be printed on the barrier metal layer, and the paste coated on the barrier metal layer is then heat-treated to form protrusions.

According to the present invention, in the printing mask formed by arranging a plurality of long-hole-shaped openings, since the edges along the longitudinal direction of the openings are inclined in the direction perpendicular to the direction in which the openings are arranged, the printing mask When the film is provided on a semiconductor wafer with a barrier metal layer corresponding to the opening, the edge portion along the longitudinal direction of the opening is inclined with respect to the circuit wiring between the adjacent barrier metal layers.

Therefore, when printing the paste, even if the printing mask is pressed against the semiconductor wafer, the edges of the openings of the printing mask protrude into the bases of the protrusions of the passivation layer formed in accordance with the shape of the circuit wiring. In the corners, it is possible to effectively prevent large damage to the surface of the passivation layer. Therefore, the sealing property of a passivation layer can be maintained favorably, and problems, such as corrosion of a circuit wiring, can be solved.

The present invention is particularly effective when the edge portion along the longitudinal direction of the opening is linear.

The printing mask in other forms of the present invention is formed by arranging a plurality of openings in one or more rows, and is used to print and coat the printing paste on the wafer through the openings, so that the barrier metal layer on the wafer Protrusions are formed on the top, and the arrangement density of the openings differs depending on the arrangement area, and the arrangement area with the higher the arrangement density of the openings is set to have a smaller opening area of the openings.

Preferably, the openings are arranged in a plurality of rows, and the arrangement density of the openings is set for each row. Furthermore, it is preferable that the plurality of rows in which the openings are arranged are substantially parallel to each other.

The manufacturing method of the electronic part of another aspect of this invention comprises the following process: The printing paste is placed on the said mask for screen printing, this printing paste is moved along the direction in which openings are arranged, and the printing paste is sprayed through the openings. printing and coating on the barrier metal layer located under the aforementioned openings, thereby forming protrusions on the barrier metal layer.

Adopt the present invention, owing to setting the arrangement area that the arrangement density of this opening part is bigger, the opening area of the opening part that is arranged on the mask for screen printing is smaller, therefore, the printing paste that is placed on the mask for printing In the agent, even if the viscosity of the printing paste near the area where the arrangement density of the openings is high is low, the amount of the printing paste coated on the barrier metal layer can be formed approximately uniformly at all the openings, so that the formed The size of the bumps on the barrier metal layer of the electronic part device is uniform, thereby providing electronic parts with high assembly performance, especially flip-chip type integrated circuits.

Description of drawings

FIG. 1 shows a plan view of a printing mask according to one embodiment of the present invention.

FIG. 2 shows a cross-sectional view of a flip-chip integrated circuit manufactured according to a method for manufacturing a flip-chip integrated circuit according to an embodiment of the present invention.

FIG. 3 is a plan view showing the positional relationship between the print mask and the semiconductor wafer when the flip-chip integrated circuit of FIG. 2 is manufactured.

4 is a plan view showing the positional relationship between a print mask and a semiconductor wafer when a conventional flip-chip integrated circuit is manufactured.

FIG. 5 is a diagram showing a printing process of solder paste for forming a conventional flip-chip integrated circuit.

FIG. 6 is a diagram showing a printing process of solder paste for forming a conventional flip-chip integrated circuit.

Fig. 7 is a diagram showing a printing mask according to a second embodiment.

8A to C are diagrams showing a method of forming solder bumps of electronic components using the printing mask of FIG. 7 .

FIG. 9 is a diagram showing a printing mask in which the arrangement density of one opening is changed.

FIG. 10 is a diagram showing a conventional printing mask.

Detailed ways

Description of printing mask

As shown in FIG. 1 , in the print mask 6 according to the first embodiment of the present invention, a plurality of openings 7 are arranged in a flat mask main body 8 . The mask main body 8 is formed of a metal material, a resin material, or a thin layer combining these materials, and generally has a rectangular shape.

Metal materials constituting the mask main body 8 include aluminum alloys, stainless steel, Ni alloys, Cr alloys, and the like. The resin material for the mask includes polyimide, polyester, epoxy, polycarbonate, polyethylene, polyethylene terephthalate (PET), polypropylene, and the like.

The mask main body 8 is formed on a thin plate made of the above-mentioned material. The thickness of the thin plate is preferably 20 μm to 80 μm.

Other examples of mask bodies can also be masks of composite materials, which can be, for example, made of a wire mesh with a plurality of meshes, and a hardened object of an insulating emulsion coated on the mesh, made of the above-mentioned materials. into a printing mask.

A plurality of openings 7 are provided in a predetermined pattern on the thin metal plate or mesh of the mask main body. A plurality of openings 7 opened in the mask main body 8 are linearly arranged at a density of, for example, 100 to 300 dpi (dots per inch) with respect to the mask main body 8 , and the arrangement is set to one row or two or more rows.

The openings 7 each have a long hole shape including an oblong shape, a rectangle, a parallelogram, and the like, and the edge portion 71 along the longitudinal direction is formed in a straight line.

The opening 7 is a through hole penetrating the thickness direction of the mask main body 8 for allowing conductive paste such as solder paste and silver epoxide placed on the mask main body 8 to pass through the hole during printing.

The mask main body 8 employing the aforementioned mesh utilizes regions not coated with emulsion as openings 7 .

In order to apply the paste well to the printed matter, the surface roughness of the inner periphery of the opening 7 is preferably set to an arithmetic mean roughness Ra of 1.0 μm or less. If the surface roughness Ra of the inner periphery of the opening 7 is greater than When the area of the opening 7 is 1.0 μm or less than 10000 μm ² , it is difficult to transfer the paste well to the printed matter. The lower limit of the surface roughness of the inner periphery of the opening 7 is preferably 0.05 μm in arithmetic mean roughness Ra. If the surface roughness of the opening 7 is less than 0.05 μm, the productivity of the printing mask 6 will decrease.

The size of the opening 7 is, for example, 80 μm to 150 μm in length and 60 μm to 100 μm in width, but generally, it is preferably wider than the area to be printed with the paste (for example, the barrier metal layer).

When the printing mask 6 is made of Ni alloy, for example, there is a known additive method, that is, at first the photosensitive resin is coated into a thin plate shape, and at the same time, the photosensitive resin coated is coated with a photolithographic technique. Carry out the processing of forming the wiring pattern, remove the resin other than the area corresponding to the opening 7, and then adopt the known electroplating or electroless plating method to plate nickel on the area where the photosensitive resin is removed, and finally remove the photosensitive resin A printing mask 6 is formed.

Moreover, the printing mask 6 can also be made of polyimide resin. At this time, for example, after the precursor of the polyimide resin is coated into a layer by the screen printing method, it is fired, and thereafter Holes corresponding to openings 7 are formed by a conventionally known laser processing method.

Needless to say, other manufacturing methods can also be used to form the printing mask 6, but if the printing mask 6 is formed by an additive method, it is also easy to manufacture the printing mask 6 due to the formation of a fine pattern with an area of the opening ⁷ below 10000 μm Therefore, the printing mask 6 is formed by an additive method, and it is preferable that the main body of the mask is formed of Ni alloy or Cr alloy or the like.

flip chip integrated circuit

Next, a flip-chip type integrated circuit in which bumps are formed using the above-mentioned printing mask 6 will be described. In the flip-chip integrated circuit shown in FIG. 2 , circuit wiring 2 , barrier metal layer 3 , passivation layer 4 , bumps 5 , and the like are generally provided on semiconductor wafer 1 .

The semiconductor wafer 1 is made of semiconductor materials such as single crystal silicon, and is covered with semiconductor elements (not shown in the figure), circuit wiring 2, barrier metal layer 3, passivation layer 4, etc., and the semiconductor wafer 1 plays a supporting role. Their supporting substrate function.

The above-mentioned semiconductor wafer 1 cuts an ingot of single-crystal silicon formed by, for example, the conventionally known Zokorarski method (crystal pulling method) to a predetermined thickness to obtain thin slices, and at the same time polishes the surface thereof. There is a known thermal oxidation method to form an insulating film on the entire surface of the wafer, thereby producing the above-mentioned semiconductor wafer 1 .

The circuit wiring 2 formed on the semiconductor wafer 1 is covered with a metal material such as aluminum (Al) or copper (Cu) to a thickness of 0.5 μm to 1.5 μm, and serves to supply power and electrical signals from the outside The role of power supply wiring for semiconductor elements not shown. The circuit wiring 2 is formed in a predetermined pattern on the upper surface of the semiconductor wafer 1 by conventionally known sputtering, photolithography, and etching.

A plurality of barrier metal layers 3 are formed on a part of the circuit wiring 2 in a linear arrangement along the end of the semiconductor wafer 1 . A part of the circuit wiring 2 is located in a region between adjacent barrier metal layers perpendicular to the arrangement direction of the barrier metal layers 3 .

Furthermore, when the flip-chip integrated circuit is mounted on the circuit board, the barrier metal layer 3 can effectively prevent the corrosion of the aluminum or the like forming the circuit wiring 2 due to the melting of the bumps 5 provided on the barrier metal layer 3 . The barrier metal layer 3 forms a multilayer structure of metal materials, and the uppermost layer uses a material with good wettability to the material constituting the protrusion 5 .

Such a multilayer structure may be, for example, a three-layer structure in which zinc (Zn), nickel (Ni), and gold (Au) are stacked in order from the semiconductor wafer 1 side. Other structures can be a 2-layer structure of zinc (Zn) and nickel (Ni), or a 3-layer structure of palladium (Pd), nickel (Ni), and gold (Au), and a 2-layer structure of palladium (Pd) and nickel (Ni) structure.

On the other hand, the passivation layer 4 made of electrical insulating materials such as silicon nitride (Si ₃ N ₄ ), silicon oxide (SiO ₂ ), polyimide, etc. covers the circuit wiring 2 and the not shown in the figure. The semiconductor elements are laid down on the wafer 1 in regions where the barrier metal layer 3 is not formed.

After the passivation layer 4 is formed on the wafer, the barrier metal layer 3 is formed on a part of the circuit wiring 2 where the passivation layer 4 is not formed. In the case of a three-layer structure of zinc (Zn), nickel (Ni) and gold (Au), zinc (Zn) and then nickel ( Ni), then gold (Au), forming a cylindrical shape.

Since the passivation layer 4 can well isolate the semiconductor element and the circuit wiring 2 from air, it can effectively prevent the semiconductor element and the circuit wiring 2 from being corroded due to contact with moisture or the like.

Furthermore, on the passivation layer 4 , a protruding portion 4 a protruding upward in conformity with the thickness and shape of the circuit wiring 2 between the barrier metal layers 3 is formed. The protruding portion 4 a has a shape along the circuit wiring 2 .

The passivation layer 4 is formed on the upper surface of the semiconductor wafer 1 with a thickness of 0.5 μm to 3.0 μm by adopting existing cathode sputtering, photolithography technology, corrosion technology and the like.

Then, spherical bumps 5 are formed on the barrier metal layer 3 .

The bumps 5 are heated and melted when the flip-chip integrated circuit is mounted on the circuit board to electrically and mechanically connect the barrier metal layer 3 of the flip-chip integrated circuit with the circuit wiring on the circuit board, for example , Utilize tin (Sn), silver (Ag), copper (Cu) in the ratio of 96.5:3.0:0.5 to melt, solidify solder or silver epoxy compounds and other conductive materials.

Explanation of manufacturing method of flip-chip integrated circuit

Next, a method of manufacturing the above-mentioned flip-chip type integrated circuit will be described.

(1) First, the semiconductor wafer 1 on which the circuit wiring 2, the barrier metal layer 3, and the passivation layer 4 are covered, the printing mask 6, and the paste are prepared.

As the paste, a solder paste in which a flux or the like is added and mixed to a plurality of solder particles and adjusted to a predetermined viscosity, or a conductive paste such as a silver epoxide compound can be suitably used.

(2) Next, the printing mask 6 is provided on the semiconductor wafer 1 .

At this time, the printing mask 6 is set so that the opening 7 is located directly above the corresponding barrier metal layer 3 on the semiconductor wafer 1, but as described above, in order to make the edge of the opening 7 in the In a direction perpendicular to the arrangement direction of the openings 7 , the edges of the openings 7 can be inclined with respect to the circuit wiring 2 between adjacent barrier metal layers 3 (see FIG. 3 ). Thus, the edge portion of the opening 7 is inclined with respect to the protruding portion 4 a on the surface of the passivation layer, and the surface of the protruding portion 4 a supports a part of the edge portion of the opening 7 .

(3) Then, while supplying the paste onto the printing mask 6, while pressing the printing mask 6 with a pressing member such as a squeegee (a squeegee in this embodiment), the pressing member is moved, The paste is applied on the barrier metal layer 3 through the opening 7 .

At this time, the printing mask 6 is tightly pressed against the semiconductor wafer 1 by a pressing member such as a squeegee. The edge portion 71 of the portion 7 is partially supported by the surface of the protruding portion 4a, and most of the edge portion 71 of the opening portion 7 protrudes into the corner near the protruding portion 4a of the passivation layer 4 (the side surface of the protruding portion 4a and the passivation layer In the corner between the flat parts of 4), the problem of large damage to the surface of the passivation layer 4 can be effectively prevented. Therefore, the sealing property of the passivation layer 4 can be maintained favorably, and problems, such as corrosion of the circuit wiring 2, can be solved.

Here, the inclination angle α of the edge portion 71 relative to the circuit wiring 2 along the longitudinal direction of the opening 7 is preferably set in the range of 5° to 45°. If the inclination angle α is less than 5°, due to the The area where the edge portion 71 is supported by the surface of the protruding portion 4 a of the passivation layer 4 is reduced, so that when the printing mask 6 is particularly pressed against the semiconductor wafer 1 , the surface of the passivation layer 4 is damaged. On the other hand, if the inclination angle α is greater than 45°, the applied paste is easily contacted with the adjacent paste, and it is difficult to arrange the openings 7 at a high density. Therefore, the inclination angle α of the edge portion 71 of the opening 7 with respect to the wiring 2 is preferably set in the range of 5° to 45°. Set below 30°.

Moreover, it is more helpful to make the edge portion 71 of the opening portion 7 inclined relative to the circuit wiring 2, and to support at least one of the pair of edge portions 71 along the length direction of the opening portion 7 with the lowest two protruding portions 4a. In the passivation layer 4 for preventing damage, preferably, the edge portion 71 of the opening portion 7 is inclined relative to the circuit wiring, and each of the pair of edge portions 71 along the length direction of the opening portion 7 is supported by at least two protruding portions 4a. edge.

(4) Thereafter, the paste coated on the barrier metal layer 3 is dried, and finally melted, the particles in the paste are heated and melted, and the particles are combined with each other, and then cooled, so that the barrier metal layer Spherical projections 5 with roughly uniform sizes are formed on the 3 .

According to the present invention, in the printing mask formed by arranging a plurality of long-hole-shaped openings, since the edges along the longitudinal direction of the openings are inclined in the direction perpendicular to the direction in which the openings are arranged, the printing mask When the film is provided on a semiconductor wafer with a barrier metal layer corresponding to the opening, the edge portion along the longitudinal direction of the opening is inclined with respect to the circuit wiring between the adjacent barrier metal layers. Therefore, when printing the paste, even if the printing mask is pressed against the semiconductor wafer, the edge of the opening of the printing mask protrudes into the base of the protrusion of the passivation layer formed in accordance with the shape of the circuit wiring. In the corners, it is possible to effectively prevent large damage to the surface of the passivation layer. Therefore, the sealing property of a passivation layer can be maintained favorably, and problems, such as corrosion of a circuit wiring, can be solved.

In the second embodiment, as shown in FIG. 7, the printing mask 6 may be made of the above-mentioned metal material, such as aluminum steel, stainless steel, or Ni alloy, or may be formed into a thin plate shape from a synthetic resin. The thickness thereof is 20 μm to 80 μm, and a plurality of openings 7 are provided in a thin metal plate (mask main body) 8 in a predetermined pattern.

In the following embodiments, during screen printing, the thin metal plate 8 of the printing mask 6 is used to support printing paste such as solder paste 50 placed thereon.

A plurality of openings 7 for applying solder paste 50 placed on the thin metal plate 8 to the barrier metal layer provided under each opening 7 are formed through the thickness direction of the thin metal plate 8 .

Moreover, each of the plurality of openings 7 can be formed in various shapes such as a circle, an ellipse, an oval, and a polygon, and is arranged in multiple rows on the thin metal plate 8, and a plurality of opening rows 7a, 7a, etc. are formed by their arrangement. 7b, 7c.

In Fig. 7, a plurality of openings rows 7a, 7b, 7c are set, each row 7a, 7b, 7c is substantially parallel to each other, and the arrangement density of openings 7 is set for each row of openings 7a, 7b, 7c. The arrangement density of the opening row or each opening row is different. In the illustrated example, the arrangement density of each opening row is different.

Here, it is important to set the opening area of the aforementioned plurality of openings 7 , and the arrangement region with higher arrangement density of the openings 7 , that is, the opening row with higher arrangement density, has a smaller opening area. For example, the arrangement density of the openings 7 is set to 80-90 dots per centimeter at the opening row 7a, 50-60 dots per centimeter at the opening row 7b, and 10-15 dots per centimeter at the opening row 7c. In centimeters, the opening area of the opening 7 is set to 7850-7950 μm ² at the opening row 7a, 8400-8500 μm ² at the opening row 7b, and 8800-8900 μm ² at the opening row 7c.

Therefore, when solder bumps are formed on the barrier metal layer provided on the substrate using a mask for screen printing, and the solder paste 50 placed on the metal thin plate 8 is moved with a squeegee, even if the opening 7 The solder paste 50 near the opening row 7a whose arrangement density is higher than that of the opening row 7b and 7c rotates and flows more strongly on the mask than the solder paste 50 near the opening row 7b and 7c, resulting in a decrease in viscosity. When the amount of solder paste 50 coated on the barrier metal layer is small, the amount of solder paste 50 coated on the barrier metal layer can also be formed approximately uniformly at all the openings 7a, 7b, 7c, so that the solder bumps formed on the barrier metal layer of the electronic component can be obtained. High-quality electronic components of consistent size.

Furthermore, if all the openings 7 are formed in substantially similar shapes, there is an advantage that the shapes of the solder bumps in all the opening rows 7 a , 7 b , and 7 c are substantially uniform.

In addition, when the thin metal plate 8 is made of a Ni alloy, the thin metal plate 8 and the plurality of openings 7 can be formed by a conventionally known additive method.

Next, a method of forming solder bumps of electronic components using the above screen printing mask will be described in detail with reference to FIGS. 8A to 8B. The following example shows a flip-chip IC.

(1) First, in FIG. 8A , an object to be printed, that is, a substrate (semiconductor wafer) 1 , a solder paste 50 and a mask 6 for screen printing are prepared.

The aforementioned substrate 1, circuit wiring 2 made of aluminum or the like, and semiconductor elements are concentrated on one main surface of a board body made of single crystal silicon or the like, and a plurality of barrier metal layers 3 are covered on the circuit wiring. On the line 2, the passivation layer 4 covers the area where the barrier metal layer 3 is not formed. As a result, the plurality of barrier metal layers 3 and the openings 7 of the screen printing mask 6 are divided into a plurality of rows in one-to-one correspondence, each row is arranged at a predetermined density, and each row has zinc (Zn) stacked sequentially. , nickel (Ni), and gold (Au), and on the other hand, the aforementioned passivation layer 4 is made of insulating materials such as silicon nitride (Si ₃ N ₄ ) as described above without forming the barrier metal layer 3 formed in the region. In addition, the barrier metal layer 3 adopts the known electroless plating method, and the passivation layer 4 adopts the known cathode sputtering, photolithography technology, corrosion technology, etc. to form a predetermined pattern.

Furthermore, the aforementioned solder paste 50 may be appropriately added or mixed with a flux or the like to a plurality of solder particles, and may be adjusted to a predetermined viscosity.

(2) Next, the above-mentioned substrate 1 is placed and fixed on the stage of the screen printing machine, and the screen printing mask 6 prepared in the process of (1) is positioned relative to the substrate 1 ( FIG. 8A ). .

At this time, the mask 6 for screen printing is set so that the aforementioned plurality of openings 7 are located directly above the corresponding barrier metal layers 3 on the substrate 1 .

(3) Next, as shown in FIG. 8B, the solder paste 50 and the squeegee prepared in the process of (1) are placed on the screen printing mask 6, and the edge of the squeegee contacts the screen printing mask. In the state of the film 6 , the squeegee is moved along the rows of openings 7 a , 7 b , and 7 c to pass the solder paste 50 through the openings 7 of the screen printing mask 6 to be printed and applied on the barrier metal layer 3 .

At this time, since the openings 7 of the mask 6 for screen printing are provided, the arrangement area with the greater arrangement density, that is, the opening row with the greater arrangement density, has a smaller opening area. When the solder paste 50 near the opening row 7a with a large arrangement density rotates and flows on the screen printing mask 6 more violently than the solder paste 50 near the opening rows 7b and 7c with a lower arrangement density, and the viscosity decreases Therefore, the amount of the solder paste 50 coated on the barrier metal layer 3 can also be formed substantially uniformly in all the opening rows 7a, 7b, 7c.

(4) Next, as shown in FIG. 8C , the solder paste 50 coated on the barrier metal layer 3 is dried, and finally by reflowing it, the solder particles contained in the solder paste 50 are melted to make the solder particles They are combined with each other, and then allowed to cool, so that spherical solder bumps 5 with approximately uniform size are formed on the barrier metal layer 3 .

In this embodiment, the arrangement density of the openings in one opening row can be changed. At this time, as shown in FIG. smaller. In this way, the amount of solder paste 50 coated on the barrier metal layer 3 can be formed substantially uniformly at all the openings 7, so that the size of the solder bumps formed on the barrier metal layer 3 of the electronic parts can be kept uniform. .

And, printing mask is as mentioned above, also can use the mask that is made of various resins such as polyimide resin or polyester resin, polyethylene resin by resin thin plate, replaces the above-mentioned a plurality of on the metal thin plate 8. The "metal mask" of the opening 7.

In other embodiments, in addition to being used to form solder bumps for flip-chip ICs, it can also be used to form solder bumps provided on other electronic components such as resistors and capacitors.

In addition to the solder paste 50 described above, other conductive pastes such as silver paste can be used as the printing paste, and bump electrodes can be formed here.

Moreover, in the above-mentioned embodiment, the shape of the opening 7 can be formed into an ellipse or an oblong shape, and if its longitudinal direction is set to be perpendicular to the moving direction of the squeegee, it has the ability to control the printing on the barrier metal layer very accurately. Advantages on the coating amount of solder paste.

As mentioned above, adopt the present invention, owing to set the arrangement area that the arrangement density of this opening part is bigger, the opening area of the opening part that is located on the mask for screen printing is smaller, therefore, be placed on the mask for screen printing In the printing paste on the mask, even if the viscosity of the printing paste near the area where the arrangement density of the openings is high is low, the amount of the printing paste coated on the barrier metal layer can be formed approximately uniformly in all areas. At the opening, the size of the bumps formed on the barrier metal layer of the electronic component can be made uniform, so that a high-quality electronic component can be obtained.

The scope of the present invention is not limited to the above-mentioned embodiments, and various changes and improvements can be made without departing from the scope and spirit of the claims of the present invention.

Claims (4)

1. A printing mask, the printing mask is formed by a plurality of openings arranged in one or more rows, and is used to print and coat the printing paste on the wafer through the openings, so as to block the wafer on the wafer. Protrusions are formed on the metal layer, and the arrangement density of the openings differs depending on the arrangement region, and the arrangement region with a higher arrangement density of the openings has a smaller opening area of the openings. 2. The printing mask according to claim 1, wherein the openings are arranged in a plurality of rows, and the arrangement density of the openings is set for each row. 3. The printing mask according to claim 1 or 2, wherein the plurality of rows in which the openings are arranged are substantially parallel to each other. 4. A method for manufacturing electronic components using the printing mask according to claim 1 or 2, characterized in that the method comprises the following steps: placing the aforementioned printing mask on the wafer so that the opening is located at the On the barrier metal layer on the wafer; placing the printing paste on the aforementioned printing mask; moving the printing paste along the arrangement of the openings, printing and coating the printing paste on the aforementioned barrier metal through the openings layer; forming protrusions on the aforementioned barrier metal layer.

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