CN1833316A - Multilayered cap barrier in microelectronic interconnect structures - Google Patents
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Abstract
这里描述了含有低k值的多层电介质扩散阻隔层的结构体,该阻隔层具有至少一个低k值的亚层和至少一个空气阻隔亚层。该多层电介质扩散阻隔层是对金属的扩散阻隔层和对空气渗透的阻隔层。还描述了涉及到形成该结构体的方法和组成物。采用这些低k值的多层电介质扩散阻隔层的优点是:由于该多层电介质扩散阻隔层不能透过空气并且防止了金属扩散,因此通过导电金属特征体之间的电容的降低和可靠性的增加而获得了芯片性能。
Described herein are structures comprising a low-k multilayer dielectric diffusion barrier having at least one low-k sublayer and at least one air barrier sublayer. The multilayer dielectric diffusion barrier is a diffusion barrier to metal and a barrier to air penetration. Methods and compositions related to forming the structures are also described. The advantage of using these low-k multilayer dielectric diffusion barriers is the reduction in capacitance and reliability through conductive metal features since the multilayer dielectric diffusion barrier is air impermeable and prevents metal diffusion. Chip performance is gained by increasing.
Description
发明背景Background of the invention
发明领域field of invention
本发明涉及使用一种具有低的复合介电常数(k<4.0)并且对金属扩散和空气渗透具有阻隔性能的多层覆盖阻隔层。更特别地,本发明涉及在作为集成电路和微电子器件的一部分的金属互连结构体中使用多层覆盖阻隔层。由本发明提供的主要优点是降低了导电金属特征体例如铜线之间的电容,这导致了整个芯片性能的提高。还描述了实施阻隔层薄膜的使用方法、物质组成和结构。The present invention involves the use of a multilayer covering barrier layer having a low complex dielectric constant (k < 4.0) and barrier properties to metal diffusion and air permeation. More particularly, the present invention relates to the use of multilayer blanket barrier layers in metal interconnect structures that are part of integrated circuits and microelectronic devices. A major advantage provided by the present invention is reduced capacitance between conductive metal features such as copper lines, which results in improved overall chip performance. Methods of use, compositions of matter, and structures for implementing barrier layer films are also described.
背景技术Background technique
使用被用作对作为集成电路和微电子器件一部分的金属互连结构体中的金属的扩散阻隔层的材料通常需要形成可靠的器件如不会抑制金属扩散的低k值的夹层电介质。这些材料在互连结构体中的放置可以不同并且将取决于它们的质量以及它们被沉积和被处理的方式。由金属和电介质组成的两种阻隔层通常用于互连结构体中。The use of materials used as diffusion barriers to metals in metal interconnect structures that are part of integrated circuits and microelectronic devices is generally required to form reliable devices such as low-k interlayer dielectrics that do not inhibit metal diffusion. The placement of these materials in the interconnect structure can vary and will depend on their quality and the way they are deposited and processed. Two types of barrier layers consisting of metal and dielectric are commonly used in interconnect structures.
由金属和含有金属的材料组成的扩散阻隔层通常用作衬里,由此它们与金属导电结构体形成了共形的界面,这些金属和含有金属的材料包括例如钽、钨、钌、氮化钽、氮化钛、TiSiN等。通常,这些材料通过化学汽相沉积(CVD)、等离子体增强的化学汽相沉积(PECVD)、原子层沉积(ALD)、溅射、热蒸发和其他相关的方法来沉积。为了将这些材料用作阻隔层,金属阻隔层必须与导电金属线共形并且不能作为将用作金属线之间的导电路径的覆盖层来放置。对这些阻隔层的一个限制标准在于它们对导电金属线的电阻率的作用必须不过分地高;否则,金属导电结构体总电阻的增加会导致降低的性能。Diffusion barriers composed of metals and metal-containing materials including, for example, tantalum, tungsten, ruthenium, tantalum nitride, etc. , titanium nitride, TiSiN, etc. Typically, these materials are deposited by chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), sputtering, thermal evaporation, and other related methods. In order to use these materials as barrier layers, the metal barrier layer must be conformal to the conductive metal lines and cannot be placed as an overlay that will serve as a conductive path between the metal lines. A limiting criterion for these barrier layers is that their contribution to the resistivity of the conductive metal lines must not be unduly high; otherwise, an increase in the overall resistance of the metal conductive structure would lead to reduced performance.
由电介质组成的扩散阻隔层也用于微电子器件中,这些电介质包括例如氮化硅、碳化硅和碳氮化硅。这些材料通常通过化学汽相沉积(CVD)和等离子体增强的化学汽相沉积(PECVD)方法来沉积,并且可以沉积为连续的薄膜,例如覆盖阻隔层。不像由金属组成的扩散阻隔层那样,介电层可以沉积为覆盖膜并且可以被置于导电金属线之间。这样做,这些介电层有助于金属线之间的电容。这些体系的限制性约束是它们相对高的介电常数(k=4.5-7),这导致了金属线之间的有效介电常数的显著增加并且导致了降低的器件性能。降低这些阻隔层的薄膜厚度可能导致有效介电常数的降低;然而,不足够厚的层不可能可靠并且决不可能对有效介电常数起到显著的作用。Diffusion barrier layers composed of dielectrics including, for example, silicon nitride, silicon carbide, and silicon carbonitride are also used in microelectronic devices. These materials are typically deposited by chemical vapor deposition (CVD) and plasma enhanced chemical vapor deposition (PECVD) methods, and can be deposited as continuous thin films, such as blanket barrier layers. Unlike diffusion barrier layers composed of metals, dielectric layers can be deposited as cap films and can be placed between conductive metal lines. In doing so, these dielectric layers contribute to the capacitance between the metal lines. A limiting constraint of these systems is their relatively high dielectric constant (k=4.5-7), which leads to a significant increase in the effective dielectric constant between metal lines and to reduced device performance. Reducing the film thickness of these barrier layers may result in a reduction in the effective dielectric constant; however, layers that are not thick enough are unlikely to be reliable and never contribute significantly to the effective dielectric constant.
还已经提出了通过旋涂或者其他基于溶剂的方法形成的、抑制了铜扩散的阻隔层薄膜。这些体系可以是聚合物,这些聚合物可以在升高的温度下被固化以产生对超过400℃的温度热稳定的刚性交联体系。许多这些体系的主要优点是这些材料展现出的低介电常数;已经测量到2.6的介电常数。这些体系的例子包括:聚硅氮烷、聚碳硅烷、聚硅倍半氮烷、聚碳硅氮烷等。Barrier layer films formed by spin-coating or other solvent-based methods that inhibit copper diffusion have also been proposed. These systems can be polymers that can be cured at elevated temperatures to produce rigid crosslinked systems that are thermally stable to temperatures in excess of 400°C. A major advantage of many of these systems is the low dielectric constant exhibited by these materials; a dielectric constant of 2.6 has been measured. Examples of these systems include: polysilazanes, polycarbosilanes, polysilsesquiazanes, polycarbosilazanes, and the like.
除了铜扩散阻隔性能之外,对空气渗透的阻隔性能对于阻隔层薄膜而言也是非常需要的。穿过阻隔层薄膜的空气渗透可以不利地导致导电金属特征体的氧化并且导致降低的可靠性和/或性能。已经观察到一些通过CVD和相关的方法沉积的电介质铜扩散阻隔层由于它们的高密度而将展现出空气阻隔性能。然而,许多通过基于溶剂的方法涂覆的低k值的铜扩散阻隔层由于它们相对敞开的、可能含有显著部分的空穴或自由体积的结构而不能起到空气渗透阻隔层的作用。In addition to copper diffusion barrier properties, barrier properties to air permeation are also highly desirable for barrier layer films. Air permeation through the barrier layer film can detrimentally lead to oxidation of the conductive metal features and lead to reduced reliability and/or performance. It has been observed that some dielectric copper diffusion barrier layers deposited by CVD and related methods will exhibit air barrier properties due to their high density. However, many low-k copper diffusion barriers applied by solvent-based methods do not function as air permeation barriers due to their relatively open structure, which may contain a significant fraction of voids or free volume.
发明概述Summary of the invention
本发明涉及包括具有低介电常数(k<4.0)并且起到金属扩散和空气渗透阻隔层作用的多层电介质扩散阻隔层的互连结构体。本发明的多层电介质扩散阻隔层由一些亚层组成,其中至少一个空气阻隔亚层是通过CVD或相关的方法沉积的电介质,并且至少一个低k值的亚层是通过基于溶剂的方法沉积的阻隔电介质。采用两种类型的电介质的优点在于:该多层电介质扩散阻隔层将展现出比CVD沉积的阻隔电介质显著更低的复合介电常数,同时保持了单独由低k值的溶剂沉积的阻隔电介质所不能提供的对空气渗透的阻隔性能。The present invention relates to interconnect structures comprising a multilayer dielectric diffusion barrier having a low dielectric constant (k<4.0) and acting as a metal diffusion and air permeation barrier. The multilayer dielectric diffusion barrier of the present invention is composed of sublayers in which at least one air barrier sublayer is a dielectric deposited by CVD or related methods and at least one low-k sublayer is deposited by a solvent based method barrier dielectric. The advantage of using both types of dielectrics is that the multilayer dielectric diffusion barrier will exhibit a significantly lower composite permittivity than a CVD-deposited blocking dielectric, while maintaining the properties of a blocking dielectric deposited from a low-k solvent alone. Does not provide barrier properties against air penetration.
本发明可用于采用金属互连结构体的任意微电子器件,这些微电子器件包括,例如高速微处理器、专用集成电路(ASICs)和存储器。采用本发明的多层电介质扩散阻隔层与现有技术方法相比极其有利,因为其通过降低导电金属线之间的电容同时保持了有助于形成可靠的结构体的性能而得到具有增强的性能的微电子器件。The present invention is applicable to any microelectronic device employing metal interconnect structures, including, for example, high speed microprocessors, application specific integrated circuits (ASICs) and memories. Employing the multilayer dielectric diffusion barrier of the present invention is extremely advantageous over prior art methods because it has enhanced performance by reducing the capacitance between conductive metal lines while maintaining properties that contribute to the formation of reliable structures microelectronic devices.
本发明的结构体可以由至少一个在基质上形成的导电金属特征体组成,该基质进一步包括至少一个包围导电金属特征体的绝缘层。该绝缘层可以将所述至少一个导电金属特征体在其底部、顶部和侧面包围。本发明的结构体可以进一步包括至少一个至少沉积在绝缘层与所述至少一个导电金属特征体之间的一个界面上的导电阻隔层。所述至少一个导电金属特征体和绝缘层的组合可以重复,以形成多级的互连堆层。The structures of the present invention may consist of at least one conductive metallic feature formed on a substrate, the substrate further comprising at least one insulating layer surrounding the conductive metallic feature. The insulating layer may surround the at least one conductive metal feature at its bottom, top and sides. The structure of the present invention may further comprise at least one conductive barrier layer deposited on at least one interface between the insulating layer and the at least one conductive metal feature. The combination of the at least one conductive metal feature and the insulating layer can be repeated to form a multi-level interconnect stack.
结构体可以是以下物质的其中一种:含有微电子器件的硅晶片、陶瓷芯片载体、有机芯片载体、玻璃基质、砷化镓晶片、碳化硅晶片、镓晶片或者其他半导体晶片。The structure can be one of the following: silicon wafers containing microelectronic devices, ceramic chip carriers, organic chip carriers, glass substrates, gallium arsenide wafers, silicon carbide wafers, gallium wafers, or other semiconductor wafers.
基质可以是含有电子器件的硅晶片。基质部分地或者全部由以下物质组成:Si、SiO2、SiGe、Ge、Ga、GaAs、Hg、HgTd、InP、In、Al或者任意其他无机或有机性质的半导体材料。The substrate may be a silicon wafer containing electronic devices. The matrix is partially or entirely composed of Si, SiO 2 , SiGe, Ge, Ga, GaAs, Hg, HgTd, InP, In, Al or any other semiconductor material of inorganic or organic nature.
在本发明的第一实施方案中,描述了一种包括有由两个或多个展现出金属扩散阻隔性能的电介质亚层组成的多层电介质扩散阻隔层的互连结构体。这些亚层的至少一个是空气阻隔亚层,该亚层可以是CVD沉积的空气扩散不能渗透的电介质。这些亚层的至少另一个是通过任何基于溶剂的方法(例如旋涂)涂覆的并且介电常数小于3.0的低k值的亚层。可以将该低k值的亚层置于空气阻隔亚层的上面和/或下面。任选地,可以在多层电介质扩散阻隔层中的任意界面上或者在亚层之间的界面上涂覆粘合促进剂。In a first embodiment of the present invention, an interconnect structure comprising a multilayer dielectric diffusion barrier layer consisting of two or more dielectric sublayers exhibiting metal diffusion barrier properties is described. At least one of these sublayers is an air barrier sublayer, which may be a CVD deposited dielectric impermeable to air diffusion. At least one other of these sublayers is a low-k sublayer with a dielectric constant less than 3.0 applied by any solvent-based method, such as spin coating. The low-k sublayer may be placed above and/or below the air barrier sublayer. Optionally, an adhesion promoter may be applied at any interface in the multilayer dielectric diffusion barrier layer or at the interface between sublayers.
在第一实施方案的第一实施例中,多层电介质扩散阻隔层被用作覆盖阻隔层。互连结构体中剩余的电介质可以由通孔级电介质、线条级电介质(其在组成上可以与通孔级电介质相同)、任选的硬掩模层和任选的埋置蚀刻停止层组成。In a first example of the first embodiment, a multilayer dielectric diffusion barrier layer is used as the capping barrier layer. The remaining dielectric in the interconnect structure may consist of via-level dielectric, line-level dielectric (which may be identical in composition to the via-level dielectric), an optional hard mask layer, and an optional buried etch stop layer.
在第一实施方案的第二实施例中,多层电介质扩散阻隔层被同时用作覆盖阻隔层和通孔级电介质。互连结构体中剩余的电介质可以由线条级电介质、任选的硬掩模层和任选的埋置蚀刻停止层组成。In a second example of the first embodiment, a multilayer dielectric diffusion barrier is used both as a capping barrier layer and as a via-level dielectric. The remainder of the dielectric in the interconnect structure may consist of line-level dielectric, an optional hard mask layer, and an optional buried etch stop layer.
在第一实施方案的第三实施例中,多层电介质扩散阻隔层被用作覆盖阻隔层并且在具有由至少两种电介质组成的夹层电介质的互连结构体的上面,其中在金属线下面的通孔级电介质在化学性质上不同于其他区域中的电介质。In a third example of the first embodiment, a multi-layer dielectric diffusion barrier layer is used as a capping barrier layer and overlying an interconnect structure having an interlayer dielectric composed of at least two dielectrics, wherein the metal lines below The via-level dielectric is chemically different from the dielectric in other areas.
本发明的多层电介质扩散阻隔层具有小于4.0的复合介电常数、抑制了金属扩散、起到空气渗透阻隔层的作用,并且对大于400℃的温度热稳定。本发明的多层电介质扩散阻隔层还可以含有孔隙,其进一步降低了介电常数。可以通过将可以是聚合物的牺牲部分除去来产生孔隙。也可以通过涉及到将高沸点溶剂除去的方法来产生孔隙。这些孔隙可以具有0.5-20纳米的尺寸范围并且可以具有闭孔形态。The multi-layer dielectric diffusion barrier layer of the present invention has a complex dielectric constant less than 4.0, inhibits metal diffusion, functions as an air permeation barrier layer, and is thermally stable to temperatures greater than 400°C. The multilayer dielectric diffusion barrier layers of the present invention may also contain porosity, which further lowers the dielectric constant. Porosity can be created by removing a sacrificial portion, which can be a polymer. Porosity can also be created by methods involving the removal of high boiling point solvents. These pores may have a size range of 0.5-20 nanometers and may have a closed cell morphology.
在本发明的第二实施方案中,描述了一种制得多层电介质扩散阻隔层的方法。本发明的多层电介质扩散阻隔层形成于含有暴露的金属和电介质特征体的互连结构体的上面。然后通过化学汽相沉积(或者相关方法)或者通过基于溶剂的方法(例如旋涂)使每一亚层沉积。在每一沉积步骤之后,在随后的亚层沉积之前,薄膜可以在升高的温度下(100-500℃)退火、暴露于电子束下,和/或用紫外线辐照。任选地,可以在多层电介质扩散阻隔层的任何界面上或者在亚层之间的界面上涂覆粘合促进剂。In a second embodiment of the invention, a method of making a multilayer dielectric diffusion barrier is described. The multilayer dielectric diffusion barrier layer of the present invention is formed over an interconnect structure containing exposed metal and dielectric features. Each sublayer is then deposited by chemical vapor deposition (or related methods) or by solvent based methods such as spin coating. After each deposition step, the film can be annealed at elevated temperature (100-500° C.), exposed to electron beams, and/or irradiated with ultraviolet light before deposition of subsequent sublayers. Optionally, an adhesion promoter may be applied to any interface of the multilayer dielectric diffusion barrier layer or to the interface between sublayers.
在本发明的第三实施方案中,描述了多层电介质扩散阻隔层的组成、其亚层和用于形成这些层的前体。至少一个空气阻隔亚层通过基于化学汽相沉积的方法而制得,由此该空气阻隔亚层由氮化硅、碳氮化硅或者一般组成为SivNwCxOyHz的电介质所组成,其中0.1≤v≤0.8,0≤w≤0.8,0.05≤x≤0.8,0≤y≤0.3,0.05≤z≤0.8,v+w+x+y+z=1。至少一个其他的亚层通过采用了溶于溶液中的聚合物预陶瓷前体的基于溶剂的方法而沉积。在形成薄膜时将聚合物预陶瓷前体转化成一般组成为SivNwCxOyHz的不可溶的低k值亚层,其中0.1≤v≤0.8,0≤w≤0.8,0.05≤x≤0.8,0≤y≤0.3,0.05≤z≤0.8,v+w+x+y+z=1。In a third embodiment of the present invention, the composition of a multilayer dielectric diffusion barrier layer, its sublayers and the precursors used to form these layers are described. At least one air-barrier sublayer is produced by a method based on chemical vapor deposition, whereby the air-barrier sublayer consists of silicon nitride, silicon carbonitride or a dielectric generally composed of Si v N w C x O y H z composed of 0.1≤v≤0.8, 0≤w≤0.8, 0.05≤x≤0.8, 0≤y≤0.3, 0.05≤z≤0.8, v+w+x+y+z=1. At least one other sublayer is deposited by a solvent-based method employing a polymeric pre-ceramic precursor dissolved in solution. Conversion of polymeric pre-ceramic precursors into insoluble low-k sublayers with general composition Si v N w C x O y H z in film formation, where 0.1 ≤ v ≤ 0.8, 0 ≤ w ≤ 0.8, 0.05 ≤x≤0.8, 0≤y≤0.3, 0.05≤z≤0.8, v+w+x+y+z=1.
将通过参照结合了附图的以下说明来理解本发明的其他以及另外的目的、优点和特征,在附图中相似的部分被给予了相同的符号。Other and further objects, advantages and features of the present invention will be understood by referring to the following description taken in conjunction with the accompanying drawings in which like parts are given the same symbols.
附图简述Brief description of the drawings
图1是根据本发明的半导体器件的横截面视图。FIG. 1 is a cross-sectional view of a semiconductor device according to the present invention.
图2是根据本发明的另一个半导体器件的横截面视图。FIG. 2 is a cross-sectional view of another semiconductor device according to the present invention.
图3是根据本发明的再一个半导体器件的横截面视图。Fig. 3 is a cross-sectional view of still another semiconductor device according to the present invention.
优选实施方案的描述Description of the preferred embodiment
根据本发明的第一实施方案,互连结构体包括至少一个导电金属特征体,该结构体进一步包括包围导电金属特征体的、由线条级电介质和通孔级电介质组成的夹层介电层,由此描述了一种阻隔金属扩散和空气渗透的多层电介质扩散阻隔层。According to a first embodiment of the present invention, an interconnect structure includes at least one conductive metal feature, the structure further includes an interlayer dielectric layer consisting of a line-level dielectric and a via-level dielectric surrounding the conductive metal feature, consisting of This describes a multilayer dielectric diffusion barrier that blocks metal diffusion and air permeation.
本发明的多层电介质扩散阻隔层的复合介电常数小于4.0、在高于300℃的温度下热稳定、厚度为10-500nm并且由至少两个亚层组成,其中至少一个亚层是空气阻隔亚层,至少另一个亚层是低k值的亚层。本发明的多层电介质扩散阻隔层可以具有多种构型,这些构型包括,例如低k值的亚层在空气阻隔亚层上面的双层、空气阻隔亚层在低k值的亚层上面的双层,或者空气阻隔亚层被置于两个低k值的亚层之间的三层。The multilayer dielectric diffusion barrier of the present invention has a composite dielectric constant of less than 4.0, is thermally stable at temperatures above 300° C., has a thickness of 10-500 nm and consists of at least two sublayers, at least one of which is an air barrier sub-layers, at least one other sub-layer is a low k-value sub-layer. The multilayer dielectric diffusion barriers of the present invention can have a variety of configurations including, for example, bilayers with a low-k sublayer on top of an air barrier sublayer, air barrier sublayers on top of a low k sublayer A bilayer, or air barrier sublayer is placed in three layers between two low-k sublayers.
空气阻隔亚层是空气不能渗透的电介质、介电常数为3.4-7.2、厚度为5-100nm,可以阻隔金属扩散,并且通过基于汽相沉积的方法而沉积,这些方法包括,例如化学汽相沉积、等离子体增强的化学汽相沉积、物理汽相沉积或者任何相关的方法。其可以是组成为SivNwCxOyHz的电介质,其中0.1≤v≤0.8,0≤w≤0.8,0.05≤x≤0.8,0≤y≤0.3,0.05≤z≤0.8并且v+w+x+y+z=1。空气阻隔亚层的例子包括,例如氮化硅、碳氮化硅、氧氮化硅、二氧化硅、碳化硅和氟化玻璃。The air-barrier sublayer is an air-impermeable dielectric with a dielectric constant of 3.4-7.2 and a thickness of 5-100 nm that can block metal diffusion and is deposited by vapor-phase deposition-based methods including, for example, chemical vapor deposition , plasma enhanced chemical vapor deposition, physical vapor deposition or any related method. It may be a dielectric of composition Si v N w C x O y H z , where 0.1 ≤ v ≤ 0.8, 0 ≤ w ≤ 0.8, 0.05 ≤ x ≤ 0.8, 0 ≤ y ≤ 0.3, 0.05 ≤ z ≤ 0.8 and v +w+x+y+z=1. Examples of air barrier sublayers include, for example, silicon nitride, silicon carbonitride, silicon oxynitride, silicon dioxide, silicon carbide, and fluorinated glass.
低k值的亚层是介电常数小于3.3的电介质、阻隔了金属扩散、厚度为5-500nm,并且通过基于溶剂的方法而形成,这些方法包括,但不限于:旋涂、喷涂、扫描涂覆和浸涂。低k值的亚层可以是组成为SivNwCxOyHz的电介质,其中0.1≤v≤0.8,0≤w≤0.8,0.05≤x≤0.8,0≤y≤0.3,0.05≤z≤0.8并且v+w+x+y+z=1。低k值的亚层可以含有孔隙,其中该孔隙可以具有0.5-20nm的尺寸范围并且可以具有闭孔形态。The low-k sublayer is a dielectric with a dielectric constant less than 3.3, blocks metal diffusion, has a thickness of 5-500nm, and is formed by solvent-based methods including, but not limited to: spin coating, spray coating, scanning coating Covering and dip coating. Sublayers with low k values can be dielectrics of composition Si v N w C x O y H z , where 0.1 ≤ v ≤ 0.8, 0 ≤ w ≤ 0.8, 0.05 ≤ x ≤ 0.8, 0 ≤ y ≤ 0.3, 0.05 ≤ z≦0.8 and v+w+x+y+z=1. The low-k sublayer may contain pores, wherein the pores may have a size range of 0.5-20 nm and may have a closed cell morphology.
本发明的互连结构体进一步由至少一种低介电常数材料组成。低介电常数材料可以是本领域已知的任意电介质,这些电介质包括,例如自旋(spin-on)的体系如:聚硅氧烷、聚倍半硅氧烷、聚亚芳基物质、聚亚芳基醚,或者通过汽相沉积方法所产生的电介质薄膜,该薄膜的组成可以是SivNwCxOyHz,其中0.05≤v≤0.8,0≤w≤0.9,0.05≤x≤0.8,0≤y≤0.8,0.05≤z≤0.8,v+w+x+y+z=1。此外,本发明的低介电常数材料可以是多孔的。最后,低介电常数材料可以是空气或者惰性气体。The interconnect structure of the present invention further consists of at least one low dielectric constant material. The low dielectric constant material can be any dielectric known in the art including, for example, spin-on systems such as polysiloxanes, polysilsesquioxanes, polyarylenes, poly Arylene ether, or a dielectric film produced by vapor deposition method, the composition of the film can be Si v N w C x O y H z , where 0.05≤v≤0.8, 0≤w≤0.9, 0.05≤x ≤0.8, 0≤y≤0.8, 0.05≤z≤0.8, v+w+x+y+z=1. In addition, the low dielectric constant material of the present invention may be porous. Finally, the low-k material can be air or an inert gas.
另外,本发明的互连结构体进一步由导电金属特征体组成,该特征体可以由铜、银、金、铝及其合金所组成。导电金属线可以包括在顶面上的金属,该金属降低了可由包括钴、钨、磷及其组合的物质所组成的互连结构体的电迁移特性。导电金属线可以包括在顶面上的部分,该部分减小了金属线的氧化倾向。该部分的例子包括:苯并三唑、胺、酰胺、酰亚胺、硫酯、硫醚、脲、氨基甲酸酯、腈、异氰酸酯、硫醇、砜、膦、氧化膦、磷酰亚胺、吡啶、咪唑、酰亚胺、噁唑、苯并噁唑、噻唑、吡唑、三唑、噻吩、噁二唑、噻嗪、噻唑、喹喔啉、苯并咪唑、羟吲哚和二氢吲哚。Additionally, the interconnect structure of the present invention is further comprised of conductive metal features, which may be comprised of copper, silver, gold, aluminum, and alloys thereof. The conductive metal lines may include a metal on the top surface that reduces the electromigration properties of the interconnect structure that may be composed of substances including cobalt, tungsten, phosphorus, and combinations thereof. The conductive metal line may include a portion on the top surface that reduces the tendency of the metal line to oxidize. Examples of this moiety include: benzotriazoles, amines, amides, imides, thioesters, thioethers, ureas, carbamates, nitriles, isocyanates, thiols, sulfones, phosphines, phosphine oxides, phosphoramidites , pyridine, imidazole, imide, oxazole, benzoxazole, thiazole, pyrazole, triazole, thiophene, oxadiazole, thiazine, thiazole, quinoxaline, benzimidazole, oxindole and dihydro indole.
此外,本发明的互连结构体进一步由被用于防止金属扩散的含有衬里金属的阻隔层所组成。含有衬里金属的阻隔层可由以下物质组成:钽、氮化钽、钨、钛、氮化钛、钌、TiSiN及其组合。In addition, the interconnect structure of the present invention further consists of a barrier layer containing a liner metal that is used to prevent metal diffusion. Barrier layers containing liner metals can be composed of tantalum, tantalum nitride, tungsten, titanium, titanium nitride, ruthenium, TiSiN, and combinations thereof.
最后,任选的硬掩模电介质和电介质蚀刻停止层可以存在于本发明的结构体中。这些电介质材料的说明性例子包括聚硅氧烷、聚硅倍半氧烷,或者任意CVD沉积的组成为SivNwCxOyHz的电介质,其中0.05≤v≤0.8,0≤w≤0.9,0.05≤x≤0.8,0≤y≤0.8,0.05≤z≤0.8,v+w+x+y+z=1。Finally, optional hard mask dielectrics and dielectric etch stop layers may be present in structures of the present invention. Illustrative examples of these dielectric materials include polysiloxane, polysilsesquioxane, or any CVD deposited dielectric of composition Si v N w C x O y H z where 0.05 ≤ v ≤ 0.8, 0 ≤ w ≤0.9, 0.05≤x≤0.8, 0≤y≤0.8, 0.05≤z≤0.8, v+w+x+y+z=1.
参照图1,在第一实施方案中示出了由多级1000组成的互连结构体40的例子,其中每一级可以由通孔级1100和线条级1200组成。该互连结构体含有导电金属特征体33,其横穿过结构体并且可以与含有衬里金属的阻隔层34具有界面。该导电金属特征体和含有衬里金属的阻隔层被电介质包围。通孔级中的电介质包括低介电常数材料32和本发明的多层电介质扩散阻隔层39,该阻隔层由至少两个亚层组成——空气阻隔亚层36和低k值的亚层38。线条级1200中的电介质包括低介电常数材料31和任选的硬掩模电介质41。任选地,可以将电介质蚀刻停止层37置于通孔级和线条级(32&31)中的低介电常数材料之间。通孔级和线条级(分别为32&31)中的低介电常数材料可以在组成上相同或者可以在化学性质上不同。Referring to FIG. 1 , an example of an
参照图2,在第一实施方案中示出了另一个由多级1000组成的互连结构体40的例子,其中每一级可以由通孔级1100和线条级1200组成。该互连结构体含有导电金属特征体33,其横穿过结构体并且可以与含有衬里金属的阻隔层34具有界面。该导电金属特征体和含有衬里金属的阻隔层被电介质包围。通孔级中的电介质包括本发明的多层电介质扩散阻隔层39,该阻隔层由至少两个亚层组成——空气阻隔亚层36和低k值的亚层38。线条级中的电介质包括低介电常数材料31和任选的硬掩模电介质41。任选地,可以将电介质蚀刻停止层37置于线条级31中的低介电常数材料与多层电介质扩散阻隔层39之间。Referring to FIG. 2 , another example of an
参照图3,在第一实施方案中示出了另一个由多级1000组成的互连结构体40的例子,其中每一级可以由通孔级1100和线条级1200组成。该互连结构体含有导电金属特征体33,其横穿过结构体并且可以与含有衬里金属的阻隔层34具有界面。该导电金属特征体和含有衬里金属的阻隔层被电介质包围。线条级中的电介质包括低介电常数材料43。通孔级中的电介质包括:在不直接处于导电金属线下面的区域中相同的低介电常数材料43、存在于导电金属线下面的化学性质不同的低介电常数材料42,和本发明的多层电介质扩散阻隔层。任选地,可以将电介质蚀刻停止层37置于低介电常数材料42与在其上面的含有衬里金属的阻隔层34之间。Referring to FIG. 3 , another example of an
粘合促进剂可以存在于多层电介质扩散阻隔层与在多层电介质扩散阻隔层上面和/或下面的介电层之间。另外,粘合促进剂可以存在于多层电介质扩散阻隔层的亚层之间。粘合促进剂可以选自SiaLbRc,其中L选自羟基、甲氧基、乙氧基、乙酰氧基、烷氧基、羧基、胺、卤素,R选自氢化物、甲基、乙基、乙烯基和苯基(任意烷基或芳基),a为0.25-0.5,b为0.1-0.8,c为0-0.7,并且总和a+b+c为1。可用于本发明的粘合促进剂的例子包括:六甲基二硅氮烷、乙烯基三乙酰氧基硅烷、氨基丙基三甲氧基硅烷和乙烯基三甲氧基硅烷。Adhesion promoters may be present between the multilayer dielectric diffusion barrier layer and the dielectric layers above and/or below the multilayer dielectric diffusion barrier layer. Additionally, adhesion promoters may be present between sublayers of the multilayer dielectric diffusion barrier layer. Adhesion promoters may be selected from Si a L b R c where L is selected from hydroxyl, methoxy, ethoxy, acetoxy, alkoxy, carboxyl, amine, halogen and R is selected from hydride, methyl , ethyl, vinyl and phenyl (any alkyl or aryl), a is 0.25-0.5, b is 0.1-0.8, c is 0-0.7, and the sum of a+b+c is 1. Examples of adhesion promoters that can be used in the present invention include: hexamethyldisilazane, vinyltriacetoxysilane, aminopropyltrimethoxysilane, and vinyltrimethoxysilane.
根据本发明的第二实施方案,描述了一种形成多层电介质扩散阻隔层的方法,其包括:通过基于溶剂的方法涂覆聚合物预陶瓷前体涂层;将聚合物预陶瓷前体转化成低k值的亚层;和涂覆空气阻隔亚层涂层。According to a second embodiment of the present invention, a method of forming a multilayer dielectric diffusion barrier is described, comprising: applying a polymeric preceramic coating by a solvent-based method; converting the polymeric preceramic forming a low k value sublayer; and applying an air barrier sublayer coating.
基于溶剂的方法被用于使聚合物预陶瓷前体从溶液中沉积以制得薄膜,并且可以通过本领域已知的任意方法来进行且可以是以下的其中一种:施涂、喷涂、扫描涂覆或者浸涂。通过使用包括例如热固化、电子辐射、离子辐射、采用紫外线和/或可见光的辐射的任意合适方法的一种或组合将聚合物预陶瓷前体薄膜转化成低k值的亚层。可以在惰性气氛下和/或在超过400℃的温度下进行热固化。在聚合物预陶瓷前体转化成低k值的亚层期间可能出现交联机理。Solvent based methods are used to deposit polymeric pre-ceramic precursors from solution to make thin films and can be done by any method known in the art and can be one of the following: application, spraying, scanning Coating or dipping. The polymeric pre-ceramic precursor film is converted into a low-k sublayer by using one or a combination of any suitable method including, for example, thermal curing, electron radiation, ionizing radiation, radiation with ultraviolet light and/or visible light. Thermal curing may be performed under an inert atmosphere and/or at temperatures in excess of 400°C. A crosslinking mechanism may occur during the conversion of the polymeric pre-ceramic precursor into the low-k sublayer.
可以采用用于在低k值的亚层中产生孔隙的方法。可以通过将牺牲部分共溶于含有聚合物预陶瓷前体的溶液中来形成孔隙。在聚合物预陶瓷前体转化成低k值的亚层时,牺牲部分可以是聚合物材料,该材料分解成低分子量副产物并且从薄膜中排出。作为选择,可以由采用高沸点溶剂的方法来形成孔隙,该溶剂在聚合物预陶瓷前体转化成低k值的亚层期间从薄膜中排出。Methods for creating porosity in low-k sublayers can be employed. Pores can be formed by co-dissolving the sacrificial moiety in a solution containing the polymeric pre-ceramic precursor. Upon conversion of the polymeric pre-ceramic precursor into a low-k sublayer, the sacrificial portion may be a polymeric material that decomposes into low molecular weight by-products and is expelled from the film. Alternatively, porosity can be formed by using a high boiling point solvent that is expelled from the film during conversion of the polymeric pre-ceramic precursor to the low-k sublayer.
通过本领域已知的任意基于汽相的沉积方法来涂覆空气阻隔亚层,这些方法包括,例如化学汽相沉积、等离子体增强的化学汽相沉积和物理汽相沉积。可以通过使用任意合适的方法的一种或组合使空气阻隔亚层退火,这些方法包括,例如热固化、电子辐射、离子辐射、采用紫外线和/或可见光的辐射。可以在惰性气氛下和/或在超过400℃的温度下进行热固化。可以在退火过程期间进行空气阻隔亚层的进一步致密化。The air barrier sublayer is applied by any vapor-based deposition method known in the art, including, for example, chemical vapor deposition, plasma enhanced chemical vapor deposition, and physical vapor deposition. The air barrier sublayer may be annealed by using one or a combination of any suitable methods including, for example, thermal curing, electron radiation, ionizing radiation, radiation using ultraviolet and/or visible light. Thermal curing may be performed under an inert atmosphere and/or at temperatures in excess of 400°C. Further densification of the air barrier sublayer can be performed during the annealing process.
可以同时进行空气阻隔亚层的退火和将聚合物预陶瓷前体转化成低k值的亚层。此外,这些退火步骤可以与包括低介电常数材料、硬掩模和/或埋置蚀刻停止层的其他层的退火过程相一致。Annealing of the air barrier sublayer and conversion of the polymeric pre-ceramic precursor to a low-k sublayer can be performed simultaneously. Additionally, these annealing steps may coincide with the annealing process of other layers including low-k materials, hardmasks, and/or buried etch stop layers.
许多步骤可用于增强亚层对其他亚层以及对邻近层的粘合性。一个例子是前述粘合促进剂的使用。可以在任意的亚层沉积之前或之后将粘合促进剂涂覆到基质上。对于低k值的亚层而言,粘合促进剂可以共溶于含有聚合物预陶瓷前体的溶液中并且可以在涂覆期间或者在聚合物预陶瓷前体转化成低k值的亚层期间离析到薄膜界面上。作为选择,可以在聚合物预陶瓷前体转化成低k值的亚层之前将粘合促进剂涂覆到由聚合物预陶瓷前体组成的薄膜上。最后,为了改进所暴露的薄膜的表面和增强粘合性,可以将使用活性等离子体的干蚀刻方法用于任意的亚层、任意亚层下面的层,和由聚合物预陶瓷前体组成的薄膜。A number of steps can be used to enhance the adhesion of sublayers to other sublayers and to adjacent layers. An example is the use of the aforementioned adhesion promoters. The adhesion promoter can be applied to the substrate either before or after the deposition of any sublayers. For the low-k sublayer, the adhesion promoter can be co-dissolved in the solution containing the polymeric preceramic and can be converted to the low-k sublayer during coating or after the polymeric preceramic Segregated to the film interface during this period. Alternatively, an adhesion promoter can be applied to the film composed of the polymeric preceramic precursor prior to conversion of the polymeric preceramic precursor into the low-k sublayer. Finally, to improve the surface of the exposed film and enhance adhesion, dry etching methods using reactive plasmas can be used for any sublayers, layers below any sublayers, and layers composed of polymeric pre-ceramic precursors. film.
在多层电介质扩散阻隔层沉积之前还可以将用来清洗或者消除从其他过程中残留的任意化学物质的方法用于基质上。该清洗可以包括将基质暴露于酸、碱和/或有机溶剂下。该清洗还可以涉及到干蚀刻方法。Methods to clean or remove any remaining chemicals from other processes may also be used on the substrate prior to the deposition of the multilayer dielectric diffusion barrier layer. The cleaning may include exposing the substrate to acids, bases and/or organic solvents. The cleaning can also involve dry etching methods.
根据本发明的第三实施方案,描述了一种用于形成多层电介质扩散阻隔层的组成物,其包括:用于通过基于溶剂的方法涂覆低k值的亚层的溶剂、转化成低k值的亚层的聚合物预陶瓷前体,和空气阻隔亚层。According to a third embodiment of the present invention, a composition for forming a multilayer dielectric diffusion barrier is described, comprising: a solvent for coating a low-k sublayer by a solvent-based method, converted to a low-k The k-value sublayer is a polymer pre-ceramic precursor, and the air barrier sublayer.
聚合物预陶瓷前体可以是含硅的体系并且可以由以下物质组成:聚硅氮烷、聚碳硅烷、聚硅杂硅氮烷、聚硅烷、聚硅杂碳硅烷、聚硅氧氮烷、聚碳硅氮烷、聚甲硅烷基碳二酰亚胺、聚硅倍半氮烷、聚硅倍半氮烷和聚硅杂碳硅氮烷。非常优选的聚合物前体是聚脲甲基乙烯基硅氮烷(KiON)。聚合物预陶瓷前体可以含有聚硅氧烷或聚硅倍半氧烷的一些组分。聚合物预陶瓷前体可以含有连接到主链上的垂悬的官能团,这些官能团包括氢、乙烯基、烯丙基、烷氧基、甲硅烷基和烷基。聚合物预陶瓷前体可以含有连接到主链上的可以具有金属连接性能的垂悬的官能团,这些官能团包括:胺、酰胺、酰亚胺、硫酯、硫醚、脲、氨基甲酸酯、腈、异氰酸酯、硫醇、砜、膦、氧化膦、磷酰亚胺、苯并三唑、吡啶、咪唑、酰亚胺、噁唑、苯并噁唑、噻唑、吡唑、三唑、噻吩、噁二唑、噻嗪、噻唑、喹喔啉、苯并咪唑、羟吲哚和二氢吲哚。聚合物预陶瓷前体的分子量可以为500-1,000,000道尔顿。聚合物预陶瓷前体可以是均聚物、无规共聚物、嵌段共聚物或者聚合物共混物,并且可以具有任意的链结构,这些链结构包括线型、网状、支化和树枝状。聚合物预陶瓷前体的组成可以为SivNwCxOyHz,其中0.1≤v≤0.8,0≤w≤0.8,0.05≤x≤0.8,0≤y≤0.3,0.05≤z≤0.8并且v+w+x+y+z=1。The polymeric pre-ceramic precursors may be silicon-containing systems and may consist of polysilazanes, polycarbosilanes, polysilasasilazanes, polysilanes, polysilacarbosilanes, polysiloxazanes, Polycarbosilazanes, polysilylcarbodiimides, polysilsesquiazanes, polysilsesquiazanes, and polysilasacarbosilazanes. A very preferred polymer precursor is polyureamethylvinylsilazane (KiON). The polymeric pre-ceramic precursor may contain polysiloxanes or some components of polysilsesquioxanes. The polymeric pre-ceramic precursors may contain pendant functional groups attached to the backbone, these functional groups include hydrogen, vinyl, allyl, alkoxy, silyl and alkyl groups. The polymeric pre-ceramic precursors may contain pendant functional groups attached to the backbone which may have metal attachment properties, these functional groups include: amines, amides, imides, thioesters, thioethers, ureas, carbamates, Nitrile, isocyanate, thiol, sulfone, phosphine, phosphine oxide, phosphorimide, benzotriazole, pyridine, imidazole, imide, oxazole, benzoxazole, thiazole, pyrazole, triazole, thiophene, Oxadiazoles, thiazines, thiazoles, quinoxalines, benzimidazoles, oxindole and indoline. The polymeric pre-ceramic precursor may have a molecular weight of 500-1,000,000 Daltons. The polymeric pre-ceramic precursors can be homopolymers, random copolymers, block copolymers or polymer blends and can have any chain structure including linear, network, branched and dendritic shape. The composition of the polymer pre-ceramic precursor can be Si v N w C x O y H z , where 0.1 ≤ v ≤ 0.8, 0 ≤ w ≤ 0.8, 0.05 ≤ x ≤ 0.8, 0 ≤ y ≤ 0.3, 0.05 ≤ z ≤ 0.8 and v+w+x+y+z=1.
基于溶剂的方法涉及到溶于有机溶剂中的聚合物预陶瓷前体的溶液。有机溶剂可以是以下溶剂的一种或组合:丙二醇甲醚乙酸酯(PGMEA)、丙二醇甲醚(PGME)、甲苯、二甲苯、茴香醚、莱、丁内酯、环己酮、己酮、乳酸乙酯和庚酮。溶液可以含有抗条纹剂,其与聚合物预陶瓷前体共溶以制得高均匀性的薄膜。抗条纹剂的数量可以少于含有聚合物预陶瓷前体的溶液的1%。粘合促进剂也可以共溶于含有聚合物预陶瓷前体的溶液中。粘合促进剂可以选自SiaLbRc,其中L选自羟基、甲氧基、乙氧基、乙酰氧基、烷氧基、羧基、胺、卤素,R选自氢化物、甲基、乙基、乙烯基和苯基(任意烷基或芳基),a为0.25-0.5,b为0.1-0.8,c为0-0.7,并且总和a+b+c为1。粘合促进剂可以是:六甲基二硅氮烷、乙烯基三乙酰氧基硅烷、氨基丙基三甲氧基硅烷、乙烯基三甲氧基硅烷及其组合。粘合促进剂可以少于含有聚合物预陶瓷前体的溶液的2%。Solvent-based methods involve solutions of polymeric pre-ceramic precursors dissolved in organic solvents. The organic solvent can be one or a combination of the following solvents: propylene glycol methyl ether acetate (PGMEA), propylene glycol methyl ether (PGME), toluene, xylene, anisole, radish, butyrolactone, cyclohexanone, hexanone, Ethyl Lactate and Heptanone. The solution may contain an anti-striation agent that is co-dissolved with the polymeric pre-ceramic precursor to produce a film of high uniformity. The amount of anti-striation agent may be less than 1% of the solution containing the polymeric pre-ceramic precursor. The adhesion promoter can also be co-dissolved in the solution containing the polymeric pre-ceramic precursor. Adhesion promoters may be selected from Si a L b R c where L is selected from hydroxyl, methoxy, ethoxy, acetoxy, alkoxy, carboxyl, amine, halogen and R is selected from hydride, methyl , ethyl, vinyl and phenyl (any alkyl or aryl), a is 0.25-0.5, b is 0.1-0.8, c is 0-0.7, and the sum of a+b+c is 1. The adhesion promoter can be: hexamethyldisilazane, vinyltriacetoxysilane, aminopropyltrimethoxysilane, vinyltrimethoxysilane, and combinations thereof. The adhesion promoter may be less than 2% of the solution containing the polymeric pre-ceramic precursor.
产生孔隙的牺牲部分可以共溶于含有聚合物预陶瓷前体的溶液中。牺牲部分可以是牺牲的聚合物材料,该材料分解成低分子量副产物并且在聚合物预陶瓷前体转化成低k值的亚层期间从薄膜中排出。牺牲的聚合物材料可以是以下物质的其中一种、组合或者共聚物:聚苯乙烯、聚酯、聚甲基丙烯酸酯、聚丙烯酸酯和聚二醇、聚酰胺以及聚降冰片烯。牺牲部分可以是高沸点溶剂。The porosity-generating sacrificial portion can be co-dissolved in a solution containing the polymeric pre-ceramic precursor. The sacrificial moiety may be a sacrificial polymeric material that decomposes into low molecular weight by-products and is expelled from the film during conversion of the polymeric pre-ceramic precursor into a low-k sublayer. The sacrificial polymeric material may be one, combination or copolymer of the following: polystyrene, polyester, polymethacrylate, polyacrylate and polyglycol, polyamide and polynorbornene. The sacrificial portion may be a high boiling point solvent.
在聚合物预陶瓷前体转化成低k值的亚层时,低k值的亚层的组成可以为SivNwCxOyHz,其中0.1≤v≤0.8,0≤w≤0.8,0.05≤x≤0.8,0≤y≤0.3,0.05≤z≤0.8,v+w+x+y+z=1。低k值亚层的更优选的组成为SivNwCxOyHz,其中v=0.16±0.05,w=0.17±0.05,x=0.17±0.05,y=0,z=0.5±0.1,v+w+x+y+z=1。When the polymer pre-ceramic precursor is converted into a low-k sublayer, the composition of the low-k sublayer can be Si v N w C x O y H z , where 0.1≤v≤0.8, 0≤w≤0.8 , 0.05≤x≤0.8, 0≤y≤0.3, 0.05≤z≤0.8, v+w+x+y+z=1. A more preferred composition of the low-k sublayer is Si v N w C x O y H z , where v = 0.16 ± 0.05, w = 0.17 ± 0.05, x = 0.17 ± 0.05, y = 0, z = 0.5 ± 0.1 , v+w+x+y+z=1.
空气阻隔亚层的组成可以为SivNwCxOyHz,其中0.1≤v≤0.8,0≤w≤0.8,0.05≤x≤0.8,0≤y≤0.3,0.05≤z≤0.8,v+w+x+y+z=1。空气阻隔亚层的优选组成为SivNwCxOyHz,其中v=0.28±0.05,w=0.12±0.05,x=0.28±0.05,y=0,z=0.32±0.05,v+w+x+y+z=1。空气阻隔亚层的另一种优选组成为SivNwCxOyHz,其中v=0.28±0.05,w=0,x=0.32±0.05,y=0,z=0.4±0.10,v+w+x+y+z=1。The composition of the air barrier sublayer can be Si v N w C x O y H z , where 0.1≤v≤0.8, 0≤w≤0.8, 0.05≤x≤0.8, 0≤y≤0.3, 0.05≤z≤0.8, v+w+x+y+z=1. A preferred composition of the air barrier sublayer is Si v N w C x O y H z , where v=0.28±0.05, w=0.12±0.05, x=0.28±0.05, y=0, z=0.32±0.05, v+ w+x+y+z=1. Another preferred composition of the air barrier sublayer is Si v N w C x O y H z , where v=0.28±0.05, w=0, x=0.32±0.05, y=0, z=0.4±0.10, v +w+x+y+z=1.
尽管已经参照其优选实施方案特别示出和描述了本发明,但本领域那些技术人员将理解的是可以作出前述和其他的形式和细节上的变化,只要不偏离本发明的精神和范围。因此这意味着:本发明并不限于所描述和所阐述的确切形式和细节,但落入了附属的权利要求书的范围内。While the invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that the foregoing and other changes in form and details may be made without departing from the spirit and scope of the invention. It is therefore meant that the invention not be limited to the exact forms and details described and illustrated, but falls within the scope of the appended claims.
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| CN101958311A (en) * | 2009-07-14 | 2011-01-26 | 国际商业机器公司 | Semiconductor structure and formation method |
| CN102034748B (en) * | 2009-09-28 | 2012-10-31 | 中芯国际集成电路制造(上海)有限公司 | Integrated circuit device and preparation method thereof |
| CN103579094A (en) * | 2012-07-18 | 2014-02-12 | 格罗方德半导体公司 | Processes for forming integrated circuits with post-patterning treament |
| CN103681555A (en) * | 2012-08-29 | 2014-03-26 | 台湾积体电路制造股份有限公司 | Structure to increase resistance to electromigration |
| CN103839873A (en) * | 2012-11-21 | 2014-06-04 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing semiconductor device |
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| CN101958311A (en) * | 2009-07-14 | 2011-01-26 | 国际商业机器公司 | Semiconductor structure and formation method |
| CN101958311B (en) * | 2009-07-14 | 2013-01-02 | 国际商业机器公司 | Semiconductor structure and forming method |
| CN102034748B (en) * | 2009-09-28 | 2012-10-31 | 中芯国际集成电路制造(上海)有限公司 | Integrated circuit device and preparation method thereof |
| CN103579094A (en) * | 2012-07-18 | 2014-02-12 | 格罗方德半导体公司 | Processes for forming integrated circuits with post-patterning treament |
| CN103681555A (en) * | 2012-08-29 | 2014-03-26 | 台湾积体电路制造股份有限公司 | Structure to increase resistance to electromigration |
| CN103681555B (en) * | 2012-08-29 | 2016-10-05 | 台湾积体电路制造股份有限公司 | Increase the structure to electromigratory resistance |
| CN103839873A (en) * | 2012-11-21 | 2014-06-04 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing semiconductor device |
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