CN1889030A - Device and method for simulating hard disk - Google Patents
Device and method for simulating hard disk Download PDFInfo
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- CN1889030A CN1889030A CN 200510080182 CN200510080182A CN1889030A CN 1889030 A CN1889030 A CN 1889030A CN 200510080182 CN200510080182 CN 200510080182 CN 200510080182 A CN200510080182 A CN 200510080182A CN 1889030 A CN1889030 A CN 1889030A
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Abstract
The invention discloses a device and a method for simulating a hard disk, which comprises a core logic chip, a main memory module and a setting module, wherein the setting module is used for setting the main memory module to be provided with a memory access area and a hard disk access area, and the core logic chip comprises a memory controller and a conversion interface controller and is respectively used for controlling the data reading of the memory access area and the hard disk access area. Therefore, when the core logic chip receives a read-write signal sent by the computer system to the main memory module, the read-write signal is judged to belong to a memory read-write signal or a hard disk read-write signal, and if the read-write signal belongs to the memory read-write signal, the read-write signal is transmitted to the memory controller; and if the read-write signal is judged to belong to the hard disk read-write signal, the read-write signal is transmitted to the conversion interface controller. Therefore, the invention can improve the overall speed of the computer.
Description
Technical field
The present invention relates to a kind of devices and methods therefor of analog hard disk, particularly relate to a kind of devices and methods therefor of realizing analog hard disk with internal memory.
Background technology
Because computing machine is day by day popularized, and the function of computing machine is also more and more stronger, therefore the periphery of many support computing machines is equipped with and also and then becomes many, as: calculating punch, USB device, 1394 devices ... adding software engineering also and then promotes, software category miscellaneous also presents variation, and these factors have attracted the user to continue to use a computer, computing machine has become indispensable the same instrument in the life, so is often also storing data miscellaneous in the computing machine and using for the user.
But for computing machine, but be that a lot of times are arranged is to be wasted in to search on the data, and many data all are to be placed in the hard disk, because the characteristic of this body structure of hard disk, there be the rotational time (rotation time) of many consumptions at data search time of moving head (seek-time) and Spindle Motor the access time that it spent, and these are to cause the access speed of hard disc data and the main cause that can't mention in the same breath with internal memory.Also because of so when the data in the computing machine reading writing harddisk, even if the central processing unit arithmetic speed is fast again, the time of the inter-process data of the hard disk that still clamps on own.
And for the speed that how to promote hard disk, as U.S. Pat 5,594,926 disclose a kind of system that accelerates hard disk speed, its IO instruction that conventional central processor is sent splits into two operations reading and write and can be performed simultaneously, and utilize the programmable buffer to adjust hard disk IO cycle length, to be compatible with the speed of different hard disks.And aforesaid United States Patent (USP) remains data is placed in the hard disk, therefore when again hard disk being carried out data read, needing still can't to avoid the consumption of the rotational time (rotation time) of data search time (seek-time) of moving head and Spindle Motor.
Summary of the invention
Technical matters to be solved by this invention provides a kind of devices and methods therefor of analog hard disk, rotates the technical matters that causes time loss because of moving head and Spindle Motor when the solution prior art is carried out data read to hard disk.
For achieving the above object, the invention provides a kind of device of analog hard disk, be applied to a computer system, its characteristics are, comprising: a main memory module comprises an internal memory at least; One setting module has a memory access district and a harddisk access district in order to set this main memory module; And a core logic chipset, comprising: a core logic body, control the reading and writing data of this main memory module; One Memory Controller Hub, signal are connected to this core logic body, receive a memory read-write signal and in order to control the reading and writing data in this memory access district; One translation interface controller, signal are connected to this core logic body, receive a disk read-write signal and in order to control the reading and writing data in this harddisk access district, this translation interface controller also becomes this memory read-write signal with this disk read-write conversion of signals; This core logic body receives this computer system and sends a read-write to this main memory module, and judge that this read-write is to belong to this memory read-write signal or this disk read-write signal, when judging this read-write and belong to this memory read-write signal, this read-write is sent to this Memory Controller Hub; And when judging this read-write and belong to this disk read-write signal, this read-write is sent to this translation interface controller.
The device of above-mentioned analog hard disk, its characteristics are, save as volatile ram in this.
The device of above-mentioned analog hard disk, its characteristics are that this setting module is a Basic Input or Output System (BIOS).
The device of above-mentioned analog hard disk, its characteristics are that this core logic chipset is a north bridge chips.
The device of above-mentioned analog hard disk, its characteristics are that this core logic chipset is for integrating the chip of north bridge and south bridge.
The device of above-mentioned analog hard disk, its characteristics are that this translation interface controller is the controller of hard-disk interface transpose memory interface.
The device of above-mentioned analog hard disk, its characteristics are, also advance one one and comprise a power supply, and signal is connected to this main memory module.
The device of above-mentioned analog hard disk, its characteristics are that this power supply is source current or the battery fully in this computer system.
In order better to realize purpose of the present invention, the present invention also provides a kind of method of analog hard disk, be applied to a computer system, its characteristics are that a main memory module that comprises the following steps: to set in this computer system has a memory access district and a harddisk access district; One core logic chipset is provided, and this core logic chipset is provided with a Memory Controller Hub of the data access of controlling this memory access district and a translation interface controller of controlling the data access in this harddisk access district; When this core logic chipset receives this computer system and sends a read-write to this main memory module, judge that this read-write is to belong to memory read-write signal or disk read-write signal; When judging this read-write and belong to the memory read-write signal, this read-write is sent to this Memory Controller Hub; And when judging this read-write and belong to the disk read-write signal, this read-write is sent to this translation interface controller.
The method of above-mentioned analog hard disk, its characteristics are that this setting step is set this main memory module by the Basic Input or Output System (BIOS) in this computer system.
The method of above-mentioned analog hard disk, its characteristics are that this core logic chipset is a north bridge chips.
The method of above-mentioned analog hard disk, its characteristics are that this core logic chipset is for integrating the chip of north bridge and south bridge.
The method of above-mentioned analog hard disk, its characteristics are that this translation interface controller is the controller of hard-disk interface transpose memory interface.
The method of above-mentioned analog hard disk, its characteristics are, also further comprise: provide a power supply to be supplied to this main memory module.
The method of above-mentioned analog hard disk, its characteristics are that this power supply is backup battery or the battery in this computer system.
Technique effect of the present invention is:
Adopt the devices and methods therefor of analog hard disk of the present invention, in main memory module, provide analog hard disk for use, because adopt internal memory to come analog hard disk, when being carried out data read, analog hard disk can not cause time loss, therefore the bulk velocity that deposit data wherein can effectively be promoted computing machine because of moving head and Spindle Motor rotation.
Further describe specific embodiments of the invention below in conjunction with accompanying drawing.
Description of drawings
Fig. 1 is the system framework figure of preferred embodiment of the present invention;
Fig. 2 is the system framework figure of another preferred embodiment of the present invention; And
Fig. 3 is the process flow diagram of preferred embodiment of the present invention.
Wherein, description of reference numerals is as follows:
10 central processing units
11,17 core logic chipsets
111 core logic bodies
112 Memory Controller Hub
121 internal memories
113 translation interface controllers
12 main memory modules
121 internal memories
13 setting modules
14 South Bridge chips
15 hard disks
Embodiment
The present invention proposes a kind of devices and methods therefor of analog hard disk, allow internal memory in the computer system have the feature operation of harddisk access, because the speed of internal memory reading of data is far faster than hard disk, therefore the present invention utilizes segment space in the internal memory as analog hard disk, data are put this space, to improve the bulk velocity of computing machine.
See also Fig. 1, it is the system framework figure of one of preferred embodiment of the present invention, present embodiment includes: a central processing unit 10, a core logic chipset 11, a main memory module 12, a setting module 13, a South Bridge chip 14 and a hard disk 15, wherein core logic chipset 11 also further includes: a core logic body 111, a Memory Controller Hub 112 and a translation interface controller 113.And 113 fens level signals of Memory Controller Hub 112 and translation interface controller are connected to core logic body 111, and core logic body 111 is used for controlling the reading and writing data of main memory module 12.Memory Controller Hub 112 is used for receiving a memory read-write signal, and controls main memory module 12 stored data write according to this memory read-write signal.Translation interface controller 113 is used for receiving the disk read-write signal, and provide signal format conversion to this disk read-write signal, convert thereof into and be compatible with the internal memory signal that main memory module 12 uses, and control main memory module 12 stored data write according to the internal memory signal after this conversion.Core logic chipset 11 then can receive by computer system and send read-write to main memory module 12, and judge that this read-write is to belong to memory read-write signal or disk read-write signal, if the memory read-write signal then is sent to Memory Controller Hub 112, if the disk read-write signal then is sent to translation interface controller 113.
And main memory module 12 signals are connected to core logic chipset 11, can be used to receive the memory read-write signal of Memory Controller Hub 112 or 113 outputs of translation interface controller.Main memory module 12 is made up of a plurality of internal memories 121, and these internal memories 121 belong to reading speed volatile ram faster, as SDRAM, DDRAM etc.Data when the main memory module 12 of present embodiment is carried out except computer system can be provided or program store and use, also can use as analog hard disk, and how in main memory module 12, to be partitioned into two kinds of storage areas that type of service is different, one is to belong to the memory access district that uses as primary memory in the computer system, another then is the harddisk access district that uses as analog hard disk, then be to set, set main memory module 12 identifications and can allow computer system distinguish according to this by 13 pairs of main memory modules 12 of setting module.In addition because the internal memory 121 that main memory module 12 uses belongs to volatile ram, after the computer system shutdown, main memory module 12 loss of power and can't data memory, present embodiment provides a power supply 16 to be supplied to main memory module 12 to this, can continue to preserve data to guarantee the harddisk access district that uses as hard disk in the main memory module 12.And the enforcement of this power supply 16 can be reached by being equipped with source current or battery (as mercury battery) in the computer system.
And setting module 13 signals of present embodiment are connected to South Bridge chip 14, and it is that unit is partitioned into above-mentioned memory access district and harddisk access district in the process that main memory module 12 is set with the internal memory in the main memory module 12 121.Therefore after the setting via setting module 12, after computer system is started shooting again, can recognize the hard disk 15 that signal is connected in South Bridge chip 14, and the analog hard disk in main memory module 12.And present embodiment comes analog hard disk with main memory module 12, if will carry out data read to this analog hard disk, reading and writing data with general hard disk for computer system is the same, do not need to do any change, because the disk read-write signal that is sent by central processing unit 10, if the data of this disk read-write signal institute desire read-write are placed on hard disk 15, then this disk read-write signal sends hard disk 15 to by South Bridge chip 14; And if the data of this disk read-write signal institute desire read-write are placed on the harddisk access district in the main memory module 12, then this disk read-write signal sends harddisk access district in the main memory module 12 to by translation interface controller 113.
Above-mentioned core logic chipset 11 is a north bridge chips, and translation interface controller 113 is the controller of hard-disk interface transpose memory interface, and hard-disk interface can be IDE or SATA interface, and setting module 13 is Basic Input or Output System (BIOS) (BIOS).
See also Fig. 2, it is the system framework figure of one of another preferred embodiment of the present invention, its with a last embodiment different be in, core logic chipset 17 is for integrating the chip of north bridge and south bridge, and 15 fens level signals of setting module 13 and hard disk are connected to core logic chipset 17, the function mode of this embodiment analog hard disk is identical with a last embodiment, all can be formed with the harddisk access district of analog hard disk in main memory module 12.
See also Fig. 3, it is the process flow diagram of one of preferred embodiment of the present invention, and the system architecture based on previous embodiment discloses about setting the mode of analog hard disk, includes the following step: at first behind the step S301 computer booting; S303 enters setting module 13; S305 sets the size of analog hard disk then; The S307 computing machine is cut apart main memory module according to the size of aforementioned setting analog hard disk afterwards; And through after the previous segmentation, S309 produces analog hard disk in main memory module 12, and primary memory mould module 12 includes a memory access district and a harddisk access district at this moment; Last S311 setting module 13 stores above-mentioned setting.Therefore after computing machine is started shooting next time again, just can recognize the analog hard disk in the primary memory mould 12.
In sum, previous embodiment provides a kind of and at the main memory module in the computing machine its emulation is being become to have the function of hard disk read-write operations, and can be with the mass data that needs in the present hard disk to use, be put into the analog hard disk in the main memory module, so can significantly promote the bulk velocity of computing machine.
Hardware configuration with main memory module comes analog hard disk to have following advantage in addition:
1, the read or write speed of analog hard disk and main memory handles speed synchronization need not have the stand-by period.
2, the setting of analog hard disk is finished by Basic Input or Output System (BIOS), and set finish after computing machine can recognize analog hard disk automatically, and without any need for driver.
3, the data read-write control of analog hard disk is responsible for by the translation interface controller, and can not waste the resource of computer system.
4, can be compatible with any operating system.
5, can not cause cost burden.
The above is preferred embodiment of the present invention only, is not to be used for limiting practical range of the present invention; Every according to equivalence variation and modification that the present invention did, all contained by claim of the present invention.
Claims (15)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100801829A CN100403246C (en) | 2005-06-30 | 2005-06-30 | Device and method for simulating hard disk |
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2005100801829A CN100403246C (en) | 2005-06-30 | 2005-06-30 | Device and method for simulating hard disk |
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| CN1889030A true CN1889030A (en) | 2007-01-03 |
| CN100403246C CN100403246C (en) | 2008-07-16 |
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| CNB2005100801829A Expired - Fee Related CN100403246C (en) | 2005-06-30 | 2005-06-30 | Device and method for simulating hard disk |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100458676C (en) * | 2005-09-30 | 2009-02-04 | 英业达股份有限公司 | System and method for increasing data read-write speed |
| CN101354631B (en) * | 2007-07-27 | 2011-06-15 | 旺玖科技股份有限公司 | external storage device |
| CN102694828A (en) * | 2011-03-23 | 2012-09-26 | 中兴通讯股份有限公司 | Method and apparatus for data access in distributed caching system |
| CN103562892A (en) * | 2011-06-10 | 2014-02-05 | 国际商业机器公司 | Configure storage-class memory commands |
| US9116789B2 (en) | 2011-06-10 | 2015-08-25 | International Business Machines Corporation | Chaining move specification blocks |
| US9116788B2 (en) | 2011-06-10 | 2015-08-25 | International Business Machines Corporation | Using extended asynchronous data mover indirect data address words |
| US9116813B2 (en) | 2011-06-10 | 2015-08-25 | International Business Machines Corporation | Data returned responsive to executing a Start Subchannel instruction |
| US9411737B2 (en) | 2011-06-10 | 2016-08-09 | International Business Machines Corporation | Clearing blocks of storage class memory |
| US9418006B2 (en) | 2011-06-10 | 2016-08-16 | International Business Machines Corporation | Moving blocks of data between main memory and storage class memory |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5519843A (en) * | 1993-03-15 | 1996-05-21 | M-Systems | Flash memory system providing both BIOS and user storage capability |
| US6256232B1 (en) * | 2000-07-07 | 2001-07-03 | Institute For Information Industry | Data access method capable of reducing the number of erasing to flash memory and data patch and access device using the same |
| US6631456B2 (en) * | 2001-03-06 | 2003-10-07 | Lance Leighnor | Hypercache RAM based disk emulation and method |
| TWI249101B (en) * | 2002-04-11 | 2006-02-11 | Via Tech Inc | Method and related apparatus for using a dynamic random access memory to substitute for a hard disk drive |
| CN1264094C (en) * | 2002-09-06 | 2006-07-12 | 上海金诺网络安全技术发展股份有限公司 | Method for construction of computer application system using compact disc and mobile memory medium |
| US20040210716A1 (en) * | 2003-04-21 | 2004-10-21 | Aaeon Technology Inc. | Apparatus and method for simulating virtual floppy disk and virtual hard disk |
| CN1202484C (en) * | 2003-06-30 | 2005-05-18 | 北京格泰生物科技有限公司 | Analogue hard disk device for computer |
| CN100471112C (en) * | 2004-03-26 | 2009-03-18 | 清华大学 | Memory-Network Memory-Disk High Speed Reliable Storage System LND Read and Write Method |
-
2005
- 2005-06-30 CN CNB2005100801829A patent/CN100403246C/en not_active Expired - Fee Related
Cited By (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100458676C (en) * | 2005-09-30 | 2009-02-04 | 英业达股份有限公司 | System and method for increasing data read-write speed |
| CN101354631B (en) * | 2007-07-27 | 2011-06-15 | 旺玖科技股份有限公司 | external storage device |
| CN102694828A (en) * | 2011-03-23 | 2012-09-26 | 中兴通讯股份有限公司 | Method and apparatus for data access in distributed caching system |
| CN102694828B (en) * | 2011-03-23 | 2016-03-30 | 中兴通讯股份有限公司 | A kind of method of distributed cache system data access and device |
| US9164882B2 (en) | 2011-06-10 | 2015-10-20 | International Business Machines Corporation | Chaining move specification blocks |
| US9411737B2 (en) | 2011-06-10 | 2016-08-09 | International Business Machines Corporation | Clearing blocks of storage class memory |
| US9116635B2 (en) | 2011-06-10 | 2015-08-25 | International Business Machines Corporation | Configure storage class memory command |
| US9116788B2 (en) | 2011-06-10 | 2015-08-25 | International Business Machines Corporation | Using extended asynchronous data mover indirect data address words |
| US9116813B2 (en) | 2011-06-10 | 2015-08-25 | International Business Machines Corporation | Data returned responsive to executing a Start Subchannel instruction |
| US9122573B2 (en) | 2011-06-10 | 2015-09-01 | International Business Machines Corporation | Using extended asynchronous data mover indirect data address words |
| US9116634B2 (en) | 2011-06-10 | 2015-08-25 | International Business Machines Corporation | Configure storage class memory command |
| CN103562892A (en) * | 2011-06-10 | 2014-02-05 | 国际商业机器公司 | Configure storage-class memory commands |
| US9372640B2 (en) | 2011-06-10 | 2016-06-21 | International Business Machines Corporation | Configure storage class memory command |
| US9116789B2 (en) | 2011-06-10 | 2015-08-25 | International Business Machines Corporation | Chaining move specification blocks |
| US9418006B2 (en) | 2011-06-10 | 2016-08-16 | International Business Machines Corporation | Moving blocks of data between main memory and storage class memory |
| CN103562892B (en) * | 2011-06-10 | 2016-08-17 | 国际商业机器公司 | Systems and methods for configuring storage-class memory commands |
| US9477417B2 (en) | 2011-06-10 | 2016-10-25 | International Business Machines Corporation | Data returned responsive to executing a start subchannel instruction |
| US9747033B2 (en) | 2011-06-10 | 2017-08-29 | International Business Machines Corporation | Configure storage class memory command |
| US10013256B2 (en) | 2011-06-10 | 2018-07-03 | International Business Machines Corporation | Data returned responsive to executing a start subchannel instruction |
| US10387040B2 (en) | 2011-06-10 | 2019-08-20 | International Business Machines Corporation | Configure storage class memory command |
| US11163444B2 (en) | 2011-06-10 | 2021-11-02 | International Business Machines Corporation | Configure storage class memory command |
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| CN100403246C (en) | 2008-07-16 |
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