CN1868114A - Microphone preamplifier - Google Patents

Abstract

A microphone preamplifier, comprising a differential input (102) stage with a first and a second input terminal and an output stage with an output terminal; where the microphone preamplifier is integrated on a semiconductor substrate. A feedback circuit, with a low-pass frequency transfer function (103), is coupled between the output terminal and the first input terminal and integrated on the semiconductor substrate. The second input terminal provides an input for a microphone signal (105). Thereby a very compact (with respect to consumed area of the semiconductor substrate), low noise preamplifier is provided.

Description

microphone preamplifier

This invention relates to microphone preamplifiers.

introduction

The preferred microphone type for use in the telecommunications field (eg mobile telephony) has been the electret microphone for many years. Such microphones are based on the principle of a capacitor consisting of a movable member constituting the diaphragm of the microphone and another member, for example the so-called support plate of the microphone. One of the components of the microphone, preferably the diaphragm, is charged with a constant charge.

The sound pressure detected by the microphone will cause the diaphragm to move, thus changing the capacitance of the capacitor formed by the diaphragm member and another member. When the charge of the capacitor formed by these two components is held constant, the voltage across the two capacitor components will vary with the incoming sound pressure level. Since the charge on the microphone capacitor must remain constant to maintain the ratio between the sound pressure and the voltage on the capacitor member, it is important not to load the microphone capacitor with any resistive load. A resistive load will discharge the capacitor, thereby degrading or damaging the capacitor as a microphone.

Therefore, to extract a microphone signal from a capacitor, an amplifier configured with its primary goal of providing high input resistance is preferred, buffering the capacitor with a circuit optimized for other goals. The amplifier that is connected to extract the microphone signal is usually called a "preamplifier" or "buffer amplifier" or simply "buffer". The physical connection distance of the preamplifier to the capacitor is usually very small - within a few millimeters or fractions of a millimeter.

With small microphones, only a very small amount of charge can be stored in one of the microphone elements. This raises the requirement for high input resistance. Therefore, the input resistance of the preamplifier for a small microphone must be very high - in the order of gigaohms. Also, the amplifier's input capacitance must be very small in order to achieve very good sensitivity to sound pressure.

Traditionally, this buffer amplifier or preamplifier is implemented as a simple JFET. JFET solutions are sufficient, however, smaller microphones are required in the telecom industry - and increased sensitivity is required. This creates a paradox, since the sensitivity of microphone capacitors decreases as they get smaller. All other things being equal, this further reduces the sensitivity of the microphone and buffer combination. Demand in the telecommunications industry is driven by market trends including hands-free operation of various small devices and wider use of microphones in areas such as camera/video applications.

Today's telecom microphones typically have -40dBV sensitivity and 7pF capacitance. This capacitor is also known as the "pickup capacitor". The term "pickup" is used to refer to a microphone without a preamplifier. The vast majority of JFETs used for this purpose have an input capacitance of roughly 5-7pF. By comparing this input capacitance to the pickup capacitance, it can be deduced that half of the microphone signal is lost in the process of being picked up by the preamplifier before being amplified.

Telecom microphones with integrated preamplifiers are sold in high volume and at low prices. Since the cost of an amplifier for a telecom microphone is directly related to the size of the preamplifier chip, the preamplifier chip should be as small as possible in order to keep the price down.

Clearly, there is a need for a microphone preamp with gain and very low input capacitance, and the lowest possible preamp die area. In addition, low noise is also important. The reason low noise is important is that you can trade noise for area - i.e., if your circuit is less noisy than it needs to be, you can trade this noise level overhead for lower chip area, and thus, you can trade it for less Low cost to manufacture preamplifiers.

In recent years, CMOS mic preamps have proven to be superior to JFET mic preamps because they can provide substantial gain with lower noise and lower input capacitance.

In hearing aids, microphone preamplifiers are designed using CMOS. This is because CMOS amplifiers designed in CMOS technology provide signal-to-noise ratios that far exceed those achievable with amplifiers implemented in JFET technology. This is especially useful when the pickup capacitance is very low.

When designing preamplifiers for microphones using CMOS technology, there are typically three sources of noise. These noise sources are noise from bias resistors, 1/f noise from input transistors, white noise from input transistors. We assume that input transistor noise dominates. White noise and 1/f noise can be minimized by optimizing the length and width of the input transistors. This applies to any input stage such as a single transistor stage or a differential stage. Noise from bias resistors is also minimized. If you make the bias resistor very large, then the noise from the resistor will be high-pass filtered and the in-band noise will be very low. This will have an effect, although the lower bandwidth limit of the amplifier will be very low. This can be a problem because the input to the amplifier will only settle at nominal value after a very long period of time after power-up. Also, signals with strong low-frequency content produced by things like slamming doors or infrasound in cars can overload amplifiers. Another related problem is the small leakage current due to mounting the chip inside the microphone module. Such a current will generate a DC offset due to the limiting input impedance. This reduces the amplifier's overload headroom.

Background technique

Various solutions have been proposed using preamplifiers based on JFET or other technologies. However, these solutions inherently have relatively high noise levels. Therefore, the smallest possible chip area cannot be achieved with prior art solutions.

In hearing aid microphones, the problem of excessive sensitivity to infrasound is dealt with by a two-stage configuration of a buffer amplifier as input stage followed by a high-pass filter. After the signal has been high-pass filtered, it does not contain a lot of low frequency components that would overload the amplifier, and it can then be further amplified. This approach has proven to be particularly useful for hearing aid microphones where the pickup sensitivity is relatively high (eg, around 20 mV/Pa).

For telecom microphones, the pickup sensitivity is usually low, around 5-7mV/Pa. However, newer applications require microphone sensitivities on the order of 40mV/Pa or higher. Microphone/preamplifier configurations known in the field of hearing aids work well from a technical point of view, but for telecom applications these configurations are prohibitively expensive relative to the chip area available for telecom microphones which is dictated by cost However, the chip area required by them is simply too large.

The two-stage configuration has two disadvantages: since it has two stages, it is noisier, and since there is no gain in the first stage, the physical size of the high-pass filter must be relatively large. It should be noted that noise and area are directly related. By increasing the gain of the first stage, the size of the filter can be minimized, however, the amplifier will be very sensitive to overload due to low frequency components that are not reduced until in the subsequent high-pass filter. As such, solutions originally developed for hearing aid microphones are far from optimal for the new highly sensitive telecom microphones. The area of the amplifier chip is too large, making the device too expensive.

The need for smaller microphones, and thus the application of smaller microphones, leads to smaller microphone capacitances. This in turn will increase the spectral density of the noise in the audio frequency range. Therefore, larger bias resistors are required to compensate for the otherwise increased noise density in the audio frequency range.

The need for large input bias resistors results in the need for relatively small input leakage currents. Such small input leakage currents can only be achieved with CMOS technology. For a good signal-to-noise ratio, CMOS technology is preferred, with bias resistors greater than 10GOhm. In the field of hearing aid applications, CMOS technology is used, combined with large bias resistors, to achieve the above effects through simple 0-dB buffers. This will provide a feasible design, since the sensitivity of the microphone is generally high for hearing aid applications.

However, microphones for telecommunications use will be less sensitive as sensitivity can be traded for low price. From a market perspective, microphones and preamplifiers with higher sensitivity are required. Therefore, the gain in the preamplifier needs to be increased to meet this requirement. Furthermore, low noise in the audible range is required. Furthermore, in order to ensure a good signal-to-noise ratio while satisfying the need for relatively high sensitivity, the input capacitance of the preamplifier must be small to avoid unwanted signal loss from the microphone (the equivalent of the microphone signal is exposed to A voltage divider made of capacitors).

Since the chip area occupied by the preamplifier must be as small as possible to keep costs down, the preamplifier must be as small as possible. Therefore, since the amplifier configurations known from hearing aids are to some extent generally not optimal for chip area, these configurations are not suitable. Furthermore, it should be kept in mind that the buffers or amplifiers applied in hearing aids cannot provide the high gain levels required for low sensitivity microphones as used in the telecommunications field. In a hearing aid chip, the same noise performance requires more space because buffers are needed to avoid overloading the hearing aid.

In the foregoing, various aspects of known microphone preamplifier configurations have been discussed in terms of the relevant semiconductor technologies used to implement the configuration.

Due to the high overall sensitivity of newer telecom microphones, the output signal swing of the microphones can become very large; eg around 1Vpp, which is well beyond values previously seen in the telecom and hearing aid markets. The fact that telecom microphones must work with two terminals (combining and power) makes it more difficult to design for a relatively large maximum output signal swing. This requires a different solution than hearing aids.

The inherent sensitivity of telecom ECMs is usually relatively low. Therefore, the preamplifier of the telecom ECM needs gain.

Furthermore, today's telecommunications market requires greater sensitivity than ever before. Therefore, a higher gain of the preamplifier is required. But the same overload margin is still required. Also, the ability to handle large, low frequency signals like car rumbles and slamming doors should be the same.

Contents of the invention

Thus, it is an object of the present invention to provide a preamplifier with the lowest possible input capacitance, lowest possible noise, maximum output signal swing in a two-terminal configuration, while exhibiting the smallest possible chip area.

It is an object of the present invention to provide a preamplifier with greater power supply rejection and less distortion.

It is an object of the present invention to provide an amplifier capable of handling slowly varying signals having comparatively large amplitudes in its input terminals while being able to amplify relatively high frequency low level signals having slight distortion.

It is an object of the present invention to provide an amplifier whose performance is very insensitive to leakage and parasitic coupling connected to the input.

The present invention relates to a microphone preamplifier comprising a differential input stage having first and second input terminals and an output stage having an output terminal; wherein the microphone preamplifier is integrated in a semiconductor substrate; and between the output terminal and the first input Feedback circuit with low-pass frequency transfer function coupled between terminals and integrated on a semiconductor substrate. The second input terminal provides an input of a microphone signal.

Thus, a filter feedback arrangement is provided for a semiconductor microphone preamplifier. This preamplifier provides large loop-gain outside the audio band with very little distortion in the audio band. But more importantly, outside the audio band, the intermodulation distortion produced by the lower frequency frequency components will be very low. The loop-gain characteristic provided by the feedback configuration has low distortion.

Description of drawings

Figure 1 shows a microphone including a preamplifier with a feedback filter;

Figure 2 shows a source follower connected to a microphone and shows the noise sources in the microphone amplifier;

Figure 3 shows the spectral noise density of the source follower;

Figure 4 shows a graph of the transfer functions of open-loop amplifier gain, feedback filter gain, loop gain, and preamplifier gain;

Figure 5a shows a first feedback filter;

Figure 5b shows the second feedback filter of the IC implementation;

Figure 5c shows the fourth feedback filter of the IC implementation;

Figure 5d shows the third feedback filter of the IC implementation;

Figure 6 shows a detailed view of the amplifier;

Figure 7a shows the amplifier with feedback filter and input clamp circuit;

Figure 7b shows a diode-based input clamp circuit;

Figure 7c shows a PMOS-based input clamp circuit;

Figure 7d shows an input clamping circuit based on NPN transistors;

Figure 8a shows the amplifier with feedback filter and output stage;

Figure 8b shows the common-source output stage;

Figure 8c shows the source follower output stage;

Figure 8d shows the output stage with a combined common-source and source-follower configuration;

Figure 8e shows the cascaded common-source output stages;

Figure 9 shows the amplifier configuration with RF filter;

Figure 10a shows the amplifier configuration with DC level compensation within the feedback filter and within the input stage of the amplifier;

Figure 10b shows the amplifier configuration with DC level compensation at the input terminals of the amplifier;

Figure 10c shows a circuit to generate a high ohmic resistor;

Figure 10d shows the amplifier configuration with DC level compensation at the input stage of the amplifier;

Figure 11 shows the amplifier configuration with a voltage pump;

Figure 12 shows a part of a digital microphone comprising an electret microphone element and a differential amplifier with a feedback filter;

Figure 13a shows a differential amplifier with input and output terminals and a signal showing the low frequency behavior of the differential amplifier;

Figure 13b shows a differential amplifier with input and output terminals and a signal showing the high frequency behavior of the differential amplifier;

Figure 14 shows part of a digital microphone comprising an electret microphone element and a differential amplifier in a first configuration;

Figure 15 shows a portion of a digital microphone including an electret microphone element and a differential amplifier in a second configuration;

Figure 16 shows part of a digital microphone comprising an electret microphone element and a differential amplifier with a feedback filter;

Figure 17 shows a preferred embodiment of the feedback filter.

Figure 18 is a schematic view of a microphone with an integrated circuit and a microphone element; and

Figure 19 is a schematic view of a microphone with an integrated circuit and a MEMS microphone element.

Figure 1 shows a microphone including a preamplifier with a feedback filter. The microphone 101 comprises a microphone element Cmic 105 biased by a resistor Rb 104 connected to a voltage source 108 which receives a current input through an output terminal of the microphone 101 denoted Pwr/Out. In other configurations, resistor Rb 104 is connected to a ground reference to bias the microphone by providing a DC offset to the input terminal of amplifier 102. As such, the output terminal is used to provide a bias voltage Vb to the microphone preamplifier 102 and its feedback filter 103 via the voltage source 108 and operating power to provide a microphone output signal in response to the sound pressure on the microphone element Cmic 105.

The circuit node formed at the interconnection of the microphone Cmic 105 and the bias resistor Rb 104 is connected to the non-inverting input (+) of the operational amplifier 102. The amplifier 102 has a feedback circuit 103 . Feedback circuit 103 has an input port denoted “a” for receiving the output signal from amplifier 102 and an output port denoted “b” for connection to the inverting input (−) of amplifier 102 . A preamplifier including an amplifier 102 and a feedback circuit 103 is realized on a semiconductor substrate 107 .

The amplifier 102 and the feedback circuit 103 have a frequency transfer function from the non-inverting input (+) to the output (corresponding to the circuit node connected to the input port "a" of the feedback circuit). This frequency transfer function has a high-pass characteristic.

However, the feedback circuit has a frequency transfer function from port "a" to port "b", with a zero and a pole; where the zero is at a higher frequency than the pole. As such, the feedback circuit has a low-pass characteristic.

The feedback circuit in the form of a filter may be a first order filter, or it may be of higher order; eg second, third or fourth order. It can also be implemented as a passive circuit or as an active circuit. The feedback loop ensures that the overall gain of the amplifier with feedback is relatively low at lower frequencies and relatively high at audio band frequencies.

Power is supplied to the preamplifier from an output terminal denoted Pwr/Out. The amplifier is connected as a non-inverting amplifier with a microphone connected to the non-inverting input. This ensures that the capacitive loading of the microphone is very low. Due to feedback, the inverting input terminal (-) of the amplifier 102 follows the non-inverting terminal (+). If the input stage of amplifier 120 is a differential transistor pair (ie, a differential stage), then the gate-source voltage of the transistor pair will remain constant and, therefore, the input capacitance will be very low. A more detailed description of one possible embodiment of an amplifier with a differential input stage is provided in conjunction with FIG. 6 .

To set the amplifier's output DC level, a DC offset can be embedded into the amplifier, or better yet, into the filter. Implementations of amplifiers with offsets embedded in them are illustrated in Figures 5d, 10a, 10b and 10c.

Figure 2 shows a source follower connected to a microphone pickup element. The microphone pickup element 201 is shown as a circuit model of a voltage generator 203 in series with a capacitor Cmic 204. The source follower 202 comprises an active device in the form of a PMOS device T 206 connected by its drain terminal to a ground reference and by a source resistor Rs 207 to the supply voltage Vdd. The input of the source follower is provided at the circuit node formed by the gate terminal of the active device, the bias resistor Rb and the capacitor Cmic.

This circuit is a simple circuit that is useful for illustrating the basic functionality of a microphone preamplifier. This circuit has three active noise sources: namely, noise from bias resistor Rb, white noise from PMOS device T206, and 1/f noise from PMOS device T206.

This figure shows a very simple amplifier, but all amplifiers have these three effective noise sources.

Figure 3 shows the spectral noise density of the source follower. The spectral noise density is displayed as a function of frequency f. The noise density is displayed together with a so-called A-weighting curve.

A source follower is used as an example, but the spectral density of the noise has the same shape for any CMOS amplifier. The principles used to optimize the spectral noise density for the best signal-to-noise ratio (SNR) are basically the same as for other amplifier types. It is possible to describe how to minimize each component of the spectral noise density.

First, noise components generated by bias resistors will be described. In this figure, it can be seen that the noise component is dominant, - see the frequency range denoted "Rbias". The total noise power from the bias resistor can be calculated as kT/C, where k is Boltzmann's constant, T is the temperature in Kelvin, and C is the capacitance connected to the resistor; typically the microphone capacitance is at dominance. In this figure, the known A-weighting function is also shown, and it can be seen that besides the total noise power in kT/C (given by the microphone capacitance), the position of the noise is also important. That is, if the bias resistors can be made very large, then the noise power inside the A-weighting function can be made very small. So the trick is to use very large bias resistors so that the behavior is as far away from the center of the A-weighting curve as possible.

Next, noise generated by PMOS will be described. A 1/f noise component and a white noise component are generated from the PMOS device of the source follower. These noise components can be made smaller by increasing the gate area of the noise-generating device. By making the device larger, 1/f and white noise can be reduced. By using transistors with larger areas, the 1/f noise can even be reduced to a completely negligible level. A consequence of making the transistor larger is that the signal is damped as the microphone is capacitively loaded by the larger intrinsic capacitance caused by the larger area. As such, the transistors should be relatively large, but not too large. Therefore, there is an optimum for 1/f noise and white noise.

This example shows noise from a source follower, but the exact same arguments and tradeoffs apply to any CMOS preamplifier connected to a capacitive signal source.

Figure 4 shows a graph of the transfer functions of open-loop amplifier gain, feedback filter gain, loop gain, and preamplifier gain. The graphs refer to the circuit configuration shown in Fig. 1, in particular, the feedback preamplifier includes an amplifier 102 with a feedback filter 103 to create a feedback loop. Curve #1 illustrates the open-loop amplifier gain, curve #2 illustrates the feedback filter gain, curve #3 illustrates the loop gain, and curve #4 illustrates the total preamplifier gain.

The graphs are used to show the principle of a preamplifier with a feedback filter from a gain-frequency domain point of view. A graph showing the first-order filter configuration. Corresponding coordinate plots can also be obtained for higher order filter configurations.

The open-loop amplifier gain (curve #1) is known to be of the dominant pole type, with a single dominant pole at frequency F1 and very large gain at low frequencies.

The feedback filter characteristic (curve #2) in its simplest first order form consists of one pole and one zero. The pole is located at a frequency F2 which is lower than the frequency F3 of the zero. Basically, a filter has a lower frequency region and a higher frequency region with lower gain than the low frequency region. Thus, the feedback filter characteristic shows a relatively high gain level below F2 and below the transition frequency range between F2 and F3, and a relatively low gain above the transition frequency range, i.e. above F3 level.

In practice, the preamplifier has a transfer function, in the frequency domain, with zeros and poles cf, see curve #2; where the poles lie in the range 0.1Hz to 50Hz or 0.1Hz to 100Hz or 0.1 to 200Hz.

The combination of the open loop gain and feedback filter characteristics provides the loop-gain characteristic (curve #3). It can be seen that the loop-gain is very large below frequency F2.

Curve #4 shows the overall gain transfer function of the amplifier in the feedback configuration. Here, the feedback configuration is established by a feedback filter having the gain characteristic shown by curve #2.

Figure 5a shows the first feedback filter. Feedback filter 103 is configured with an input port denoted "a" and an output port denoted "b". The input port "a" is connected to a ground reference through a series connection of a first resistor R2 502; a capacitor C 503; and a second resistor R3 501. The output port "b" is connected to a circuit node formed by the interconnection of a first resistor R502 and a capacitor C503.

Feedback filters can be implemented in many ways, but not all of them are equally easy to integrate in a chip. In particular, filter types with series resistors are difficult to implement because the required component values are difficult to implement on a chip or semiconductor substrate.

The desired filter transfer function is a high pass filter function. This is usually accomplished using two resistors in series with the capacitor (see Figure 5a). At lower frequencies the transfer function from port "a" to port "b" is close to 1, at higher frequencies it is determined by the ratio of R2 and R3. To obtain low noise, resistors must be in the kOhm range, thus requiring capacitor values in the nF range to achieve the desired cutoff frequency. Capacitors in the nF range would require excessive chip area, so such a solution was considered impossible for chip implementation.

Figure 5b shows the second feedback filter of the IC implementation. The feedback filter 103 constitutes a feedback circuit having an input port denoted "a" and an output port denoted "b". The configuration of the filter is such that the input port "a" is connected to a series connection of a first resistor R2 507 and a second resistor R3 508 which form a resistor node at their interconnection. The input port is also connected to a series connection of a first capacitor C1 506 and a second capacitor C2 504, which form a capacitor node at their interconnection. The capacitor node forms the output port. In addition, the resistor node and the capacitor node are interconnected together through a resistor R1 505.

For this configuration of the feedback filter, the low frequency transfer function from port "a" to port "b" is determined by two resistors R2 507 and R3 508. The high frequency transmission function is determined by C1506 and C2 504. The cut-off frequency of the filter can be set by R1 505. If R1 505 is very large, the noise of the filter will be shifted to very low frequencies, so that audio band noise is minimized without using very large capacitor values. Suitable ranges to realize on a semiconductor substrate are C1=1-500pF, C2=1-500pF and R1=GOhm-Tohm.

Figure 5c shows the fourth feedback filter of the IC implementation. Feedback filter 103 is configured with an input port denoted "a" and an output port denoted "b". The configuration of the filter is such that the input port "a" is connected to a series connection of a first resistor R2 507 and a second resistor R3 508 which form a resistor node at their interconnection. The input port is also connected to a series connection of a first capacitor C1 506 and a second capacitor C2 504, which form a capacitor node at their interconnection. The capacitor node forms the output port. In addition, the resistor and capacitor nodes are interconnected together by active device 516, which provides an ohmic impedance across the two-port circuit. The two-port circuit includes active CMOS devices, or other types of active devices 516 and 517 , and a current source 518 . Active devices include respective gate, source and drain terminals. The gate terminals are interconnected together at a node connected to the current source 518 and the drain terminal of the first device 517 . The source terminals of the devices are interconnected together to provide the second device 516 in a state providing an ohmic resistance between its drain and source terminals. The drain and source terminals form a two-port ohmic impedance. In the above description, the cutoff frequency of the filter 103 is set by the ohmic impedance of the two-port circuits 516 , 516 and 518 .

The MOS transistor in the triode region is biased to have impedance in the G ohm region, which is a good solution relative to the two-port circuit. It can be well controlled and easily implemented in any CMOS technology.

In the present invention, NMOS devices will prove best due to the DC operating level. But in other cases, PMOS devices can also be used, and even symmetrical devices formed by a combination of NMOS and PMOS devices can be used. But it depends on the DC level if a perfectly symmetrical device can be used.

The only disadvantage of an asymmetrical NMOS resistor is that it is non-linear such that when exposed to stronger signals it will generate a low frequency signal (ie DC offset). The amplitude of the low frequency signal generated by the NMOS resistor will be highly dependent on how the feedback filter is built. That is, if the feedback factors of capacitive feedback and resistive feedback are equal, then the signal across the NMOS resistor will be zero and thus the generated low frequency signal will also be zero. But as previously discussed, a relatively large DC gain of the preamplifier will cause problems because relatively large low frequency signals will be present at the input of the preamplifier, thus overloading the preamplifier. A DC feedback factor giving a DC gain of 2 will effectively reduce the signal across the NMOS resistor by a factor of two, thus reducing the signal generated at low frequencies by at least a factor of two. Typically, however, a DC gain in the range of 1-5 is suitable. That is, the signal generated due to nonlinear signal processing usually depends on the square of the generated signal or depends on the cube of the generated signal. Thus, halving the signal across the NMOS resistor will reduce the generated signal by a quarter.

Thus, a way to implement resistors in the Giga Ohm range (which can be well controlled) is provided. The general use of diodes, diode-coupled MOS transistors, allows very large resistor values (on the order of Tera Ohms). In practice, however, these values are too large for use involving preamplifiers implemented in ICs.

Figure 5d shows the third feedback filter for the IC implementation. In this embodiment, a DC offset has been embedded in the feedback filter 103 . Thereby, undesired DC levels due to leakage currents can be compensated. The DC offset is achieved by replacing resistor R3 with current source 513 .

The total noise power from filter 103 at output port b (and thus at the inverting input of amplifier 102) can be calculated as KT/C, where C is the total capacitance, K is Boltzmann's constant, T is the temperature in Kelvin.

As such, the noise cannot be minimized without increasing the size of the capacitors (C1 and C2), which would result in an increase in the area of the chip. This is not a viable solution when a low cost solution is required. However, by increasing the value of resistor R1, the noise power can be made to appear at lower frequencies. In this way, the noise from the resistor feedback network is filtered, the noise from capacitors C1 and C2 (actually, the noise from R1) will be filtered and at such a low frequency that the usual A-weighting function used will suppress noise. As such, this solution has both a smaller area and lower noise.

Resistor R1 should be relatively large in order to obtain relatively low noise for the smallest possible area. But if the resistor is too large, the amplifier will be slow to stabilize after power is applied or after an overload. This greatly degrades the performance of the amplifier over a relatively long period of time.

Figure 6 shows a detailed view of the amplifier. Amplifier input stage 601 includes a differential pair of PMOS devices 603 , 606 . This differential pair must be optimized in terms of width and length because there are optimum values for 1/f noise and white noise (see Figure 3). An offset can be embedded into a differential pair, if desired, by adjusting the aspect ratio of the two transistors in the differential pair (see Figure 10d). Alternatively, or in addition, the reflection factor of the current mirrors 604, 605 in the bottom may also be adjusted. If the ratio between the differential versus aspect ratio of the transistor is A, and the current reflection factor is B, the offset of the amplifier will be n ^* Vt ^* In(A ^* B).

There are various implementations of the differential input stage - eg the NMOS current mirrors 604, 605 could be replaced by so-called folded cascode amplifiers combined with PMOS current mirrors.

At the output stage 602 of the amplifier, an output transistor 608 is connected to a high impedance gain node. This function is to add gain and isolate high impedance nodes from the outside. Note that the only device with varying current is the output transistor. Thus, the other transistors are biased by a constant current source.

Thus, an amplifier having a differential input stage and an output stage is described.

Figure 7a shows the amplifier with the feedback filter and input clamping circuit. The input clamp circuit 701 is connected to the input (in this case, the non-inverting input) of the amplifier that receives the microphone signal. Which clamping circuit to use depends on which technology is available and required.

Figure 7b shows a diode-based input clamp circuit. This circuit is known and has proven to work well. It consists of two cross-coupled diodes. Impedance/resistance near zero bias is high, typically around 400mV-600mV the device starts to clamp the signal - ie, the impedance drops significantly. Impedance is high at zero bias and it will clamp signals at large signal levels as needed. However, the impedance can be too large for some circuits (up to 100Tohm has been measured), and clamping of the signal often occurs at signal levels that are too low.

In this case, the following two solutions may be better. New symmetric high-impedance devices can be made by combining any of the three implementations.

Figure 7c shows a PMOS-based input clamp circuit. This implementation is basically the implementation of two cross-coupled diodes using MOS devices 704,705.

Figure 7d shows an input clamping circuit based on NPN transistors. This implementation is basically that of two cross-coupled diodes using bipolar devices 706,707.

Figure 8a shows the amplifier with the feedback filter and output stage. The output stage 802 is part of a complete preamplifier and is embedded in the feedback loop comprising amplifier 801 , output stage 802 and feedback filter 103 . The purpose of the output stage 802 is to isolate the internal circuit nodes of the preamplifier from the load coupled to the output terminal V1/out.

Figure 8b shows the common source output stage. The first example is a common source stage with Miller compensation capacitor 805 and resistor 804 for right half plane null compensation. This stage has the following advantages: the output swing can be very large, the DC gain is relatively large, and frequency compensation is very easy to implement. The downside is that the parameters vary with load and output swing. That is, if the load is resistive, the current will vary with the load and output swing. This has the consequence that the Miller compensation must be designed for worst case conditions, parameters such as distortion PSR etc. will vary with load and signal swing.

Figure 8c shows the source follower output stage. The second illustration is based on a source follower stage of active device 806 . This effectively isolates the internal circuit nodes from the load and all parameters remain invariant to changing load and output swing. The disadvantages of the source follower stage are that relatively large capacitors are required for frequency compensation, and the output swing is limited compared to the common source stage.

Figure 8d shows the output stage with a combined common-source and source-follower configuration. A third example is a combination of a common source stage and a source follower. This ensures easy frequency compensation and stable performance. The only downside is having a limited output swing compared to a simple common source stage.

Figure 8e shows the cascaded common-source output stages. A fourth example is two common source stages in series, where the active devices of the first stage are biased by the current source 810 . In this case, so-called nested Miller compensation must be used. This solution has more stable performance than a simple common-source stage, but not as stable as the combination of a common-source stage and a source follower. But the output swing is the same as the simple common source stage.

Figure 9 shows a preamplifier with an RF filter in it. A radio frequency (RF) filter 901 includes a capacitor 903 and a resistor 902 connected together to receive an input signal at their interconnection at a port of a circuit node denoted "h" and to provide at port "i" output signal. A ground reference is provided at port "j". Thereby a first order low pass filter is provided which attenuates the RF signal. However, other higher order filters may also be used - eg, 2nd, 3rd and 4th order filters.

In the widespread use of mobile phones today, microphones are exposed to high-power high-frequency signals, for example, radio frequency GSM signals of mobile phones. In particular, the microphone of a mobile phone is exposed to very large RF signals due to its close proximity to the antenna. It is known that nonlinear properties in semiconductors can intermodulate low frequency variants of radio frequency signals into low frequency bandwidths. To illustrate, a GSM phone transmits on a 217Hz cycle. If the diode is exposed to a GSM signal, the nonlinear characteristics of the diode together with the GSM signal will create a high powered 217Hz component and its harmonics. One of the most effective ways to avoid this problem is to prevent the GSM signal from reaching the non-linear semiconductor components. This is achieved by adding an RF filter 901 on each connection pad of the amplifier ASIC.

This approach is very effective, but the problem is that in addition to filtering RF noise, these filters also affect the performance of the amplifier. That is, as the output impedance increases, the noise level also increases. But in the case of a feedback amplifier, this problem is greatly reduced because the overall performance of the amplifier is largely determined by the feedback filter and input stage. Therefore, if high frequency components can be prevented from accessing the input stage, the feedback loop itself will suppress low frequency intermodulation signals introduced elsewhere in the amplifier. Typically, due to the high open loop gain, the amplifier will have performance that is not affected even if a very effective RF filter is added to the output board/connection.

Also at the input, RF filters can be added, but here, the noise of these RF filters cannot be suppressed by the loop gain. But since the overall amplifier structure has lower noise, a more efficient RF filter at the input can be achieved.

Figure 10a shows the preamplifier and feedback filter in which the DC offset is implemented. The use of DC offsets 1001, 1002 and 1003 will set the DC bias voltage of the output of the amplifier. The DC offset implemented in the amplifier will be amplified by the amplifier's DC closed-loop gain, thus setting the amplifier's output DC level. In order to handle low frequency signals and external offsets in the input, the DC offset of the amplifier will have to be of considerable value. This can be a problem when optimizing for the lowest possible noise. And problems arise when optimizing to achieve the lowest possible die area, ie lowest cost.

It is more appropriate to implement the offset in or just after the FB filter. In this way, the offset is doubled by the DC closed-loop gain of the amplifier, and the amplifier can also be designed to achieve lower noise without increasing the chip area. However, implementing all the offset in the filter can be problematic, so a combination of offset in the amplifier and offset in the feedback filter will usually prove to be optimal.

Figure 10b shows the amplifier configuration with DC level compensation at the input terminals of the amplifier. Current source 1006 provides direct current through resistor R5 1004. The DC voltage level provided through resistor R5 1004 will shift the DC level at the input of amplifier 102.

There are basically two ways to implement offset at the input of the preamplifier. The first is provided by a reference voltage source filtered through a large resistor. Resistors can be implemented in many ways, for example, as diode active devices, etc.

The second way is the offset implemented in the input differential pair. This can be done in many ways, for example by intentionally mismatching the currents or magnitudes in the input differential pairs. Alternatively, the DC offset can be provided by a device with a DC offset in series with one of the sources.

Figure 10c shows a circuit to create a high ohmic resistor. In addition to diode transistors and the like, active devices can also be used as high resistance devices. NMOS device 1009 biased under weak inversion will have an ohmic resistance between drain and source at ports x1 and y1 respectively, approximately equal to A x nVt/Id, where a is the ratio of the aspect ratios of the two transistors ratio between. Id is the current in the bias transistor, nVt = 39mV for most CMOS processes. NMOS device 1009 is biased in weak inversion by NMOS device 1008 biased by current source 1009 .

As such, the active device 1009 is forced into a state that provides a high ohmic impedance between its source and drain terminals. An ohmic impedance of greater than 50 MOhm or greater than 100 MOhm or greater than 500 MOhm is provided. Other embodiments using multi-diode configurations are generally not preferred due to their specific semiconductor technology.

In this way, a billion ohm resistor can be implemented using CMOS devices. The disadvantage of this device is that it is asymmetrical. This is somewhat compensated for by adding a symmetric device across the NMOS resistor.

Figure 10d shows a simplified diagram of the input stage of a differential amplifier configuration with DC level compensation at the input stage. DC level compensation can be obtained by providing the difference between the currents I1 and I2 flowing through the differential pair formed by transistors 1011 and 1010 respectively. Current source 1012 shows the bias voltage of the differential pair.

Figure 11 shows the amplifier in a configuration with a voltage pump. When there is no charged electret layer in the microphone, as in silicon microphones, a voltage pump Vpmp 1101 is usually required. Voltage pump Vpmp 1101 provides pumping voltage through resistor Rc 1102 as bias voltage Vb. Capacitor Cc works together with resistor Rc to isolate noise.

When there is no electret layer in the microphone, an external bias voltage is required and can be provided by a voltage pump integrated on the same semiconductor substrate as the preamplifier. Voltage pumps are usually quite noisy, and as such, decoupling filters are required. This filter may include a decoupling capacitor Cc and a large resistor Rc. To isolate the noise of the voltage pump 1101, a filter with a very low cut-off frequency is required. As such, it stabilizes very slowly during power-up. That is, a very large low frequency signal will be present at the input of the amplifier for a considerable amount of time. A preamp with low gain at low frequencies again proves to be very beneficial.

Some microphone types require a bias voltage to work, for example, silicon microphones. Such a bias voltage is usually higher than the supply voltage. In fact, it can be as high as 30V, so many times higher than the power supply. Such a bias voltage is generated using a voltage pump, typically comprising a Dixon pump and an oscillator providing a clock signal to the Dixon pump. However, the clock signal can be provided by an external oscillator, in which case a separate input terminal of the semiconductor substrate is usually required.

If the microphone is biased at high DC voltages, a DC coupling capacitor is required between the amplifier and the microphone, because then in almost all cases the amplifier cannot handle large DC levels without overloading. Furthermore, by integrating everything on the chip, the total performance can be optimized, providing the best possible performance.

Figure 12 shows a microphone comprising an electret microphone element and a differential amplifier. The electret microphone element is biased by a bias resistor 104 coupled to a bias voltage Vb. Thus, charges are supplied to the diaphragm or movable member of the microphone 105Cmic. Amplifier 1201 is provided with a signal provided in response to sound pressure on the microphone and which moves the diaphragm. Amplifier 101 is characterized by a gain characteristic of relatively low gain for frequencies below the audible range and relatively high gain for frequencies in the audible range. Preferably, the gain characteristic falls off as a 1st, 2nd, 3rd, 4th or higher order below the audible range. Furthermore, the amplifier is characterized in that the low-frequency microphone signal is processed as a common-mode signal and the high-frequency microphone signal is processed as a differential-mode signal. Thereby effectively suppressing low frequency components. The differential output signal in terminals  and  ^* is supplied as a microphone preamplifier output signal.

Figure 13a shows a differential amplifier with input and output terminals and a signal showing the low frequency behavior of the differential amplifier. The signal processing of amplifier 101 at low frequencies is shown. Curve 201 shows the time domain input to the amplifier ([phi]) and the microphone signal at low frequencies. Curves 1302 and 1303 show that the corresponding outputs ([phi],[phi] ^* ) of the amplifiers are substantially in phase, thus representing a common-mode differential signal.

Figure 13b shows a differential amplifier with input and output terminals and a signal showing the high frequency behavior of the differential amplifier. The signal processing of amplifier 1201 at high audio band frequencies is shown. Curve 1301 shows the time domain input to the amplifier and the microphone signal at audible frequencies. Curves 1302 and 1303 show that the corresponding outputs ([phi],[phi] ^* ) of the amplifiers are substantially 180 degrees out of phase, thus representing a differential mode differential signal.

Figure 14 shows part of a digital microphone comprising an electret microphone element and a differential amplifier in a first configuration. The microphone Cmic 105 provides a signal to a differential amplifier 1408 through a DC blocking capacitor 1404. The differential amplifier is coupled as an instrumentation amplifier and includes a first amplifier 1401 and a second amplifier 1402 . The feedback circuit comprising components 1405, 1406 and 1407 implements a feedback filter with the features described above. Furthermore, the phase shifter circuit PD(f) 1403 implements a frequency dependent phase delay for the signal processing explained with reference to Figures 13a and 13b.

The differential amplifier's two-terminal output ([phi],[phi] ^* ) is provided to differential amplifier 1409, which provides a single-ended output signal Vo with respect to ground reference Gnd through resistors 1410, 1411 and 1412 and operational amplifier 1413.

Amplifiers 1408 and 1409 can be implemented on common semiconductor substrates, however, the differential signal is preferably routed in a noisy electrical environment, for example, from a chip carrying a preamplifier to another chip for further processing. signal processing. In this other chip, the differential signal can be converted to a single-ended signal by the amplifier 1409 .

Figure 15 shows part of a digital microphone comprising an electret microphone element and a differential amplifier in a second configuration. The electret microphone element is biased by a bias resistor 104 coupled to a bias voltage Vb. Thus, charges are supplied to the diaphragm or the movable member of the microphone Cmic 105 . In order to prevent the DC bias voltage Vb from being input into the differential amplifier 1510, the capacitor 1404 is used. The differential amplifier 1510 is configured as a so-called instrumentation amplifier, where the two operational amplifiers 1501 and 1502 are both coupled with feedback paths from their respective outputs [phi], [phi] ^* to their respective inverting input terminals. The inverting inputs (-) of the operational amplifiers are coupled together through capacitor 1505 . The non-inverting input of an operational amplifier 1501 is coupled through a DC-blocking capacitor 1404 to receive the microphone signal. The non-inverting input of another operational amplifier 1502 is coupled through a resistor 1508 to receive a feedback signal from the output [phi] of the other operational amplifier. The non-inverting input is also coupled to ground through capacitor 1509 .

The feedback path of the operational amplifier 1501 includes a resistor 1503 and a capacitor 1504 coupled in parallel to form a first order filter. Likewise, the feedback path of the operational amplifier 1502 includes a resistor 1507 and a capacitor 1506 in parallel to form a first order filter.

The RC network comprising resistor 1508 and capacitor 1509 is configured to provide a frequency dependent phase shift of the signal.

The phase shift between the differential amplifier formed around the operational amplifier 1501 and the other formed around the operational amplifier 1502 is realized partly through the capacitor 1505 and partly through the resistance-capacitance filters 1508 and 1509 . Thus, capacitor 1505, which is a phase shifter coupled between the input terminals of the differential amplifier, and capacitor 1509 and Resistor 1508, to obtain the phase shift. In this way, the effective phase shift is achieved by two phase shifters. However, one of such two coupled phase shifters may be sufficient to establish an effective phase shift. Likewise, other configurations of phase shifters may be implemented without departing from the scope of the present invention.

Figure 16 shows part of a digital microphone comprising an electret microphone element and a differential amplifier with a feedback filter. In this figure, a differential amplifier 1607 with a first and a second operational amplifier is shown, with a filter block 1603 . The filter block 1603 implements the feedback path of the corresponding operational amplifier, and the coupling of the inverting inputs of the corresponding operational amplifiers 1601 and 1602 . The filter block comprises input ports m, n and output ports k, I.

A filter block may implement a filter with two feedback paths of any order (eg, 1st order, 2nd order, 3rd order, 4th order, or any higher order).

Figure 17 shows a preferred embodiment of the feedback filter. A feedback filter may implement filter block 1603 of FIG. 16 . The feedback filter includes a first path in which resistor 1701 is connected in parallel with capacitor 1702 and a second path in which resistor 1704 is connected in parallel with capacitor 1703 . A first path extends between ports m and k and a second path extends between ports n and I.

Figure 18 is a schematic view of a microphone with an integrated circuit and a microphone element. Integrated circuit 1802 includes the preamplifier described above and is contained on a semiconductor substrate or chip.

Figure 19 is a schematic view of a microphone with an integrated circuit and a MEMS microphone element. The microphone 1902 includes a MEMS microphone element 1903 integrated on a first substrate and a preamplifier circuit 1901 integrated on a second substrate. The preamplifier circuit comprises one of the different embodiments described above, namely comprising a preamplifier with a feedback circuit, eg a voltage pump and/or a feedback circuit wherein the preamplifier is a differential amplifier or a single ended amplifier.

It should be noted that the MEMS microphone element 1903 and the microphone preamplifier 1901 may be integrated on the same semiconductor substrate.

In general, it should be noted that embodiments of the invention may include one or more of the described features. For example, a preamplifier may include one or more of the following features:

· DC offset in the preamplifier stage;

· DC offset in the feedback filter;

· DC offset in the preamplifier stage and feedback filter;

·Voltage pump;

· Voltage pump combined with DC offset;

A radio frequency (RF) filter coupled to the following circuit nodes:

o non-inverting amplifier input; and/or

o Inverting amplifier input; and/or

o filter input; and/or

o Amplifier output.

• Input bias components.

It should be noted that the invention is not limited to the illustrated embodiments.

The above features can be applied to embodiments of a preamplifier configuration that includes a gain stage with a feedback filter, wherein the configuration has a relatively low gain response for frequencies below the audio band and a relatively high gain response in the audio band. and a substantially flat gain response. An audio band may be defined as any frequency band within the typical definition of an audio band. A typical definition could be 20Hz to 20KHz. Examples of lower cutoff frequencies for the audio band may be: 20Hz, 50Hz, 80Hz, 100Hz, 150Hz, 200Hz, 250hz. Examples of higher cutoff frequencies for the audio band may be 3KHz, 5KHz, 8KHz, 10KHz, 18KHz, 20KHz. Substantially flat refers to gain response variations within approximately +/- 1dB; +/- 3dB; +/- 4dB; +/- 6dB. However, other values of the variant can also be used to define the term "substantially flat".

In the above, different preamplifier configurations were described. These configurations include different input/output terminal configurations, for example, two-terminal configurations. It should be noted, however, that three, four, or more terminals may be provided for input/output of signals of microphones and preamplifiers. In particular, it should be noted that separate terminals may be provided for the supply voltage (at the first terminal) and the preamplifier output (at the second terminal). In the case of a differential preamplifier output, in addition to the terminal for the power supply, two terminals for the output signal may be provided. A separate terminal is provided as a ground reference. This ground reference is usually, but not always, shared by the power supply and the output signal.

Claims (32)

1. A microphone preamplifier comprising a differential input stage having first and second input terminals and an output stage having an output terminal; wherein the microphone preamplifier is integrated in the semiconductor substrate; and a feedback circuit with a low-pass frequency transfer function coupled between the output terminal and the first input terminal and integrated on the semiconductor substrate; Wherein, the second input terminal provides the input of the microphone signal. 2. The microphone preamplifier according to claim 1, wherein the differential input stage comprises an inverting input and a non-inverting input, wherein the non-inverting input is used to receive the microphone signal, and the inverting input is used to receive the signal provided by the feedback circuit. feedback signal. 3. A microphone preamplifier according to claim 1 or 2, wherein the feedback circuit is a filter with a transfer function, in the frequency domain, having zeros and poles; wherein the zeros are at higher frequencies than the poles. 4. A microphone preamplifier according to any one of claims 1 to 3, wherein the preamplifier has a transfer function, in the frequency domain, with zeros and poles; wherein the poles are located at 0.1 Hz to 50 Hz or In the range of 0.1Hz to 100Hz or 0.1 to 200Hz. 5. A microphone preamplifier according to any one of claims 1 to 4, wherein the feedback circuit is in the frequency domain with a relatively high gain level below the transition frequency range, in the transition frequency range above the filter with a relatively low gain level. 6. The microphone preamplifier of claim 5, wherein the transition frequency range is below a frequency of about 100 Hz. 7. The microphone preamplifier of claim 5, wherein the transition frequency range is below a frequency of about 40 Hz. 8. A microphone preamplifier according to any one of claims 1 to 7, wherein the feedback circuit is an active filter. 9. A microphone preamplifier according to any one of claims 1 to 7, wherein the feedback circuit is a passive filter. 10. A microphone preamplifier according to any one of claims 1 to 9, wherein the feedback circuit is configured with an active device providing an ohmic impedance across the two-port circuit. 10. A microphone preamplifier according to any one of claims 1 to 11, wherein the feedback circuit comprises an arrangement having first and second active devices and a current source, wherein the devices comprise respective gate terminals terminal, a source terminal and a drain terminal, wherein the gate terminal is interconnected at the node connected to the current source and the drain terminal of the first device, wherein the source terminals are interconnected together so that at its drain and The second device is provided in a state where an ohmic resistance is provided between the source terminals. 11. A microphone preamplifier according to any one of claims 1 to 12, wherein the feedback circuit comprises a filter having an input port connected to a series connection of first and second resistors ( Resistors form a resistor node in their interconnection), the input port is connected to the series connection of first and second capacitors forming a capacitor node in their interconnection; there is an output port in the capacitor node; where the resistor The device and capacitor nodes are interconnected by active devices providing ohmic impedance across the two-port circuit. 12. A microphone preamplifier according to any one of claims 1 to 11, wherein the feedback circuit comprises a source providing a DC offset. 13. A microphone preamplifier according to any one of claims 1 to 12, wherein the feedback circuit comprises a filter having a source providing a DC offset. 14. A microphone preamplifier according to any one of claims 1 to 13, wherein the DC offset is provided in the first input of the preamplifier by a circuit arrangement comprising a current source, the current A source is coupled in a circuit node of the first input of the preamplifier to a current source of an active device providing an ohmic impedance across the two-port circuit. 15. A microphone preamplifier according to claim 14, wherein the active device constitutes a second device in a configuration having first and second active devices and a current source, wherein the devices comprise respective gate terminals, a source terminal and a drain terminal, wherein the gate terminal is interconnected at a node connected to a current source and a drain terminal of the first device, wherein the source terminals are interconnected together so that at the drain and source terminals thereof The second device is provided in a state where an ohmic resistance is provided between the sub-units. 16. The microphone preamplifier according to claim 1 , wherein the differential input stage comprises first and second current paths for respective differential inputs, wherein, through the first and second current paths of the differential input stage, Different DC currents are generated in order to provide a DC offset. 17. A microphone preamplifier according to any one of claims 1 to 16, wherein the preamplifier is configured to receive the microphone signal through an input bias element having a Relatively high ohmic impedance with relatively low ohmic resistance when the microphone signal is relatively large. 18. A microphone preamplifier according to claim 17, wherein the biasing element is configured by two cross-coupled diodes. 19. The microphone preamplifier of claim 17, wherein the biasing element is configured by two cross-coupled bipolar transistors. 20. The microphone preamplifier of claim 17, wherein the biasing element is configured by two cross-coupled metal oxide semiconductor (MOS) devices. 21. A microphone preamplifier according to any one of claims 1 to 20, wherein the preamplifier is a differential amplifier configured to convert an input signal to a common mode signal for low frequencies, and For sound frequency conversion to differential signals. 22. A microphone preamplifier according to any one of claims 1 to 21, wherein the differential amplifier is configured as an instrument-type amplifier having two inputs and first and second outputs, wherein the first The first and second inputs are for receiving microphone signals, however, wherein the inputs are coupled to receive microphone signals that are substantially in phase at relatively low frequencies and substantially out of phase at relatively high frequencies. 23. A microphone preamplifier according to any one of claims 1 to 22, wherein the differential amplifier is configured to provide frequencies below the audio band as the common mode signal and the audio band signal as the differential mode signal. 24. A microphone preamplifier as claimed in any one of claims 1 to 23, wherein a phase shifter is coupled between the inputs of the differential amplifier. 25. A microphone preamplifier according to any one of claims 1 to 24, wherein a phase-shifted device. 26. A microphone preamplifier according to any one of claims 21 to 25, wherein there is a coupling between a signal node substantially in phase with the input signal to the amplifier and an input terminal on the opposite side of the differential amplifier phase shifter. 27. A microphone as claimed in any one of claims 1 to 26, comprising a voltage pump integrated on a semiconductor substrate. 28. A microphone according to any one of claims 1 to 27, comprising an electret microphone configured to provide a microphone preamplifier in response to sound pressure on the electret microphone Provides a microphone signal. 29. The microphone module according to any one of claims 1 to 28, wherein the electret microphone is installed in the space formed by the pickup, and wherein the microphone preamplifier is integrated in the microphone module. 30. A microphone preamplifier according to any one of claims 1 to 29, comprising a MEMS microphone element to provide a microphone signal to the microphone preamplifier in response to sound pressure across the MEMS microphone. 31. The microphone preamplifier of claim 29, the MEMS microphone element and the microphone preamplifier being integrated on a semiconductor substrate.

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