CN1849718A - Memory device and methods of using and making the device - Google Patents

Abstract

A memory cell (104) made of two electrodes(106, 202, 108, 204) with a controllably conductive media between the two electrodes is disclosed. The controllably conductive media (110) contains an active low conductive layer (112) and passive layer (114). The controllably conductive media (110) changes its impedance when an external stimuli such as an applied electric field is imposed thereon. Methods of making the memory devices/cells, methods of using the memory devices/cells, and devices such as computers containing the memory devices/cells are also disclosed.

Description

Memory device and method of using and manufacturing same

technical field

The present invention generally relates to memory devices and methods of making and using the same. In particular the invention relates to memory devices containing controllably conductive layers.

Background technique

The basic functions of computers and storage devices include processing information and storage. In typical computer systems, these algorithms, logic, and memory operations are performed by devices that can be reversibly switched between two states, commonly referred to as "0" and "1." These switching devices are assembled from semiconductor devices that can perform these various functions and can switch between two states at high speed. .

Electronic addressing or logic devices, for example for storing or processing data, are fabricated using inorganic solid-state technologies, especially crystalline silicon devices. Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is one of the main important devices.

Many of the advances to make computers and memory devices faster, smaller and cheaper involve integrating and packing more transistors or other electronic structures onto a postage stamp-sized piece of silicon. A silicon chip the size of a postage stamp may contain tens of millions of transistors, each as small as a few hundred nanometers. However, silicon-based devices are approaching their fundamental object size limit.

Inorganic solid-state devices typically cannot use complex structures because of the high cost and loss of data storage density. The circuits of volatile semiconductor memories based on inorganic semiconductor materials must be continuously supplied with current to keep stored information, resulting in heat and high power losses. Non-volatile semiconductor devices have reduced data rates and relatively high energy consumption and high complexity.

Furthermore, as inorganic solid-state devices decrease in size and increase in integration, sensitivity to alignment tolerances increases, resulting in significantly more difficulties in fabrication. Forming features with a small minimum size does not imply that the minimum size can be used to make a working circuit. Must have an alignment tolerance that is much smaller than the small minimum size, for example a quarter of the minimum size.

Scaling inorganic solid-state devices poses the problem of dopant diffusion length. The dopant diffusion length in silicon creates difficulties in fabrication design as the dimensionality decreases. In this relationship, a number of adjustments are used to reduce dopant mobility and reduce time at high temperature. However, it is not certain that these adjustments can be sustained indefinitely.

Applying a voltage across a semiconductor junction (in the reverse bias direction) creates a depletion region near the junction. The width of the depletion region depends on the degree of doping of the semiconductor. If a depletion region extends into contact with another depletion region, punch through or uncontrollable current flow may occur.

Higher doping levels tend to minimize the spacing needed to avoid punchthrough. However, if the voltage variation per unit distance is large, other difficulties arise in that a large voltage variation per unit distance results in a large intensity of the electric field. Electrons passing through such a steep gradient may be accelerated to energy levels significantly greater than the minimum conduction band energy. Such electrons are known as hot electrons and may pass through the insulator with sufficient energy to cause irreversible damage to the semiconductor device.

Scaling and integration make isolation of single-chip semiconductor substrates more challenging. In particular, the lateral isolation of devices from each other presents difficulties in certain situations. Another difficulty is leakage current reduction. Yet another difficulty is the diffusion of carriers in the substrate; ie free carriers can diffuse beyond tens of microns and neutralize the stored charges.

Contents of the invention

The following is a summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not intended to define key/critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.

The present invention provides new memory devices having one or more of the following: small size compared to conventional memory devices, capable of storing multiple bits of information, short resistance/impedance switching times, low operating Voltage, low cost, high reliability, long life (thousands/millions of cycles), three-dimensional packaging, relatively low temperature (or high temperature) processing, light weight, high density/integration, and extended memory retention.

One aspect of the present invention relates to a memory device comprising at least one memory cell consisting of two electrodes with a controllably conductive medium between them, the controllably conductive medium comprising a low-conductivity layer and a passive layer, wherein the passive layer has a valence band Fermi level close to that of the low-conductivity layer. Other aspects of the invention relate to using (eg programming) said memory device/unit to manufacture a memory device/unit, and to devices such as computers containing said memory device/unit.

To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and accompanying drawings describe in detail certain aspects and embodiments of the invention. However, these are only representative, and the principles of the present invention may be varied in some ways. Other objects, advantages or novel features of the present invention will become more apparent from the following detailed description of the present invention with reference to the accompanying drawings.

Description of drawings

FIG. 1 is a perspective view depicting a two-dimensional microelectronic device containing a plurality of memory devices in accordance with one aspect of the present invention.

2 is a perspective view depicting a three-dimensional microelectronic device including a plurality of memory devices, according to another aspect of the present invention.

Detailed ways

The invention relates to a memory cell consisting of two electrodes with a controllably conductive medium between them. The controllably conductive medium contains conductive layers and passive layers. This medium can be organic, inorganic or organic mixed inorganic materials. The memory cell may optionally contain other layers, such as other electrodes, charge holding layers, and/or chemically active layers. The impedance of the controllably conductive medium changes when an external stimulus such as an electric field is applied. Multiple memory cells, which may be referred to as an array, form a new memory device. In this relationship, the memory cell can form a new memory device and operate in a manner similar to a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) in conventional semiconductor memory devices. However, there are advantages to replacing conventional MOSFETs with new memory cells in memory devices.

Referring to FIG. 1 , a microelectronic memory device 100 containing a plurality of memory cells and an exploded view 102 of an exemplary memory cell 104 are briefly described in accordance with an aspect of the present invention. Microelectronic memory device 100 contains a desired number of memory cells, determined by the number of columns, rows, and layers (ie, three-dimensional directions described below) present. The first electrode 106 and the second electrode 108 are shown in a substantially perpendicular orientation, although other orientations are possible to achieve the structure of the exploded view 102 . Each memory cell 104 includes a first electrode 106 and a second electrode 108, and a controllably conductive medium 110 between the two electrodes. The controllably conductive medium 110 includes a low-conductivity layer 112 and a passive layer 114 . Peripheral circuits and devices are not shown for simplicity.

The memory cell contains at least two electrodes, for example, one or more electrodes may be disposed between two electrodes sandwiching a controllably conductive medium. The electrodes may be made of conductive materials such as conductive metals, conductive metal alloys, conductive metal oxides, conductive polymer films, semiconductor materials, and the like.

Examples of electrodes include one or more of the following: aluminum, chromium, copper, germanium, gold, magnesium, manganese, indium, iron, nickel, palladium, platinum, silver, titanium, zinc and their alloys; indium tin oxide (ITO); polysilicon; doped amorphous silicon; metal silicide, etc. Alloy electrodes include in particular Hastelloy(R), Kovar(R), Invar, Monel(R), Inconel(R), brass, stainless steel , magnesium-silver alloy and many other alloys.

In a specific embodiment, the thickness of each electrode is independently about 0.01 Φm or more and about 10 μm or less. In another specific embodiment, the thickness of each electrode is independently about 0.05 μm or greater and about 5 μm or less. In yet another specific embodiment, the thickness of each electrode is independently about 0.1 μm or greater and about 1 μm or less.

A controllably conductive medium, disposed between two electrodes, can be made conductive, semiconductive, or nonconductive in a controllable manner using external stimuli. Usually in the absence of external stimuli, the conductive medium can be controlled to be non-conductive or have high impedance. Furthermore, in some embodiments, multiple degrees of conductivity/resistivity can be established in a controllably conductive medium in a controllable manner. For example, multiple degrees of conductivity/resistivity for a controllably conductive medium may include a non-conductive state, a highly conductive state, and a semi-conductive state.

A controllably conductive medium can be controlled to exhibit conductivity, non-conductivity, or any state in between (degrees of conductivity) by external stimuli (external means coming from outside the controllable medium). For example, under an external electric field, radiation, etc., the originally non-conductive controllable conductive medium is converted into a conductive controllable conductive medium.

The controllably conductive medium contains one or more low-conductivity layers and one or more passive layers. In one embodiment, the controllably conductive medium contains at least one organic semiconductor layer adjacent to the passive layer (without any intervening layers between the organic semiconductor layer and the passive layer). In another embodiment, the controllably conductive medium contains at least one inorganic low-conductivity layer adjacent to the passive layer (without any intervening layers between the inorganic layer and the passive layer). In yet another embodiment, the controllably conductive medium contains a mixture of organic and inorganic materials as a low-conductivity layer adjacent to the passive layer (without any intervening layers between the low-conductivity layer and the passive layer).

The organic semiconductor layer contains at least one organic polymer (such as a conjugated organic polymer), an organometallic compound (such as a conjugated organometallic compound), an organometallic polymer (such as a conjugated organometallic polymer), Buckyball (Buckyball) , carbon nanotubes (such as C6 to C60 carbon nanotubes), etc. The organic semiconductor thus has a carbon-dominated structure, usually a carbon-hydrogen-dominated structure, which differs from conventional MOSFETs. Typical characteristics of organic semiconducting materials are that they have overlapping p orbitals, and/or that they have at least two stable oxidation states. Organic semiconductor materials are also characterized in that they can exhibit two or more resonance structures. The overlapping p orbitals provide controllable conductive properties of the controllable conductive medium. The amount of charge injected into the organic semiconductor layer also affects the degree of conductivity of the organic semiconductor layer.

Carbon nanotubes are generally rolled seamless cylinders of hexagonal networks of carbon atoms (usually from about 6 to about 60 carbon atoms). Each end can be covered by half a fullerene molecule. Carbon nanotubes can be prepared by laser evaporation of carbon targets (carbon-nickel catalysts can accelerate growth) or carbon-arc methods to grow similar arrays of single-walled nanotubes. Buckyballs are more specifically Buckminster Fullerenes, football-shaped 60-atom clusters of pure carbon.

Organic polymers generally contain conjugated organic polymers. The polymer backbone of the conjugated organic polymer extends lengthwise between the electrodes (generally substantially perpendicular to the interior, facing surface) of the electrodes. Conjugated organic polymers can be linear or branched as long as the polymer retains its conjugated nature. Conjugated polymers are characterized by their overlapping p orbitals. Conjugated polymers are also characterized in that they exhibit two or more resonance structures. The conjugated nature of the conjugated organic polymers provides controllable conductive properties of the conductive medium.

In this relationship, a low-conductivity layer or an organic semiconductor layer, such as a conjugated organic polymer, has the ability to donate or accept charges. Typically, atoms/moieties in organic semiconductors or polymers have at least two relatively stable oxidation states. The two relatively stable oxidation states enable the organic semiconductor to donate and accept charge and interact electrically with conductivity-promoting compounds. The ability of the organic semiconductor layer to donate and accept charges and to electrically interact with the passive layer also depends on the properties of the conductivity-promoting compound. The injected charges from the passive layer can be trapped in the organic semiconductor layer and the interface adjacent to the passive layer. This changes the conductivity of the low-conductivity layer causing a memory effect.

The organic polymer (or the organic monomers constituting the organic polymer) may be cyclic or acyclic. During formation or deposition, the organic polymer self-assembles between the electrodes. Examples of conjugated organic polymers include one or more of polyacetylene; polyphenylacetylene; polytolan; polyaniline; poly(p-phenyl-vinyl); polythiophene; polyporphyrin; rings; thiol-derived polyporphyrins; polymetallocenes such as polyferrocenes, polyphthalocyanines; polyvinyls; polystyrene (polystiroles); Methyl)tolan; Polybis(trifluoromethyl)acetylene; Polybis(tert-butyldiphenyl)acetylene; Poly(trimethylsilyl)tolan; Poly(carbazole)tolan ; Polydiacetylene; Polypyridylacetylene; Polymethoxyphenylacetylene; Polymethylphenylacetylene; Poly(tert-butyl)phenylacetylene; Polynitro-phenylacetylene; Poly(trifluoromethyl)phenylacetylene; Poly( Trimethylsilyl)phenylene vinylene; polydipyrrolylmethane; polyindolequinone (polyindoqiunone); polydihydroxyindole; polytrihydroxyindole; furan-polydihydroxyindole; polyindolequinone-2 -carboxyl; polybenzylquinone; polybenzobithiazole; poly(p-phenylsulfide); polypyrrole; polystyrene; polyfuran; polybenzazole; polyazulene; polyphenyl; polypyridine; polydi Pyridine; polyhexathiophene; poly(silicone-semi-porphyrazine) [poly(siliconoxoporphyrazine)]; poly(germanone-semi-porphyrazine); poly(vinyldioxythiophene); polypyridine metal complexes, etc.

Examples of chemical structures of repeating units/moieties to make conjugated organic polymers and conjugated organometallic polymers include one or more of formulas (I) to (XIII):

Wherein each R is independently hydrogen or hydrocarbyl; each M is independently a metal; each E is independently O, N, S, Se, Te or CH; each L is independently containing or continuously conjugated (not saturated); and each n is independently about 1 or greater and about 25,000 or less. In another specific embodiment, each n is independently about 2 or greater and about 10,000 or less. In yet another specific embodiment, each n is independently about 20 or greater and about 5,000 or less. Examples of metals include Ag, Al, Au, B, Cd, Co, Cu, Fe, Ga, Hg, Ir, Mg, Mn, Ni, Pb, Pd, Pt, Rh, Sn, and Zn. Examples of the L group include hydrocarbon groups having conjugative properties or the ability to form resonance structures, such as phenyl, substituted phenyl, ethynyl and the like.

Any stated formula may have one or more side chain substituents not shown in the formula. For example, phenyl groups may occur on polythiophene structures, such as at position 3 of each thiophene moiety. In another example, alkyl, alkoxy, cyano, amine, and/or hydroxyl substituents may be present in any polyphenylene vinylene, polytolan, and poly(p-phenylvinyl) conjugated polymer on the benzene ring of the compound.

The term "hydrocarbyl" includes hydrocarbons and substantially substituted hydrocarbon groups. Hydrocarbyl groups contain 1 or more carbon atoms and usually about 60 or fewer carbon atoms. In another specific embodiment, the hydrocarbyl group contains 2 or more carbon atoms and about 30 or fewer carbon atoms. Substituted hydrocarbons refer to groups containing heteroatom substituents or heteroatoms that do not affect the primary organic properties of the polymer and do not interfere with the ability of the organic polymer to form conjugated structures. Examples of hydrocarbyl groups include the following:

(1) Hydrocarbon substituents, that is, aliphatic (such as alkyl or alkenyl), alicyclic (such as cycloalkyl, cycloalkenyl) substituents, acyl, phenyl, aryl-, aliphatic - and cycloaliphatic-substituted aromatic substituents, etc., and cyclic substituents, wherein the ring is another part of the molecule entirely through (that is, for example, any two of the specified substituents may together form an aliphatic ring group);

(2) Substituted hydrocarbon substituents, i.e., those containing non-hydrocarbon groups, which do not alter the primary organic nature of the substituents throughout the present invention; those skilled in the art will know that such groups (such as halogen (especially chlorine and fluorine, such as perfluoroalkyl, perfluoroaryl), cyano, thiocyanato, amine, alkylamino, sulfonyl, hydroxyl, mercapto, nitro, nitroso group, sulfoxy group (sulfoxy) etc.);

(3) Heteroatom substituents, that is, substituents that have mainly organic properties throughout the present invention, contain atoms other than carbon, appear in rings or chains, and other parts are composed of carbon atoms (such as alkoxy, Alkylthio). Suitable heteroatoms will be readily apparent to those skilled in the art and include, for example, sulfur, oxygen, nitrogen, fluorine, chlorine and such substituents as pyridyl, furyl, thienyl, imidazolyl, imino, amide group, carbamoyl group, etc.

The active low-conductivity layer may contain inorganic materials in addition to or as an alternative to organic materials. Inorganic materials include low conductivity chalcogenides or transition metal oxides. Transition metal oxides generally have low electrical conductivity, represented by the general formula _MxOy , where M is a transition metal, and x and y _are independently from about 0.25 to about 5. Similar transition metal sulfides can also be used. Transition metals in oxides allow multiple oxidation states, leading to changes in conductivity under external fields. Examples include copper oxides (CuO, Cu ₂ O), iron oxides (FeO, Fe ₃ O ₄ ), manganese oxides (MnO ₂ , Mn ₂ O _{3 ,} etc.), titanium oxides (TiO ₂ ). This material can be formed by thermal evaporation, CVD or plasma. One advantage of using inorganic materials is the greater flexibility of fabrication using high temperatures so that their use can be combined with conventional techniques to deposit top layers such as electrodes. Another advantage is that inorganic materials have high thermal diffusivity. This enables high-current operation of the resulting device with high reliability.

The active low conductivity layer can be a mixture of organic and inorganic materials. Inorganic materials (transition metal oxides/sulfides) are often embedded in organic semiconducting materials. Examples include mixing polyphenylene vinylene and Cu ₂ S, mixing polyphenylene vinylene and Cu ₂ O, and the like. This layer can be formed in an economical manner. For example, polyphenylene vinylene dissolved with a Cu ⁺ salt such as copper styrene 4-sulfonate can be spin-coated. The substrate can be a passive layer or a facilitator layer. Then, a reactive gas such as H ₂ S is introduced by CVD method to react with Cu ⁺ to produce Cu ₂ S intercalated uniformly. This organic-inorganic hybrid material can have controllable initial conductivity by adjusting the concentration of copper ions. Another advantage over purely organic materials is that organic-inorganic hybrid materials can, in some cases, have good thermal diffusivity due to the presence of inorganic materials. Therefore, it may allow high current operation of the resulting device with good reliability.

In one specific embodiment, the new memory cell contains both inorganic _Cu2O and organic semiconducting material as the active low conductivity layer. In this particular embodiment, _Cu2O is on the passive layer and has a thickness of about 1 nanometer to about 3 nanometers. The organic semiconductor material is on _Cu2O and has a thickness of about 0.001 micron or more to about 1 micron or less.

In one embodiment, the low conductivity layer contains thin layers designed to enhance or extend charge retention time. This thin layer can be placed anywhere on the low conductivity layer, but is usually near the middle of the layer. The thin layer contains any electrode material or compound of the heterocyclic/aromatic compound layer described below. In a specific embodiment, the thin layer has a thickness of about 50 Angstroms (A) or more to about 0.1 microns or less. In another specific embodiment, the thin layer has a thickness of about 100 Angstroms or more to about 0.05 microns or less. For example, a memory cell may contain a first electrode of copper, a passive layer of copper sulfide, a low-conductivity layer of poly(phenylvinyl), and a second electrode of aluminum, wherein the low-conductivity layer of poly(phenylvinyl) is placed between It contains a 250 angstrom thick layer of copper.

In a specific embodiment, the organic semiconductor material is free of organometallic compounds. In another embodiment, the organic semiconductor material comprises an organic polymer doped with an organometallic compound. In yet another embodiment, the memory cell optionally contains an organometallic compound layer. In yet another embodiment, the low conductivity layer contains an organometallic compound. Examples of chemical structures of various organometallic compounds include formulas (XIV) to (XVII):

In the formula, M and E are as defined above.

In one embodiment, the low-conductivity layer is not doped with salt. In another embodiment, the low conductivity layer is doped with salt. The salts are ionic compounds having anions and cations. Typical examples of salts that can be used to dope the low-conductivity layer include alkaline earth metal halides, sulfates, persulfates, nitrates, phosphates, etc.; alkali metal halides, sulfates, persulfates, nitrates, phosphates, etc.; Transition metal halides, sulfates, persulfates, nitrates, phosphates, etc.; ammonium halides, sulfates, persulfates, nitrates, phosphates, etc.; quaternary alkyl ammonium halides, sulfates, persulfates, nitric acid Salt, Phosphate, etc.

In a specific embodiment, the low conductivity layer has a thickness of about 0.001 microns or more to about 5 microns or less. In another specific embodiment, the low conductivity layer has a thickness of about 0.01 microns or more to 2.5 microns or less. In yet another specific embodiment, the low conductivity layer has a thickness of about 0.05 micron or more to about 1 micron or less.

The low-conductivity layer can be formed using spin coating techniques (deposition of polymer/mixture of polymer precursors and solvent followed by removal of solvent from substrate/electrode), using optional chemical vapor deposition including gas reaction, vapor deposition ( CVD) formation, etc. CVD includes low pressure chemical vapor deposition (LPCVD), plasma enhanced chemical vapor deposition (PECVD) and high density chemical vapor deposition (HDCVD). During formation or deposition, low conductivity materials can self-assemble between electrodes. It is generally not necessary to functionalize one or more terminal ends of the organic polymer to attach it to the electrode/passive layer.

Covalent bonds can be formed between low-conductivity materials and passive layers. Alternatively, intimate contact is required to provide good charge carrier/electron exchange between the low conductivity layer and the passive layer. The low conductivity layer and the passive layer are electrically coupled such that there is charge carrier/electron exchange between the two layers.

The passive layer contains at least one conduction promoting compound which provides controllable conductive properties of the controllably conductive medium. The conduction promoting compound has the ability to donate or accept charges (holes and/or electrons). The passive layer can thus transport between the electrode and the low-conductivity layer/passive layer interface, facilitate charge/carrier injection into the low-conductivity layer, and/or increase the concentration of charge carriers in the low-conductivity layer. In some examples, the passive layer can store opposite charges thereby providing charge balancing of the overall memory device. Storage of charges/charge carriers is facilitated by the presence of two relatively stable oxidation states of the conduction-facilitating compound.

In other examples, the passive layer has ferroelectric behavior, such as ion displacement under an applied field. This usually occurs at the junction of the active layer. The "ferroelectric" nature results in a polarity influenced by an applied field, which significantly modifies the interface state, which in turn changes the conductivity of the memory cell. Memory cells made of such passive layer materials have an ion-electron conduction mechanism, and the data retention time of the memory cells is usually relatively long because of the replacement of metal ions at the interface. However, this has disadvantages in some instances because it sometimes takes a long time to switch a memory cell from one state to another.

Typically, the conduction-enhancing compound or atoms in the conduction-enhancing compound have at least two relatively stable oxidation states. The two relatively stable oxidation states allow the conduction-promoting compound to donate or accept charges and electrically interact with the low-conductivity layer. The particular conduction-promoting compound used in a given memory cell is selected such that its two relatively stable oxidation states match those of the low-conductivity material. Match the energy bands of the two relatively stable oxidation states of the conduction-promoting compound and the low-conductivity material, and promote the retention of charge carriers in the low-conductivity layer.

Band matching means that the Fermi level of the passive layer is close to the valence band of the active low-conductivity layer. As a result, injected charge carriers (to the active layer) can recombine with charges residing in the passive layer while the energy band of the charged low-conducting layer does not substantially change. Matching energy bands involves compromising the erasure of charge injection and the length of charge (data) retention time.

In a specific embodiment, when band matched, the Fermi level of the passive layer is within about 0.7 electron volts (eV) of the valence band of the low conduction layer. In another specific embodiment, the Fermi level of the passive layer is within about 0.5 eV of the valence band of the low conductivity layer. In yet another specific embodiment, the Fermi level of the passive layer is within about 0.3 electron volts of the valence band of the low conductivity layer. In yet another specific embodiment, the Fermi level of the passive layer is within about 0.15 eV of the valence band of the low-conducting layer. In some examples, the valence band is the highest occupied molecular orbital (HOMO) of the material.

Applying an external field according to the field direction can reduce the energy barrier between the passive layer and the low conductive layer. Therefore, it can be obtained that the charge injection is enhanced in the forward field during the program operation, and the charge combination is also enhanced in the reverse field during the erase operation.

In some instances, the passive layer may act as a catalyst when forming a low-conductivity material, particularly when the low-conductivity layer comprises a conjugated organic polymer. In this relationship, the polymer backbone of the conjugated organic polymer may initially form adjacent to the passive layer and grow or assemble away from and substantially perpendicular to the surface of the passive layer. As a result, the polymer backbone of the conjugated organic polymer is self-aligned in the transverse direction between the two electrodes.

Examples of conduction-promoting compounds that can make up the passive layer include one or more of ketone sulfides ( _CuxS , where x is from about 0.5 to about 3), silver sulfides ( _Ag2S , AgS), gold sulfides ( Au ₂ S, AuS), etc. Among these materials, Cu ₂ S and Ag ₂ S can have ferroelectric properties, referring to the displacement of metal ions under an external operating field. The passive layer may contain two or more sub-passive layers, each sub-layer containing the same, different or multiple conduction-promoting compounds.

The passive layer is grown using oxidation techniques, gas phase reaction or deposition between the electrodes. In some examples, to promote long charge retention times (in low conductivity layers), the passive layer may be plasma treated after formation. Plasma treatment modifies the energy barrier of the passive layer.

In one embodiment, the thickness of the passive layer containing the conduction enhancing compound is from about 2 Angstroms or more to about 0.1 microns or less. In another specific embodiment, the passive layer has a thickness of about 10 Angstroms or more to about 0.01 microns or less. In yet another specific embodiment, the passive layer has a thickness of about 50 Angstroms or more to about 0.005 microns or less.

To facilitate the fabrication and operation of new memory cells, the active low conductivity layer is thicker than the passive layer. In one embodiment, the thickness of the low-conductivity layer is about 10 to about 500 times thicker than the thickness of the passive layer. In yet another specific embodiment, the thickness of the low-conductivity layer is about 25 to about 250 times thicker than the thickness of the passive layer.

In a specific embodiment, the new memory cell optionally contains a layer of heterocyclic/aromatic compounds. In another embodiment, the low conductivity layer is doped with heterocyclic/aromatic compounds. If present, the heterocyclic/aromatic compound layer has a thickness of about 0.001 micron or more to about 1 micron or less. Examples of chemical structures of various heterocyclic/aromatic compounds specifically include nitrogen-containing heterocycles, including formulas (XVIII) to (XXIII):

The area size (measured by the surface area of two electrodes directly overlapping each other) of a single memory cell is small compared to conventional silicon-based memory cells such as MOSFETs. In one embodiment, the memory cell of the present invention has an area size of about 0.0001 square microns or more to about 4 square microns or less. In another embodiment, the memory cell of the present invention has an area size of about 0.001 square micron or more to about 1 square micron or less.

The operation of the new memory device/cell is promoted using an external stimulus to achieve the switching effect. External stimuli include external electric fields and/or light radiation. Under various conditions, a memory cell is conductive (low impedance or "on" state) or non-conductive (high impedance or "off" state).

A memory cell may then have more than one conductive or low impedance state, such as a very highly conductive state (very low impedance state), a highly conductive state (low impedance state), a conductive state (medium impedance state), and a non-conductive state (high impedance state). resistance state), thereby allowing multiple bits of information to be stored in a single memory cell, such as 2 or more bits of data or 4 or more bits of data.

When an external stimulus, such as an applied electric field, exceeds a threshold, then a memory cell switch from an "off" to an "on" state occurs. When the external stimulus does not exceed the threshold or is absent, then the switching of the memory cell from the "on" to the "off" state occurs. The threshold value varies according to various factors, including the properties of materials constituting the memory cell, the low-conductivity layer and the passive layer, the thickness of various layers, and the like.

In general, when there is an external stimulus such as an applied electric field that exceeds a threshold ("on" state), it causes the applied voltage to write information into or erase information from the memory cell, and there is a voltage below the threshold. When external stimuli, such as an applied electric field, cause the applied voltage to read information from the memory cell; conversely, when there is no external stimulus exceeding the threshold ("off" state), the applied voltage is prevented from writing information into the memory cell or Information is erased from the storage unit.

To write information into the memory cell, apply a voltage or pulse signal that exceeds the valve. To read the information written into the memory cell, a voltage or electric field of any polarity is applied. Impedance is measured to determine whether the memory cell is in a low impedance state or a high impedance state (thus "on" or "off"). In order to erase the written information from the memory cell, a negative voltage exceeding a threshold value or a polarity opposite to that of the write signal is applied.

The memory devices described herein can be used to form logic devices, such as central processing units (CPUs); volatile memory devices, such as DRAM devices, SRAM devices, etc.; input/output devices (I/O chips); and nonvolatile memories Software such as EEPROM, EPROM, PROM, etc. Memory devices can be fabricated in a planar orientation (two-dimensional), or in a three-dimensional orientation containing a planar array of at least two memory cells.

Referring to FIG. 2, a three-dimensional microelectronic memory device 200 containing a plurality of memory cells is shown, in accordance with one aspect of the present invention. The three-dimensional microelectronic memory device 200 includes a plurality of first electrodes 202 , a plurality of second electrodes 204 , and a plurality of memory cell layers 206 . Between each of the first and second electrodes is a controllably conductive medium (not shown). The plurality of first electrodes 202 and the plurality of second electrodes 204 are shown in a substantially vertical orientation, although other orientations are possible. Three-dimensional microelectronic memory devices can contain extremely high numbers of memory cells, thus increasing device density. Peripheral circuits and devices are not shown for brevity.

The storage unit/device can be used for any device that requires storage. For example, memory devices are used in computers, equipment, industrial equipment, handheld devices, communication equipment, media equipment, research and development equipment, transportation vehicles, radar/satellite devices, and the like. Handheld devices, and especially handheld electronic devices, can achieve increased portability due to the small size and light weight of the new memory devices. Examples of handheld devices include cell phones and other bi-locale communication devices, personal data assistants, hand-held navigators, pagers, laptop computers, remote controls, recorders (video and sound), radios, small televisions and web browsers, video cameras camera etc.

The following examples illustrate the invention. Unless otherwise indicated, in the following examples and in the remainder of the specification and claims, all parts and percentages are by weight, all temperatures are in degrees Celsius, and pressures are at or near atmospheric.

Example 1

A memory cell was formed using an upper electrode having a thickness of 2,000 angstroms of ITO and a lower electrode having a thickness of 1,000 angstroms of silver. A silver sulfide passive layer having a thickness of 50 angstroms was provided on the lower electrode. An organic semiconductor layer containing polyphenylene vinylene and having a thickness of 800 angstroms was formed on the passive layer by a CVD technique. Then the upper electrode is fixed on the polymer layer.

Example 2

A memory cell was formed using an upper electrode having a copper thickness of 1,000 angstroms and a lower electrode having a copper thickness of 1,000 angstroms. A copper sulfide passive layer having a thickness of 70 angstroms was provided on the lower electrode. Cu ₂ O with a thickness of 2 nm was formed as a first active layer on copper sulfide using a thermal heating technique. An organic polymer layer as a second active layer containing polyphenylene vinylene and having a thickness of 900 angstroms was formed on Cu ₂ O of the first active layer by a CVD technique. Then the upper electrode is fixed on the polymer layer.

Example 3

A memory cell was formed using an upper electrode having an aluminum thickness of 1,500 angstroms and a lower electrode having a copper thickness of 1,000 angstroms. A copper sulfide passive layer having a thickness of 65 angstroms was provided on the lower electrode. An organic semiconductor layer containing polyphenylene vinylene and having a thickness of 700 angstroms was formed on the passive layer by a CVD technique. Then the upper electrode is fixed on the polymer layer.

Example 4

A memory cell was formed using an upper electrode having a copper thickness of 1,500 angstroms and a lower electrode having a copper thickness of 1,000 angstroms. A copper sulfide passive layer having a thickness of 25 angstroms was provided on the lower electrode. An organic semiconductor layer with polythiophene and Cu ₂ S nanoparticles embedded therein and having a thickness of 700 angstroms was formed on the passive layer by spin coating and CVD techniques. Then the upper electrode is fixed on the polymer layer.

Although the invention has been shown and described in terms of certain preferred embodiments or embodiments, equivalent substitutions and modifications will occur to those skilled in the art upon the reading and understanding of this specification and the annexed drawings. Especially for the various functions possessed by the above-mentioned components (components, devices, circuits, etc.), unless otherwise specified, nouns (including any reference to "meaning") are used to describe any components related to these components that perform the functions Certain functions (ie, functional equivalents) of the components described above, even though not structurally equivalent to the disclosed structures, possess the functions described in the exemplary embodiments of the present invention. Furthermore, while a particular feature of the invention may be disclosed using only one of several embodiments, such feature may be combined with one or more other features of other embodiments to the advantage of any given or particular application.

Claims (17)

1. A storage unit (104) comprising: a first electrode (106, 202); a second electrode (108, 204); and A controllably conductive medium (110) positioned between the first electrode and the second electrode, the controllably conductive medium comprising: A low-conductivity layer (112) comprising at least one conjugated organic polymer, conjugated organometallic compound, conjugated organometallic polymer, buckyballs, carbon nanotubes, low-conductivity chalcogenides, and transition metal oxides ,as well as A passive layer (114) including a conduction promoting layer. 2. The memory cell according to claim 1, wherein said low-conductivity layer (112) comprises at least one conjugated organic polymer selected from the group consisting of polyacetylene; polyphenylene vinylene; polydiacetylene; Phenylacetylene; polyaniline; poly(p-phenyl-vinyl); polythiophene; polyporphyrin; porphyrin macrocycle; thiol-derived polyporphyrin; polymetallocenes, polyphthalocyanines; polystyrene. 3. The memory cell according to claim 1, wherein the conduction promoting compound (110) comprises at least one selected from copper sulfide, silver sulfide and/or gold sulfide. 4. The memory cell as claimed in claim 1, wherein the thickness of the low-conductivity layer (112) is about 0.001 micron or more and about 5 microns or less, and the thickness of the passive layer (114) is About 2 Angstroms or more and 0.1 microns or less. 5. The memory cell as claimed in claim 1, wherein the thickness of the low-conductivity layer (112) is about 0.01 micron or more and 1 micron or less, and the thickness of the passive layer (114) is about 10 Angstroms or more and 0.01 microns or less. 6. The memory cell according to claim 1, wherein said low-conductivity layer (112) comprises at least one conjugated organometallic compound or conjugated organometallic polymer selected from the group consisting of: 7. The memory cell according to claim 1, wherein said first electrode (106, 202) and said second electrode (108, 204) independently comprise aluminum, chromium, copper, germanium, gold, magnesium, At least one of manganese, indium, iron, nickel, palladium, platinum, silver, titanium, zinc or alloys thereof; indium tin oxide; polysilicon; doped amorphous silicon; 8. The memory cell according to claim 1, wherein said conduction-promoting compound (110) comprises at least one selected from copper sulfide or silver sulfide, and said low-conductivity layer comprises a conjugated polymer, The conjugated polymer comprises repeating units as follows:

. 9. The memory cell according to claim 1, wherein said conduction-promoting compound (110) comprises at least one selected from copper sulfide or silver sulfide, and said low-conductivity layer (112) comprises conjugated A polymer, the conjugated polymer comprising repeating units of:

. 10. The memory cell according to claim 1, wherein said conduction-promoting compound (110) comprises at least one selected from copper sulfide or silver sulfide, and said low-conductivity layer (112) comprises conjugated A polymer, the public conjugated polymer comprising the following repeating units:

. 11. The memory cell as claimed in claim 1, wherein said conduction-promoting compound (110) comprises at least one selected from copper sulfide or silver sulfide, and said low-conductivity layer (112) comprises the following Conjugated organic polymers with repeating units:

. 12. A method of storing information in a memory cell (104), the memory cell (104) comprising a first electrode (106, 202), a second electrode (108, 204), a The controllable conductive medium (110) between the two electrodes includes a low conductive layer (112) and a passive layer (114). The low conductive layer includes a conjugated organic polymer, a conjugated organometallic compound, a conjugated At least one of conjugated organometallic polymers, buckyballs, carbon nanotubes, low-conductivity chalcogenides, and transition metal oxides, and the passive layer includes a conduction-promoting layer, the method comprising: providing an external stimulus above a threshold to render the controllably conductive medium (110) conductive; and Input write signal. 13. The method of claim 12, wherein said external stimulus comprises at least one of an external electric field and optical radiation. 14. The method of claim 12, wherein after writing, said memory cell includes 2 or more bits of information. 15. The method of claim 12, wherein said passive layer (114) has a Fermi level within about 0.7 electron volts of a valence band of said low-conductivity layer (112). 16. A method of manufacturing a storage unit (104), comprising: providing a first electrode (106); forming a passive layer (114) comprising a conduction-promoting compound on said first electrode; Formed on the passive layer (114) are conjugated organic polymers, conjugated organometallic compounds, conjugated organometallic polymers, buckyballs, carbon nanotubes, low-conductivity chalcogen compounds, and transition metal oxides. The low-conductivity layer (112) of at least one of, wherein the conduction-promoting compound of the passive layer is selected; and A second electrode (108) is provided on said low conductivity layer (112). 17. The method of claim 16, wherein said low-conductivity layer (112) is formed by chemical vapor deposition or spin coating techniques.

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