CN1735158A - General signal processing platform for micro display back projection TV - Google Patents
General signal processing platform for micro display back projection TV Download PDFInfo
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- CN1735158A CN1735158A CNA2004100774738A CN200410077473A CN1735158A CN 1735158 A CN1735158 A CN 1735158A CN A2004100774738 A CNA2004100774738 A CN A2004100774738A CN 200410077473 A CN200410077473 A CN 200410077473A CN 1735158 A CN1735158 A CN 1735158A
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- 238000012544 monitoring process Methods 0.000 description 2
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- GJWAPAVRQYYSTK-UHFFFAOYSA-N [(dimethyl-$l^{3}-silanyl)amino]-dimethylsilicon Chemical group C[Si](C)N[Si](C)C GJWAPAVRQYYSTK-UHFFFAOYSA-N 0.000 description 1
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Abstract
The general signal process platform for micro-display projection TV comprises: analog signal process part composed of picture process for high and medium frequency, video and audio process, and switch selection for all ways AV input signal; and digital signal process part composed of digital decode eliminate intersection unit and extension unit; at least a main high-frequency head to receive outer radio frequency signal, an AV diverter switch connected to the said high-frequency head and all ways signal, and at least a digital decode unit and an opposite voice power amplifier circuit; wherein, the decode unit connects to AV diverter switch and extension unit. This invention uses opposite chips in core members and improves the rate of performance and price.
Description
Technical Field
The invention relates to a circuit device of a television, in particular to a circuit improvement of a general signal processing platform applied to a micro-display rear projection television.
Background
The micro-display rear projection television is more popular with consumers, and the inherent advantages determine the development direction of the rear projection television. However, the signal processing system is the key point of the whole machine, and the general signal processing platform adopted by the existing micro-display rear projection television mostly adopts a large number of IC chips so as to realize more various and gorgeous functions, but the cost is also over high. The price of the existing micro-display rear projection television is obviously higher and exceeds the range which can be borne by common families.
Therefore, the prior art has the defects to be improved and developed.
Disclosure of Invention
The invention aims to provide a universal signal processing platform applied to a micro-display rear projection television, which reduces the using quantity of IC chips, can be widely applied to the micro-display rear projection television, realizes the functions of picture-in-picture, picture-outside-picture and liyin of double tuners, has interfaces of AV input, output, component input, RGB input, DVI input and the like, and really realizes the two-in-one of the television and the display.
The technical scheme of the invention is as follows:
a general signal processing platform applied to a micro-display rear projection television comprises two parts: the analog signal processing part comprises picture high and intermediate frequency processing, picture video and audio processing and switch selection of each path of AV input signals; the digital signal processing part comprises a digital decoding unit, a de-interleaving unit (deinterlacer), an expansion unit (Scaler), a component input, an RGB input, a DVI input and a display output; the radio frequency identification device also comprises at least one main tuner for receiving external radio frequency signals; an AV switch, connecting the main tuner and each video input signal; the digital decoding unit is connected with the AV change-over switch and is electrically connected with the expansion unit through the de-interlacing unit; the extension unit is also connected with and controlled by a storage unit and is connected with the optical machine driving display part through a DVI interface chip and an LVDS interface chip; wherein,
the chip used by the digital decoding unit is internally provided with 6 analog-to-digital converters with 8Bits, 4H adaptive comb filtering and a full-standard color decoder, and is adjustable in chromaticity, brightness, contrast and color saturation, and outputs and supports ITU-R601 and ITU-R656 formats;
the chip used by the de-interlacing unit has a motion self-adaptive de-interlacing mode and an intelligent edge de-interlacing function, and can perform digital color/brightness transient improvement processing;
the expansion unit adopts a chip built-in Turbo X86 CPU which has UART, Timer, I2CBus, GPIO, IR Receiver and ROM/RAM Interface multiple resources, the capability of capturing images can be from VGA to WUXGA, video PAL/NTSC 4: 3 mode and HDTV/SDTV 16: 9 mode are simultaneously supported, the full screen can be linearly or non-linearly expanded, the multiple expansion combinations thereof are combined and connected with software processing to realize PIP/POP, and the expansion unit has the image noise reduction, programmable CSC conversion, Gamma correction, black level adjustment and white peak adjustment image processing technologies.
The processing platform is characterized in that the digital decoding unit adopts a VPC3230 chip, the de-interleaving unit adopts a PW1231 chip, and the expansion unit adopts a PW181 chip.
The processing platform is further provided with a sub-digital decoding unit and a sub-sound power amplifier circuit, and the sub-digital decoding unit and the sub-sound power amplifier circuit are in communication connection between the AV selector switch and the expansion unit.
In the processing platform, the high frequency head of the main sub-channel adopts an AMP82600 chip, and directly outputs VIDEO and AUDIO signals or outputs a second AUDIO intermediate frequency signal for an external special stereo decoding chip.
In the processing platform, the AV switch selects a TA8851CN chip, allowing multiple AV inputs and main subchannel outputs to be freely switched within the input signal.
According to the general signal processing platform applied to the micro-display rear projection television, the digital decoding unit, the de-interlacing unit and the expansion unit which are core components respectively adopt corresponding chips, so that the using quantity of IC chips is reduced, and the cost performance of products is improved.
Drawings
Fig. 1 is a functional block diagram of a circuit of a general signal processing platform for a microdisplay rear projection television according to the present invention.
Detailed Description
The following detailed description of embodiments of the invention is provided in connection with the accompanying drawings.
The general signal processing platform applied to the micro-display rear projection television of the invention is shown in figure 1, and a signal processing circuit of the general signal processing platform mainly comprises two parts: one is an analog signal processing part, and the other is a digital signal processing part. The analog signal part mainly comprises main sub-picture high and intermediate frequency processing, main and sub-picture video and audio processing and switch selection of each path of AV input signals. The digital signal processing part comprises parts of digital decoding of the main sub-channel, a de-interleaving unit (deinterlacer), an expansion unit (Scaler), component input, RGB input, DVI input, display output and the like. Of course, the technical solution of the present invention does not necessarily have to set the main sub-channel and the picture at the same time, and may also set only one channel and picture without picture-in-picture function.
The specific implementation of this part is as follows:
in the general signal processing platform, the high frequency heads of the main channel and the sub-channel both adopt AMP82600 chips, and can directly output video and audio signals and also output a second accompanying sound intermediate frequency signal for an external special stereo decoding chip.
The AV switch adopts a TA8851CN chip, which allows the multi-path AV input and the main subchannel output to be freely switched in the input signal.
The digital decoding part of the invention is completed by a VPC3230 chip, 6 analog-to-digital converters ADC with 8Bits are arranged in the chip, 4H adaptive comb filtering and a full-standard color decoder are arranged in the chip. The chip is adjustable in chroma, brightness, contrast and color saturation, output supports ITU-R601 and ITU-R656 formats, and the chip is conveniently connected with a back-end processing circuit, so that the digital decoding scheme is convenient to use.
The deinterlacer selects a PW1231 chip as a processing scheme IC, the chip has a motion adaptive Deinterlace and intelligent edge Deinterlace function, and can perform digital color/brightness transient improvement (DCTI/DLTI).
The Scale scheme of the expansion unit selects a PW181 chip, a Turbo X86 CPU is arranged in the Scale scheme, and the Scale scheme also has various resources such as UART, Timer, I2C Bus, GPIO, IR Receiver, ROM/RAM Interface and the like, and is flexible and convenient to use. The capability of the IC to capture images can range from VGA to WUXGA while supporting video PAL/NTSC 4: 3 mode and HDTV/SDTV 16: 9 mode, full screen can be processed with linear or non-linear Scale. The flexible software processing combined and jointed by various scales can realize rich PIP/POP, advanced image noise reduction technology, programmable CSC transformation, Gamma correction, black level adjustment, white peak adjustment and other image processing technologies, so that the image display quality is excellent, and the graphical OSD can make the user interface more friendly.
The specific signal processing procedure is described in detail below:
said image (Video) processing circuitry: the high frequency head of the main sub-channel demodulates video signals and all paths of input video signals to be input into an AV switch TA8851CN for switching, and outputs signals of the main sub-channel and a path of monitoring output signals, wherein, the signals of a main picture are sent to a VPC3230D chip of the main channel, A/D conversion, digital comb filtering and color decoding are carried out in the VPC 3232 chip, then the signals are sent to a PW1231 chip for deinterlaced processing, 2: 2 or 3: 2 film mode processing, and then the signals are sent to a V port of a PW181 chip. The sub-picture signals are also sent to a VPC3230D chip of the sub-channel, in which A/D conversion, digital comb filtering, color decoding are carried out, and then sent to a G port of a PW181 chip for Deinterlace processing. The input component signals and RGB signals are switched by a PI5V330 chip and then sent to an MST9883B chip for A/D conversion, and then sent to a G port of the PW181 chip. The input DVI signal is converted into 48-bit digital RGB signal by interface chip SiI1161B and sent to G port of PW 181. Finally, the PW181 performs SCALER expansion processing on each path of input signals, and then sends the signals to the SiI164 to be converted into TMDS signals which are sent to the optical machine through a DVI interface or sent to the DS90C385 to be converted into LVDS signals which are sent to the optical machine, and the signals are processed by a driving circuit of the optical machine and then displayed on a display screen.
The sound (Audio) processing circuit: the main high frequency head outputs a second sound intermediate frequency signal, the signal is sent to an MSP3410G chip for digital decoding, and the decoded audio signal and each path of AV input audio signal are selected to output a sound signal of the main sub-channel and a path of monitoring output signal through a TA8851CN switch. Audio signal switching and WOW sound effect processing are carried out on the main channel sound sent to the MSP3410G and a main tuner; if in the TV state, the sound of the main channel is directly outputted by the MSP3410G without passing through the TA8851CN, and finally sent to the TDA8946J for power amplification. The sub-picture audio signal is selected by a TA8851CN switch, sent to TDA7052B for amplification and finally output by an earphone terminal.
The invention uses less IC to form the general signal processing platform, which can be widely used in micro-display back projection TV, realizes the picture-in-picture, picture-outside-picture and liyin functions of double tuner, has AV input, output, component input, RGB input, DVI input and other interfaces, really realizes the combination of TV and display, and improves the cost performance.
It should be understood that the above description of the preferred embodiments of the present invention is too specific and should not be taken as limiting the scope of the invention, which is defined by the appended claims.
Claims (5)
1. A general signal processing platform applied to a micro-display rear projection television comprises two parts: the analog signal processing part comprises picture high and intermediate frequency processing, picture video and audio processing and switch selection of each path of AV input signals; the digital signal processing part comprises a digital decoding unit, a de-interleaving unit (deinterlacer), an expansion unit (Scaler), a component input, an RGB input, a DVI input and a display output; the radio frequency identification device also comprises at least one main tuner for receiving external radio frequency signals; an AV switch, connecting the main tuner and each video input signal; the digital decoding unit is connected with the AV change-over switch and is electrically connected with the expansion unit through the de-interlacing unit; the extension unit is also connected with and controlled by a storage unit and is connected with the optical machine driving display part through a DVI interface chip and an LVDS interface chip; it is characterized in that the preparation method is characterized in that,
the chip used by the digital decoding unit is internally provided with 6 analog-to-digital converters with 8Bits, 4H adaptive comb filtering and a full-standard color decoder, and is adjustable in chromaticity, brightness, contrast and color saturation, and outputs and supports ITU-R601 and ITU-R656 formats;
the chip used by the de-interlacing unit has a motion self-adaptive de-interlacing mode and an intelligent edge de-interlacing function, and can perform digital color/brightness transient improvement processing;
the expansion unit adopts a chip built-in Turbo X86 CPU which has UART, Timer, I2CBus, GPIO, IR Receiver and ROM/RAM Interface multiple resources, the capability of capturing images can be from VGA to WUXGA, video PAL/NTSC 4: 3 mode and HDTV/SDTV 16: 9 mode are simultaneously supported, the full screen can be linearly or non-linearly expanded, the multiple expansion combinations thereof are combined and connected with software processing to realize PIP/POP, and the expansion unit has the image noise reduction, programmable CSC conversion, Gamma correction, black level adjustment and white peak adjustment image processing technologies.
2. The processing platform of claim 1, wherein the digital decoding unit employs a VPC3230 chip, the de-interleaving unit employs a PW1231 chip, and the expansion unit employs a PW181 chip.
3. The processing platform of claim 2, further comprising a sub-digital decoding unit and a sub-audio power amplifier circuit, communicatively connected between the AV switch and the extension unit.
4. The processing platform of claim 3, wherein the high-frequency tuner of the main sub-channel adopts an AMP82600 chip, and directly outputs VIDEO and AUDIO signals or outputs a second AUDIO intermediate-frequency signal for an external special-purpose Rich AUDIO decoding chip.
5. The processing platform of claim 4, wherein the AV switch is implemented using a TA8851CN chip, allowing multiple AV inputs and main subchannel outputs to be switched freely within the input signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200410077473A CN100576888C (en) | 2004-12-10 | 2004-12-10 | A kind of general signal processing platform that is applied to little demonstration back projection TV |
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| CN200410077473A CN100576888C (en) | 2004-12-10 | 2004-12-10 | A kind of general signal processing platform that is applied to little demonstration back projection TV |
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| CN1735158A true CN1735158A (en) | 2006-02-15 |
| CN100576888C CN100576888C (en) | 2009-12-30 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101783112A (en) * | 2010-03-19 | 2010-07-21 | 四川长虹电器股份有限公司 | LVDS (Low Voltage Differential Signaling) signal acquisition device |
| CN101557478B (en) * | 2008-04-07 | 2012-04-18 | 联咏科技股份有限公司 | video receiver |
| US11942680B2 (en) | 2017-08-01 | 2024-03-26 | Htc Corporation | Antenna structure capable of transmitting a WiGig band and head-mounted wireless transmission display device |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR200158088Y1 (en) * | 1997-03-07 | 1999-10-15 | 윤종용 | Catv that can receive analog and digital signal |
| CN1221128C (en) * | 1998-11-25 | 2005-09-28 | 青岛海信电器股份有限公司 | Television/indicator integral circuit control method |
| CN2377779Y (en) * | 1999-06-23 | 2000-05-10 | 厦门华侨电子企业有限公司 | TV set with digital video broadcasting receiving function |
| CN2494091Y (en) * | 2001-09-03 | 2002-05-29 | 海信集团有限公司 | Liquid crystal back projection television set with VGA indication function |
| KR100446905B1 (en) * | 2002-07-13 | 2004-09-04 | 엘지전자 주식회사 | Picture In Picture Based On 1-Scaler Of Video Display Device |
-
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- 2004-12-10 CN CN200410077473A patent/CN100576888C/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101557478B (en) * | 2008-04-07 | 2012-04-18 | 联咏科技股份有限公司 | video receiver |
| CN101783112A (en) * | 2010-03-19 | 2010-07-21 | 四川长虹电器股份有限公司 | LVDS (Low Voltage Differential Signaling) signal acquisition device |
| US11942680B2 (en) | 2017-08-01 | 2024-03-26 | Htc Corporation | Antenna structure capable of transmitting a WiGig band and head-mounted wireless transmission display device |
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| CN100576888C (en) | 2009-12-30 |
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Granted publication date: 20091230 Termination date: 20131210 |