CN1734708A - Wafer double-sided process method - Google Patents
Wafer double-sided process method Download PDFInfo
- Publication number
- CN1734708A CN1734708A CN 200410056692 CN200410056692A CN1734708A CN 1734708 A CN1734708 A CN 1734708A CN 200410056692 CN200410056692 CN 200410056692 CN 200410056692 A CN200410056692 A CN 200410056692A CN 1734708 A CN1734708 A CN 1734708A
- Authority
- CN
- China
- Prior art keywords
- wafer
- adhesion coating
- thermal separation
- gel band
- technology
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 58
- 238000000926 separation method Methods 0.000 claims abstract description 66
- 239000004065 semiconductor Substances 0.000 claims abstract description 24
- 238000010438 heat treatment Methods 0.000 claims abstract description 13
- 238000005516 engineering process Methods 0.000 claims description 66
- 238000000576 coating method Methods 0.000 claims description 30
- 239000011248 coating agent Substances 0.000 claims description 27
- 229920002120 photoresistant polymer Polymers 0.000 claims description 7
- 239000003292 glue Substances 0.000 claims 1
- 239000002390 adhesive tape Substances 0.000 abstract 2
- 235000012431 wafers Nutrition 0.000 description 82
- 230000000694 effects Effects 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 230000001771 impaired effect Effects 0.000 description 6
- 238000005538 encapsulation Methods 0.000 description 5
- 239000011521 glass Substances 0.000 description 5
- 238000000227 grinding Methods 0.000 description 5
- 239000013078 crystal Substances 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000003960 organic solvent Substances 0.000 description 2
- QGZKDVFQNNGYKY-UHFFFAOYSA-O Ammonium Chemical compound [NH4+] QGZKDVFQNNGYKY-UHFFFAOYSA-O 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000013467 fragmentation Methods 0.000 description 1
- 238000006062 fragmentation reaction Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Landscapes
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Firstly, a wafer is provided, then the back surface of the wafer is fixed on a first supporting carrier by utilizing a first thermal separation adhesive tape, and at least one first semiconductor process is carried out on the front surface of the wafer. Then, a second thermal separation tape is used to fix the front surface of the wafer on a second supporting carrier, and the first thermal separation tape is heated to separate from the back surface of the wafer. And then, carrying out at least one second semiconductor process on the back surface of the wafer, and heating to separate the second thermal separation adhesive tape from the wafer.
Description
Technical field
The present invention relates to a kind of method of wafer double-side technology, particularly relate to a kind of thermal separation gel band fixed wafer that utilizes to carry out the method for double-side technology.
Background technology
Because semiconductor technology progresses greatly day by day and the element integration constantly promotes, therefore semiconductor technology is used in widely in the field of micro electronmechanical (MEMS) technology and develops, to produce various microcomputer electric components, for example little inductor (micro sensor) and micro-actuator (micro actuator) etc., and because of it has than conventional semiconductors element complicated mechanical project organization more, for example therefore the structure of positive and negative perforation or revolute axes configuration often must utilize double-side technology to be made.Yet because double-side technology is not a semiconductor standard processes, on making, can't directly utilizes in the existing machine and carry out, therefore when making, often face many difficulties.For instance; because a little less than often being thin and fragile in order to the wafer of making microcomputer electric component than the conventional semiconductors element; if the mechanism of ammonium fixation and the safeguard measure that do not have to be fit to, very easily cause wafer that fragmentation or slight crack take place in the process of technology and transmission and have a strong impact on the rate of manufacturing a finished product.
Please refer to Fig. 1 and Fig. 2, Fig. 1 and Fig. 2 are the method schematic diagram of an existing two-sided technology.As shown in Figure 1, wafer 10 comprises positive 12 and one back side 14, needs to carry out semiconductor technology at least respectively, and technologies such as for example photoetching, etching or grinding are to form required structure.When the front 12 of wafer 10 being carried out positive technology with formation front pattern 12A, it is fixing that the back side 14 of wafer 10 utilizes the vacuum chuck (chuck) 16 in traditional semiconductor technology machine to be adsorbed, and influences the contraposition accuracy of front pattern 12A to avoid wafer 10 to produce skew in technology.As shown in Figure 2, after front pattern 12A forms, wafer 10 can be overturn, and utilize the back side pattern 14A of the front 12 of vacuum chuck 16 absorption wafers 10 with making wafer 10.Yet as shown in Figure 2 owing to utilize the front 12 of vacuum chuck 16 absorption wafers 10 to use fixed wafer 10 when making the back side pattern 14A of wafer 10, under this situation front pattern 12A be very easy to because of friction or collision impaired.In addition, when in case the element that desire is made has the structure of positive and negative perforation, the adsorption function of vacuum chuck 16 will be weakened even lost efficacy, and then cause the back side pattern 14A contraposition of wafer 10 inaccurate, even cause wafer 10 to break away from vacuum chucks 16 and impaired situation.
Except that above-mentioned method of carrying out double-side technology, prior art also comprises a kind of method that is applied to back segment encapsulation double-side technology.Please refer to Fig. 3 to Fig. 7, Fig. 3 to Fig. 7 is the method schematic diagram of existing back segment encapsulation double-side technology.As shown in Figure 3, at first provide a chip 30, and chip 30 comprises positive 32 and one back side 34.The back side 34 that then utilizes a ultraviolet tape 36 to fit in chip 30 also is fixed in chip 30 on the chase 38 by this.As shown in Figure 4, then utilize the cutter 40 in the cutting machine to carry out the front cutting technique, with cut crystal 30 but do not cut through-wafer 30.
As shown in Figure 5, then with wafer 30 upsets and utilize another ultraviolet tape 42 that the front 32 of wafer 30 is fixed on the chip glass 44.The ultraviolet tape (figure does not show) that utilizes the back side 34 of ultraviolet irradiation wafer 30 again is with separating wafer 30 and chase 38.As shown in Figure 6, utilize in the grinder 46 to carry out a grinding technics then, by the back side 34 grinding wafers 30 of wafer 30, to form required crystal grain (die) 48.As shown in Figure 7, utilize the back side illuminaton ultraviolet tape 42 of ultraviolet ray at last, with separation of glasses wafer 44 and crystal grain 48 by chip glass 44.
But though the method fixed wafer 30 of above-mentioned double-side technology, yet its range of application only limits to back segment encapsulation double-side technology, its reason is that ultraviolet tape can't high temperature resistant and organic solvent, therefore in the leading portion double-side technology if technological temperature is too high or when carrying out wet etching process, will cause ultraviolet tape 42 to produce qualitative changes and can't fixed wafer 30, even influence element.
In addition, also comprise the practice of utilizing a photoresist layer (or a cured layer) to replace ultraviolet tape in the prior art, yet because photic resist layer is adhered on the support pedestal when carrying out back process, therefore organic solvent only can slowly immerse the photoresist layer by the side of photoresist layer, so need expends the above time of a few hours and can remove the photoresist layer, so this practice is not the efficient practice.
Because existing method of carrying out double-side technology can't effectively be protected wafer; and has a restriction that rate of finished products is on the low side or use; a kind ofly can effectively avoid wafer impaired if can develop, and can apply to the method for leading portion and back segment double-side technology, will promote the rate of manufacturing a finished product and range of application in a large number.
Summary of the invention
Therefore main purpose of the present invention is to provide a kind of method of wafer double-side technology, to overcome the insurmountable problem of prior art.
A kind of method of wafer double-side technology is provided according to a preferred embodiment of the invention.At first provide a wafer, and above-mentioned wafer comprises a positive and back side.Then utilize one first thermal separation gel band that the back side of wafer is fixed on one first supporting carrier, and at least one first semiconductor technology is carried out in the front of wafer.Utilize one second thermal separation gel band that the front of wafer is fixed on one second supporting carrier subsequently, and utilize mode of heating that first thermal separation gel band is broken away from the back side of wafer.Then at least one second semiconductor technology is carried out at the back side of wafer, and utilize mode of heating that second thermal separation gel band is broken away from the front of wafer.
Because double-side technology method of the present invention is utilized one first thermal separation gel band and one second the thermal separation gel band front and the back side of fixed wafer respectively, therefore can carry out positive technology in wafer and you can well imagine the effective fixed effect of confession with the back process time-division, simultaneously because first thermal separation gel band has different separation temperatures with second thermal separation gel band, can remove easily wherein one and therefore the unlikely crystallized ability that influences another person can be avoided the impaired and effective raising of the element rate that manufactures a finished product.
In order further to understand feature of the present invention and technology contents, see also following about detailed description of the present invention and accompanying drawing.Yet appended graphic only for reference and aid illustration usefulness are not to be used for to the present invention's limitr in addition.
Description of drawings
Fig. 1 and Fig. 2 are the method schematic diagram of an existing two-sided technology.
Fig. 3 to Fig. 7 is the method schematic diagram of existing back segment encapsulation double-side technology.
Fig. 8 to Figure 12 carries out the method schematic diagram of double-side technology for a preferred embodiment of the present invention.
The simple symbol explanation
10 wafers, 12 fronts
14A back side pattern 16 vacuum chucks
30 wafers, 32 fronts
34A back side pattern 36 ultraviolet tapes
38 chases, 40 cutter
42 ultraviolet tapes, 44 chip glasses
48 crystal grain in 46 grinders
50 wafers, 52 fronts
54A back side pattern 56 first thermal separation gel band
58 first supporting carrier, 60 second thermal separation gel band
62 second supporting carrier
Embodiment
Please refer to Fig. 8 to Figure 12, Fig. 8 to Figure 12 is the schematic diagram of the double-side technology method of one embodiment of the present invention.As shown in Figure 8, at first provide a wafer 50, and wafer 50 comprises positive 52 and one back side 54.Then utilize one first thermal separation gel band 56 that the back side 54 of wafer 50 is fixed on one first supporting carrier 58, and the front 52 of wafer 50 carried out semiconductor technology at least, for example photoetching process, etch process and grinding technics etc. are to form a front pattern 52A on the front 52 of wafer 50.
As shown in Figure 9, after front pattern 52A finishes, then utilize one second thermal separation gel band 60 that the front 52 of wafer 50 is fixed on one second supporting carrier 62.Wherein first supporting carrier 58 and second supporting carrier 62 have the size close with wafer, its role is to support and fixed wafer 50, wafer 50 unlikely generation when carrying out positive technology and back process is offset and has good contraposition effect.Simultaneously first supporting carrier 58 can be used glass, quartz, silicon, pottery or other material that is fit to etc. with second supporting carrier 62, to avoid when carrying out semiconductor technology too high or react with the reactant generation of technology and to influence element because of technological temperature.
As shown in figure 10, after the front 52 of wafer 50 closely is fixed on second supporting carrier 62 by second thermal separation gel band 60, utilize mode of heating to make first thermal separation gel band 56 lose the adhesion effect immediately, and then wafer 50 is separated with first supporting carrier 58.Wherein thermal separation gel band have two-sided adhesion and with the characteristic of semiconductor technology compatibility, thermal separation gel band has good adhesion strength when temperature is lower than its separation temperature, and thermal separation gel band can be lost adhesion strength when temperature arrives its separation temperature.Therefore, the present invention promptly utilizes the characteristic of thermal separation gel band, when carrying out positive technology, use first thermal separation gel band 56 that first supporting carrier 58 is fixed at the back side 54 of wafer 50, and after finishing, positive technology uses second thermal separation gel band 60, the front 52 of wafer 50 is fixed on second supporting carrier 62, after the front 52 for the treatment of wafer 50 closely is fixed on second supporting carrier 62, utilizes mode of heating that the back side 54 of wafer 50 is separated with first supporting carrier 58 again, and carry out back process.Because the separation temperature of first thermal separation gel band 56 is lower than the separation temperature of second thermal separation gel band 60, therefore when temperature is increased to the separation temperature of first thermal separation gel band 56, first thermal separation gel band 56 is promptly lost adhesion strength and wafer 50 is separated with first supporting carrier 58, and this moment is not because temperature reaches the separation temperature of second thermal separation gel band 60 as yet, therefore wafer 50 still is fixed on second supporting carrier 62, therefore can not influence the carrying out of back process.
As shown in figure 11, then semiconductor technology is at least carried out at the back side 54 of wafer 50, as photoetching process, etch process and grinding technics etc., to form required back side pattern 54A.Thus, the front pattern 52A of wafer 50 and back side pattern 54A can form required semiconductor element or the required structure of microcomputer electric component.At last as shown in figure 12, utilize on the separation temperature of mode of heating with temperature increase to the second thermal separation gel band 60, the wafer 50 and second supporting carrier 62 can be finished the step of double-side technology of the present invention.
The foregoing description utilizes first thermal separation gel band 56 and second thermal separation gel band 60, make wafer 50 when carrying out positive technology and back process, have good fixed effect, even particularly wafer 50 is by eating thrown when carrying out back process, second thermal separation gel band 60 still can be brought into play good fixed effect.In addition because first thermal separation gel band 56 is different with the separation temperature of second thermal separation gel band 60, so can remove wherein one and do not influence another person easily, make double-side technology smooth.Yet double-side technology method of the present invention is not limited to utilize two kinds of modes with thermal separation gel band of different separation temperatures to carry out, and the use of other adhesion coating of can arranging in pairs or groups.For instance, when the back side 54 of wafer 50 utilize first thermal separation gel band 56 fixing with the situation of carrying out positive technology under, then can utilize the adhesion coating with different separate modes when carrying out the back process of wafer 50, for example ultraviolet tape, blue film, wax or photoresist etc. fix the front 52 of wafer 50.In like manner, the back side 54 of wafer 50 also can utilize above-mentioned adhesion coating with non-heating separate mode to fix, and the front 52 that utilizes second thermal separation gel band, 60 fixed wafers 50 is to carry out back process.Thus, also can in positive technology and back process, bring into play the effect of effective fixed wafer 50 respectively, simultaneously because the front 52 of wafer 50 utilizes the adhesion coating with different separate modes to be fixed with the back side 54, thus can remove easily wherein an adhesion coating and the unlikely fixed effect that influences another adhesion coating.It should be noted that the material behavior that when selecting different adhesion coatings for use, need consider adhesion coating, avoiding when carrying out semiconductor technology, influencing the crystallized ability of adhesion coating, even cause component wear.
The foregoing description is an example to be applied to the leading portion double-side technology, illustrate that adhesion coating fixed wafer that utilization of the present invention has different separate modes finishes the practice of double-side technology, yet method of the present invention is not limited to the leading portion double-side technology, and also can be applicable in the back segment encapsulation double-side technology, therefore simplify the complexity of double-side technology, and then effectively improved the rate that manufactures a finished product.
Compared to prior art, double-side technology method of the present invention is utilized two the adhesion coatings front and the back side of fixed wafer respectively, therefore can carry out positive technology in wafer and you can well imagine the effective fixed effect of confession with the back process time-division, particularly for wafer with perforation structure, because perforation structure not only causes wafer frangible, and can make and existing utilize the method for vacuum chuck fixed wafer to carry out, even and method of the present invention still can be brought into play good crystallized ability for the wafer with perforation structure.On the other hand, because above-mentioned two adhesion coatings have different separate modes, can remove an adhesion coating wherein easily and therefore the unlikely crystallized ability that influences another adhesion coating effectively improves the rate that manufactures a finished product.Simultaneously for microcomputer electric component, the wafer thickness of its use (usually less than 300 μ m) is often easier to be impaired for approaching than the wafer that the conventional semiconductors element uses, and but therefore double-side technology method delamination wafer of the present invention and supporting carrier can effectively reduce the impaired risk of element.
The above only is the preferred embodiments of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to the covering scope of patent of the present invention.
Claims (12)
1. the method for a wafer double-side technology, it comprises:
Provide a wafer, and this wafer comprises a first surface and a second surface;
Utilize one first thermal separation gel band that this second surface of this wafer is fixed on one first supporting carrier, and this first surface of this wafer is carried out at least one first semiconductor technology;
Utilize one second thermal separation gel band that this first surface of this wafer is fixed on one second supporting carrier, and utilize mode of heating that this first thermal separation gel band is broken away from this second surface of this wafer;
This second surface to this wafer carries out at least one second semiconductor technology; And
Utilize mode of heating that this second thermal separation gel band is broken away from this first surface of this wafer.
2. the method for claim 1, wherein the separation temperature of this first thermal separation gel band is less than the separation temperature of this second thermal separation gel band.
3. the method for claim 1, wherein the technological temperature of this first semiconductor technology is lower than the separation temperature of this first thermal separation gel band.
4. the method for claim 1, wherein the technological temperature of this second semiconductor technology is lower than the separation temperature of this second thermal separation gel band.
5. the method for a wafer double-side technology, it comprises:
Provide a wafer, and this wafer comprises a first surface and a second surface;
Utilize one first adhesion coating that this second surface of this wafer is fixed on one first supporting carrier, and this first surface of this wafer is carried out at least one first semiconductor technology;
Utilize one second adhesion coating that this first surface of this wafer is fixed on one second supporting carrier, this first adhesion coating is broken away from this second surface of this wafer;
This second surface to this wafer carries out at least one second semiconductor technology; And
This second adhesion coating is broken away from this first surface of this wafer;
Wherein this first adhesion coating has different separate modes with this second adhesion coating.
6. method as claimed in claim 5, wherein the separation temperature of this first adhesion coating is lower than the separation temperature of this second adhesion coating.
7. method as claimed in claim 5, wherein this first adhesion coating utilizes mode of heating to separate, and this second adhesion coating utilizes non-mode of heating to separate.
8. method as claimed in claim 5, wherein this first adhesion coating utilizes non-mode of heating to separate, and this second adhesion coating utilizes mode of heating to separate.
9. method as claimed in claim 5, wherein this first adhesion coating is a thermal separation gel band.
10. method as claimed in claim 9, wherein second adhesion coating is selected from any in photoresist, ultraviolet tape, the cured and blue film.
11. method as claimed in claim 5, wherein this second adhesion coating is a thermal separation gel band.
12. method as claimed in claim 11, wherein first adhesion coating is selected from any in photoresist, UV glue, the cured and blue film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410056692 CN1734708A (en) | 2004-08-12 | 2004-08-12 | Wafer double-sided process method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410056692 CN1734708A (en) | 2004-08-12 | 2004-08-12 | Wafer double-sided process method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1734708A true CN1734708A (en) | 2006-02-15 |
Family
ID=36077031
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200410056692 Pending CN1734708A (en) | 2004-08-12 | 2004-08-12 | Wafer double-sided process method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1734708A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109637928A (en) * | 2018-12-05 | 2019-04-16 | 中国电子科技集团公司第十三研究所 | Remove the ancillary equipment and method of crystal column surface indigo plant film |
| CN113421846A (en) * | 2013-12-10 | 2021-09-21 | 应用材料公司 | Method for dicing a wafer or substrate supported by a carrier |
-
2004
- 2004-08-12 CN CN 200410056692 patent/CN1734708A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113421846A (en) * | 2013-12-10 | 2021-09-21 | 应用材料公司 | Method for dicing a wafer or substrate supported by a carrier |
| CN109637928A (en) * | 2018-12-05 | 2019-04-16 | 中国电子科技集团公司第十三研究所 | Remove the ancillary equipment and method of crystal column surface indigo plant film |
| CN109637928B (en) * | 2018-12-05 | 2021-04-06 | 中国电子科技集团公司第十三研究所 | Auxiliary equipment and method for removing blue film on wafer surface |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5583140B2 (en) | Method for preparing flexible substrate assembly and flexible substrate assembly prepared by the method | |
| KR102167321B1 (en) | Releasable substrate on a carrier | |
| TWI509734B (en) | Method for treating brittle materials | |
| WO2002084739A1 (en) | Thin film-device manufacturing method, and semiconductor device | |
| CN107107600B (en) | Set up ultra-small or ultra-thin discrete components for easy assembly | |
| JP6674147B2 (en) | Supporting glass substrate and laminate using the same | |
| JP2006528422A5 (en) | ||
| KR20050092423A (en) | Separating method and method for manufacturing display device using the separating method | |
| JP4384410B2 (en) | Thin film manufacturing method on special substrate and its application | |
| CN106935547B (en) | Method for manufacturing a flexible display device and flexible display device | |
| CN106663640A (en) | Method for providing electronic device and electronic device thereof | |
| KR20160010500A (en) | Glass structures and methods of creating and processing glass structures | |
| WO2006081315A3 (en) | Method of eliminating curl for devices on thin flexible substrates, and devices made thereby | |
| JP2003338474A (en) | Processing of brittle members | |
| JP2004532515A5 (en) | ||
| TWI236058B (en) | Method of performing double side processes upon a wafer | |
| US9580301B2 (en) | MEMS chip and manufacturing method therefor | |
| CN1690820A (en) | Manufacturing method of a device | |
| CN1734708A (en) | Wafer double-sided process method | |
| JP2007129110A5 (en) | ||
| KR102054699B1 (en) | Device for peeling substrate, method for peeling substrate and method for producing electronic device | |
| TWI354325B (en) | ||
| JP2009095962A (en) | Method for manufacturing thin film semiconductor device | |
| JP2005501420A5 (en) | ||
| CN102163542A (en) | Single-chip method for thin-film electronic component and electronic component mounting adhesive thin sheet manufactured via the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |