CN1722419A - Semiconductor device and manufacturing method of the same - Google Patents

Abstract

A packaged semiconductor device and its manufacturing method improve reliability without extremely increasing manufacturing cost. A resin layer (12) and a support (13) are formed on the surface of a semiconductor substrate (10) on which a pad electrode (11) is formed. Next, an opening (15) penetrating the resin layer (12) and the support (13) is formed to expose the pad electrode (11). Then, a metal layer (16) is formed on the pad electrode (11) exposed by the opening (15), and a conductive terminal (17) is further formed. Finally, the semiconductor substrate (10) is divided into semiconductor chips (10c) by dicing. When this semiconductor device is mounted on a circuit substrate not shown, the conductive terminals (17) of the semiconductor chip (10c) are electrically connected to external electrodes of the circuit substrate not shown.

Description

Semiconductor device and manufacturing method thereof

technical field

The present invention relates to a semiconductor device and a manufacturing method thereof, and particularly relates to a packaged semiconductor device and a manufacturing method thereof.

Background technique

In recent years, CSP (Chip Size Package: Chip Size Package) has been attracting attention as a packaged semiconductor device. The CSP refers to a small package having an outer dimension substantially the same as that of a semiconductor chip.

Currently, a BGA (Ball Grid Array: ball grid array) type semiconductor device is known as one of CSPs. In this BGA type semiconductor device, a plurality of ball-shaped conductive terminals made of metal members such as solder are arranged in a grid pattern on one main surface of a package, and are electrically connected to a semiconductor chip mounted on the other surface of the package.

Moreover, when this BGA type semiconductor device is incorporated into an electronic device, by press-fitting each conductive terminal on a wiring pattern on a circuit substrate (such as a printed circuit board), the semiconductor chip and the external circuit board mounted on the circuit substrate The circuit is electrically connected.

Next, as an example of a conventional packaged semiconductor device, a conventional BGA type semiconductor device will be described with reference to the drawings. FIG. 26 is a schematic structure of a conventional BGA semiconductor device, and FIG. 26(A) is a perspective view of the BGA semiconductor device viewed from the front side. In addition, FIG. 26(B) is a perspective view seen from the back side of the BGA type semiconductor device.

This BGA type semiconductor device 101 is constituted by sealing a semiconductor chip 104 between first and second glass substrates 102, 103 with epoxy resins 105a, 105b. Here, electronic devices (not shown) are formed on a surface that is one main surface of the semiconductor chip 104 . In addition, a plurality of conductive terminals 106 are arranged in a grid pattern on one main surface of the second glass substrate 103 , that is, on the back surface of the BGA type semiconductor device 101 . The conductive terminal 106 is connected to the semiconductor chip 104 through the second wiring 110 . The first wiring drawn out from the inside of the semiconductor chip 104 is respectively connected to the plurality of second wirings 110 to electrically connect the respective conductive terminals 106 and the semiconductor chip 104 .

The cross-sectional structure of this BGA type semiconductor device 101 will be described in more detail with reference to FIG. 27 . FIG. 27 shows a cross-sectional view of a BGA type semiconductor device 101 divided into individual chips along dicing lines.

The first wiring 107 is provided on the insulating film 108 arranged on the surface of the semiconductor chip 104 . The semiconductor chip 104 is bonded to the first glass substrate 102 via the resin layer 105a. In addition, the back surface of the semiconductor chip 104 is bonded to the second glass substrate 103 via the resin layer 105b.

Furthermore, one end of the first wiring 107 is connected to the second wiring 110 . The second wiring 110 extends from one end of the first wiring 107 to the surface of the second glass substrate 103 . Furthermore, spherical conductive terminals 106 are formed on the second wiring 110 extending over the second glass substrate 103 .

The technique described above is described in, for example, Patent Document 1 below.

Patent Document 1: Special Publication No. 2002-512436

However, when manufacturing the packaged semiconductor device 101 of the above-mentioned conventional example, there is a problem that the steps included in the manufacturing method are complicated. As a result, there arises a problem that the manufacturing cost increases.

In addition, since the above-mentioned semiconductor device 101 has a complicated structure, sufficient reliability cannot be obtained. For example, since the contact area between the first wiring 107 and the second wiring 110 of the semiconductor device 101 is very small, the second wiring 110 may break at the contact portion. In addition, there is also a problem in the step coverage of the second wiring 110 .

In addition, since the semiconductor device 101 is mounted by connecting the conductive terminals 106 on the rear surface to the circuit substrate in opposition, there arises a problem of inclination or misalignment of the semiconductor device. Therefore, when the unillustrated electronic device is a light-receiving element such as a CCD (Charge Coupled Device: Charge Coupled Device), the above-mentioned inclination or shift causes defocus (ボケ) on an image during imaging.

As a packaged semiconductor device capable of avoiding such an increase in manufacturing cost as described above, a semiconductor device in which a semiconductor chip and a circuit substrate are connected by bonding wires is conventionally known. However, in such a semiconductor device, the surface is exposed without providing a protective layer on the surface. The protective layer is a protective layer that protects the surface of the semiconductor device from physical damage or moisture. In addition, even if dirt spots adhere to the surface of this protective layer, it can be patterned. That is, since such a protective layer is not provided, there arises a problem in the semiconductor device that the reliability of electronic devices (not shown) on the surface is lowered.

Contents of the invention

Therefore, the present invention provides a packaged semiconductor device and a method of manufacturing the same, which can improve reliability without extremely increasing the manufacturing cost, and can extremely suppress the inclination of the semiconductor device.

The semiconductor device of the present invention is developed in view of the above-mentioned problems, and provides a semiconductor device mounted on a circuit substrate on which external electrodes are formed, characterized in that it includes: an electronic device formed on the surface of a semiconductor chip; a first The pad electrode is formed on the surface of the semiconductor chip extending from the electronic device; the support body (or resin layer) is formed on the surface of the semiconductor chip; the first opening penetrates the support body (or resin layer) so that the second A surface of a pad electrode is exposed, wherein the first pad electrode is electrically connected to the external electrode. Here, the support body is formed of any one of a glass substrate, a plastic substrate such as acrylic, or a silicon substrate through which infrared rays pass.

In the semiconductor device of the present invention, in the above configuration, the back side of the semiconductor chip is opposed to the circuit substrate, and the first pad electrode exposed in the first opening is connected to the external electrode by an external connection wiring. .

Or, the semiconductor device of the present invention in the above structure is characterized in that it has a conductive terminal formed on the first pad electrode exposed in the first opening, the surface side of the semiconductor chip is opposed to the circuit substrate, and at the same time, The conductive terminals and the external electrodes are connected by external connection wiring.

Or, in the semiconductor device of the present invention, in the above structure, it is characterized in that it has a conductive terminal formed on the first pad electrode exposed in the first opening, and the surface side of the semiconductor chip is opposed to the circuit substrate, and at the same time, conducts electricity. The terminals and external electrodes are directly connected.

In addition, the semiconductor device of the present invention is characterized in that, on the basis of the above-mentioned structure, it includes: a second pad electrode formed in the surface of the semiconductor chip along the ends of the first and second sides of the semiconductor chip in a predetermined The wiring layer is formed on the surface of the semiconductor chip and connects the first pad electrode and the second pad electrode; the second opening part penetrates the support body (or resin layer) to make the second pad electrode The surface of the pad electrode is exposed; the conductive terminal is formed on the second pad electrode exposed in the second opening. Here, the semiconductor device of the present invention is characterized in that the surface side of the semiconductor chip is opposed to the circuit substrate, and the conductive terminal and the external electrode are directly connected to each other in the above-mentioned structure.

The present invention provides a manufacturing method of a semiconductor device, which is characterized in that it includes: preparing a semiconductor substrate separated by a dicing line and forming a first pad electrode, and bonding a support body (or forming a resin layer) on the surface of the semiconductor substrate. ) process; the process of selectively removing the support body and forming the first opening through the support body to expose the first pad electrode; the process of dividing the semiconductor substrate into semiconductor chips by performing dicing along the dicing line . Here, the support body is formed of any one of a glass substrate, a plastic substrate such as acrylic, or a silicon substrate through which infrared rays pass.

The method for manufacturing a semiconductor device according to the present invention is characterized in that, in the above configuration, before performing the step of dividing the semiconductor substrate into individual semiconductor chips, there is a step of forming a conductive terminal on the first pad electrode exposed in the first opening. process.

In addition, the method for manufacturing a semiconductor device according to the present invention, in the above structure, is characterized by comprising: after preparing the semiconductor substrate on which the first pad electrodes are formed, forming pad electrodes at predetermined intervals near the dicing line along the surface of the semiconductor substrate. The process of separating the second pad electrodes; the process of forming a patterned wiring layer on the surface of the semiconductor substrate to connect the first pad electrodes and the second pad electrodes; by selectively removing the support (or resin film) ), a process of forming a second opening through the support body and exposing the second pad electrode; a process of forming a conductive terminal on the pad electrode exposed from the second opening.

According to the present invention, the surface of the semiconductor device is protected from physical damage or moisture damage by the support body or the resin layer. At the same time, the first pad electrode on the surface of the semiconductor chip and the circuit substrate can be electrically connected through the support body or the first opening provided in the resin layer. Accordingly, the manufacturing process of the semiconductor device is simplified compared to the conventional example. In addition, according to the present invention, since the structure of the semiconductor device is simple, the decrease in reliability that occurs when the structure of the semiconductor device is complicated can be suppressed extremely low. Therefore, in the packaged semiconductor device and its manufacturing method, the reliability of the semiconductor device can be improved without complicating the manufacturing process.

According to the present invention, since the surface of the semiconductor chip is protected by the support made of glass or the like, even if dirt such as dirt adheres to the surface of the support, it can be cleaned. Here, when the electronic device formed on the semiconductor chip is a light-receiving element such as a CCD, even if a minute stain remains on the surface of the support, the image is formed at the focal point due to the optical path difference from the surface to the light-receiving element will not happen. Thus, the yield of semiconductor devices can be improved.

According to the present invention, when the semiconductor device is placed on the circuit substrate so that the back side of the semiconductor chip is opposed to the circuit substrate, the mounting (the mounting formed on the back surface of the semiconductor device) that occurs in the conventional semiconductor device can be eliminated as much as possible. The inclination or deflection of the semiconductor device when the connection of the conductive terminal and the circuit substrate).

When the semiconductor device is mounted on the circuit substrate so that the surface side of the semiconductor chip is opposed to the circuit substrate, the inclination or shift during mounting occurs approximately the same as that of the conventional semiconductor device, but when it is formed on When the electronic device on the semiconductor chip is a light-receiving element such as a CCD, by setting the light-receiving port of the circuit substrate corresponding to the position of the light-receiving element, a deep focus depth can be obtained based on the lens above the light-receiving element. As a result, when the semiconductor device is mounted on a circuit substrate as an imaging module composed of the above-mentioned lens and the like, the thickness of the imaging module can be reduced as much as possible.

According to the present invention, the second pad electrode (mounting pad electrode) electrically connected to the first pad electrode is formed along the end portions of the first and second sides on the surface of the semiconductor chip. The conductive terminal formed through the opening on the second pad electrode can electrically connect the first pad electrode of the semiconductor chip and the circuit substrate. Thus, since the end portion of the semiconductor chip 10c is uniformly held on the circuit substrate, inclination or misalignment when the semiconductor device is mounted on the circuit substrate can be suppressed as little as possible. In addition, the above-mentioned two types of pad electrodes can be used for testing and for mounting, respectively.

Description of drawings

1 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a first embodiment of the present invention;

2 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a first embodiment of the present invention;

3 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a first embodiment of the present invention;

4 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a first embodiment of the present invention;

5 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a first embodiment of the present invention;

6 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a first embodiment of the present invention;

7 is a cross-sectional view illustrating a semiconductor device and a manufacturing method thereof according to a first embodiment of the present invention;

8 is a top view illustrating a semiconductor device according to a first embodiment of the present invention;

Fig. 9 is a sectional view along the line X-X of Fig. 8;

10 is a top view illustrating a semiconductor device according to a first embodiment of the present invention;

Fig. 11 is a sectional view along the Y-Y line of Fig. 10;

12 is a top view illustrating a semiconductor device according to a first embodiment of the present invention;

Fig. 13 is a sectional view along the Z-Z line of Fig. 18;

14 is a top view illustrating a semiconductor device according to a first embodiment of the present invention;

Fig. 15 is a sectional view along the Z-Z line of Fig. 20;

16 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a first embodiment of the present invention;

17 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a first embodiment of the present invention;

18 is a top view illustrating a semiconductor device according to a first embodiment of the present invention;

Fig. 19 is a sectional view along the Z-Z line of Fig. 24;

20 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a second embodiment of the present invention;

21 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a second embodiment of the present invention;

22 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a third embodiment of the present invention;

23 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a third embodiment of the present invention;

24 is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to a second embodiment of the present invention;

25 is a top view illustrating a semiconductor device according to the first, second and third embodiments of the present invention;

26(A) and 26(B) are diagrams illustrating a conventional semiconductor device;

FIG. 27 is a diagram illustrating a conventional semiconductor device.

Detailed ways

Next, a semiconductor device according to a first embodiment of the present invention will be described with reference to the drawings. The manufacturing method of the semiconductor device of this embodiment is performed as follows. 1 to 6 are cross-sectional views illustrating a method of manufacturing a semiconductor device according to this embodiment. In addition, FIG. 7 is a cross-sectional view illustrating the semiconductor device of the present embodiment and its manufacturing method.

1 to 7 show cross-sections of a semiconductor substrate 10 at a predetermined boundary between adjacent chips (that is, near a not-shown dicing line) divided by a dicing step described later. In addition, in FIGS. 1 to 7 , electronic devices not shown are formed on the surface of the semiconductor substrate 10 . Here, the unillustrated electronic device is, for example, a light-receiving element such as a CCD (Charge Coupled Device).

First, as shown in FIG. 1 , a pad electrode 11 is formed on the surface of a semiconductor substrate 10 via an unillustrated interlayer insulating film (for example, made of BPSG or the like). The pad electrode 11 is made of, for example, a metal layer such as aluminum, aluminum alloy, copper, or the like. In addition, an unillustrated passivation film made of a silicon oxide film, a silicon nitride film, or the like is formed on the semiconductor substrate 10 including the pad electrode 11 with a part of the pad electrode 11 exposed.

Then, a resin layer 12 made of, for example, epoxy resin is applied on the surface of the semiconductor substrate 10 including the pad electrodes 11 . Then, a substrate-shaped or tape-shaped support body 13 is bonded to the surface of the semiconductor substrate 10 through the resin layer 12 . The support body 13 has a predetermined thickness. Furthermore, the support body 13 has a function of supporting the semiconductor substrate 10 and protecting the semiconductor substrate 10 .

Here, when the above-mentioned unillustrated electronic device is a light-receiving element such as a CCD, it is necessary to use the unillustrated device on the surface of the semiconductor substrate 10 (chip 10c after the semiconductor device is completed) to receive light from the outside. Therefore, the support body 13 preferably has a transparent or translucent property such as a glass substrate. That is, the support body 13 is preferably formed of an optically transparent or translucent glass substrate, a plastic substrate such as acrylic, or a silicon substrate through which infrared rays pass. Alternatively, as long as the support body 13 has a transparent property, it may be in other substrate shapes or belt shapes. In addition, the resin layer 12 is also the same, and preferably has a transparent or translucent property.

When the unillustrated electronic device is a light receiving element, it is not necessary to use transparent or translucent resin layer 12 and support 13 , and opaque resin layer 12 and support 13 may be used. For example, a substrate-shaped substance or a strip-shaped substance made of an opaque metal or organic substance can also be used as the support body 13 .

In addition, when using an unillustrated electronic device as a light receiving element to perform imaging, even if dirt such as dirt adheres to the surface of the support body 13, the imaging defects caused by the dirt can pass the above-mentioned regulations of the support body 13. The thickness reduces this to a negligible level where it is not a problem.

Next, in the state where the support body 13 is adhered, if necessary, the back surface of the semiconductor substrate 10 is etched, that is, so-called back grinding. Then, an acid (for example, a mixed solution of HF and nitric acid) is used as an etchant to etch the back surface of the semiconductor substrate 10 . Thereby, the mechanically damaged layer of the semiconductor substrate 10 caused by the back grinding is removed, and the characteristics of electronic devices (not shown) formed on the surface of the semiconductor substrate 10 are improved. In this embodiment, the final thickness of the semiconductor substrate 10 is about 130 μm, but it can be appropriately selected according to the type of electronic device not shown.

Next, as shown in FIG. 2 , a resist layer 14 is selectively formed on the surface of the support body 13 . That is, the resist layer 14 has openings at positions corresponding to the pad electrodes 11 .

Next, as shown in FIG. 3 , the support body 13 is selectively removed using the resist layer 14 as a mask. The selective removal of the carrier 13 is preferably carried out, for example, by etching with hydrofluoric acid (HF) as the etching solution. Alternatively, the selective removal of the carrier 13 can also be performed by other wet etching or dry etching. By selectively removing the support body 13 , an opening penetrating through the support body 13 is formed. Here, the resin layer 12 is exposed at the bottom of the opening, and the pad electrode 11 is connected thereto.

Next, as shown in FIG. 4 , the resin layer 12 exposed at the opening of the support body 13 is selectively removed. By selectively removing the resin layer 12 , the opening 15 penetrating the support body 13 and the resin layer 12 is formed. Here, the pad electrode 11 is exposed at the bottom of the opening 15 .

The selective removal of the resin layer 12 is preferably performed, for example, by etching using an organic solvent as an etching solution. Here, the resist layer 14 may be removed when performing the above-mentioned etching, but it may also be used as an etching mask. When the resist layer 14 is used as a mask, the resist layer 14 is removed after etching. Alternatively, selective removal of the resin layer 12 may be performed by other wet etching or dry etching. Alternatively, selective removal of the resin layer 12 may be performed by so-called ashing (ashing) treatment. By selectively removing the resin layer 12 , an opening 15 exposing the pad electrode 11 through the support body 13 and the resin layer 12 is formed.

In addition, the selective removal of the support body 13 and the resin layer 12 corresponding to the positions of the pad electrodes 11 may be performed by one etching. At this time, with respect to the support body 13 and the resin layer 12, the resist layer 14 is used as a mask, and wet etching or dry etching is performed with predetermined etching solution or etching gas.

Next, as shown in FIG. 5 , a metal layer 16 is formed on the pad electrode 11 exposed at the bottom of the opening 15 . The metal layer 16 is preferably formed of nickel (Ni), gold (Au), or a compound thereof. Alternatively, the metal layer 16 may also be formed by other metal layers than those described above.

Next, as shown in FIG. 6 , conductive terminals 17 are formed on the metal layer 16 . Here, the conductive terminals are formed protrudingly from the surface of the support body 13 . Alternatively, the conductive terminals 17 may be formed so as not to protrude from the surface of the support body 13 but to form the same plane as the surface. In addition, the formation of the conductive terminal 17 may also be omitted. In this case, the metal layer 16 is exposed at the opening 15 .

Finally, as shown in FIG. 7 , the semiconductor substrate 10 is divided into semiconductor chips 10 c along unillustrated dicing lines. In this way, the semiconductor device of this embodiment is completed. The completed semiconductor device is mounted on a circuit substrate (not shown) on which external electrodes (not shown) are patterned. At this time, the external electrodes of the circuit board (not shown) are electrically connected to the conductive terminals 17 . When the conductive terminal 17 is not formed, the external electrode (not shown) is electrically connected to the metal layer 16 .

As described above, in the semiconductor device of this embodiment, the surface of the semiconductor chip 10c is protected from physical damage or moisture damage by the support body 13, and at the same time, the solder can be soldered through the opening 15 of the support body 13 penetrating the surface. The pad electrodes 11 are electrically connected to the circuit substrate. Accordingly, the structure and manufacturing process of the semiconductor device are simplified, and reliability can be improved compared to a case where the structure of the semiconductor device is complicated. That is, the reliability of the semiconductor device can be improved without increasing the manufacturing cost.

Next, a case where the semiconductor device of this embodiment is mounted on a circuit substrate will be described with reference to the drawings. FIG. 8 is a top view illustrating the semiconductor device of this embodiment. In addition, FIG. 9 is a cross-sectional view taken along line X-X in FIG. 8 . In FIG. 8 , illustrations other than the circuit board 1A, the semiconductor chip 10c, and components for connecting them are omitted.

As shown in FIG. 8, a semiconductor chip 10c is mounted on a circuit substrate 1A such as a printed circuit board. External electrodes 20 are patterned and formed on circuit substrate 1A. The patterns of the external electrodes are schematically shown in FIGS. 8 and 9 .

In addition, the semiconductor chip 10c is mounted so that the main surface on which the support body 13 is not formed, that is, the back surface, faces the circuit board 1A. In addition, on the surface of the semiconductor chip 1c, an electronic device (not shown) as a light receiving element such as a CCD is formed in the light receiving region 10i. On the other hand, in the surface of the semiconductor chip 10c, in a region other than the light receiving region 10i, the conductive terminals 17 formed in the opening 15 are exposed. Or, when the conductive terminal 17 is not formed, the underlying metal layer 16 is exposed.

Also, the conductive terminals 17 of the semiconductor chip 10c and the external electrodes 20 of the circuit substrate are connected by bonding wires 21, for example. Alternatively, instead of the bonding wire 21 , the conductive terminal 17 and the external electrode 20 of the circuit board may be connected using a flexible board or a tape (not shown) formed by forming a conductive pattern. In addition, when the conductive terminal 17 is not formed, the metal layer 16 and the external electrode 20 of the circuit substrate may be connected by, for example, a bonding wire 21 .

As shown in FIG. 9 , in the circuit substrate 1A, an end barrel portion (lens barrel portion) 30 is provided on the main surface on which the semiconductor chip 10c is placed, that is, the surface covering semiconductor chip 10c. In the end cylinder portion 30 , an opening through which external light can enter is provided at a position corresponding to the light receiving region 10i of the semiconductor chip 10c. A lens 32 for converging external light on the light-receiving region 10 i is provided on the opening through a filter 31 that transmits a specific wavelength. These semiconductor chips 10c, the end tube portion 30, the optical filter 31, the lens 32, and the like constitute a so-called camera module. Here, since the protruding conductive terminals seen in the conventional semiconductor device are not formed on the back side of the semiconductor chip 10c facing the circuit substrate 1A, inclination or misalignment of the semiconductor chip 10c can be eliminated as much as possible. Accordingly, it is possible to avoid as much as possible defocusing of an image captured by an electronic device (not shown) due to the aforementioned inclination or shift.

In addition, in the circuit substrate 1A, a DSP (Digital Signal Processor) for processing image information from a CCD as, for example, an electronic device not shown in the figure may be mounted on the main surface on which the semiconductor chip 10c is not placed, that is, on the back surface. device) chip 40. In this case, the area of the circuit substrate 1A required for mounting the semiconductor chip 10c and the DSP chip 40 can be kept extremely small.

In addition, when mounting the semiconductor device of this embodiment on a circuit substrate, it can also be carried out in the configuration shown in FIGS. 10 and 11 . FIG. 10 is a top view illustrating the semiconductor device of this embodiment. Here, FIG. 10 is a top view of the circuit substrate as seen from the surface, which is the main surface on the side where external light reaches. In addition, FIG. 11 is a sectional view taken along line Y-Y in FIG. 10 . In FIGS. 10 and 11 , the same components as those shown in FIGS. 8 and 9 are denoted by the same reference numerals, and description thereof will be omitted. In addition, in FIG. 10, illustration other than the circuit board 1B, the semiconductor chip 10c, and each component for connecting them is abbreviate|omitted.

As shown in FIG. 10, a light-receiving port 1w as an opening is provided on a circuit substrate 1B such as a printed circuit board. In the circuit board 1B, the external electrode 20 is pattern-formed on the back surface which is the main surface on the side where external light does not reach. The pattern of this external electrode 20 is shown simply in FIG. 10 and FIG. 11 .

Furthermore, a semiconductor chip 10c is mounted on the back surface of the circuit board 1B. The semiconductor chip 10c is placed so that the main surface on which the support body 13 is formed, that is, the front surface, faces the back surface of the circuit board 1B. Here, the conductive terminals 17 of the semiconductor chip 10c and the external electrodes 20 of the circuit substrate 1B are directly connected.

In addition, the semiconductor chip 10c is placed such that its light receiving region 10i is exposed from the light receiving port 1w of the circuit substrate 1B. Thereby, even if the semiconductor chip 10c is placed on the back surface of the circuit substrate 1B, external light can be incident on the light receiving region 10i through the light receiving port 1w.

As shown in FIG. 11 , in the circuit substrate 1B, the main surface on which the semiconductor chip 10c is not placed, that is, the end cylinder portion 30 is provided so as to cover the semiconductor chip 10c. In the end cylinder portion 30 , an opening portion through which external light can enter is provided corresponding to a position on the light receiving region 10i of the semiconductor chip 10c. A lens 12 that condenses external light on the light-receiving region 10 i through a filter 31 that transmits a specific wavelength is provided on the opening.

Here, the focal distance between the lens 32 and the light-receiving region 10i of the semiconductor chip 10c needs to have a predetermined length corresponding to the performance of the lens 32 . Therefore, when the predetermined focal length needs to be increased, the focal length is the reason for increasing the thickness of the imaging module (that is, the height of the end tube portion 30 ) including the lens 32 and the semiconductor chip 10c. In contrast, in the embodiment shown in FIG. 11, since the light passes through the light-receiving port 10w of the circuit substrate 1B and is guided to the light-receiving region 10i of the semiconductor chip 10c, the thickness of the circuit substrate 1B becomes equal to or equal to the above-mentioned prescribed focal distance. part. Accordingly, the thickness of the camera module can be reduced by the thickness of the above-mentioned circuit substrate 1B.

In addition, when mounting the semiconductor device of this embodiment on a circuit substrate, it may be carried out by embedding it in a concave portion formed in the circuit substrate. Next, mounting of the semiconductor device at this time will be described with reference to the drawings. 12, 14 and 18 are top views illustrating the semiconductor device of this embodiment. Fig. 13, Fig. 15 and Fig. 19 are cross-sectional views along the line Z-Z of Fig. 12, Fig. 14 and Fig. 18 respectively. 16 and 17 are cross-sectional views illustrating a method of manufacturing the semiconductor device shown in FIGS. 14 and 15 .

As shown in FIGS. 12 and 13 , for example, a Cu layer 20 m is laminated together with a predetermined resin layer as a metal layer for external electrodes having a predetermined pattern inside the circuit board 1C. In addition, a concave portion H1 having a size that encloses the semiconductor chip 10c and the entire layers stacked thereon is formed on the surface of the circuit board 1C (the side facing the lens 32 ). The formation of the concave portion H1 is not particularly limited, and is performed, for example, by etching the circuit substrate 1C by irradiation with laser light of a predetermined output, or by cutting the circuit substrate 1C by punching.

In addition, as shown in the drawing, a part of the Cu layer 20m may be exposed at the bottom of the concave portion H1, or the resin layer may be exposed. However, the Cu layer 20m at this time is not an external electrode for electrical connection with an electronic device mounted on the circuit board 1C. The Cu layer 20m is not particularly limited, but it is preferably patterned, for example, in an island shape so that it covers the entire plane of the semiconductor chip 10c, and a part of it extends to the edge of the circuit substrate 1C and is exposed on its side.

The semiconductor chip 10c is placed in the concave portion H1 so that the bottom thereof faces the back surface of the semiconductor chip 10c. In addition, when there is a space between the sidewall of the recess H1 and the semiconductor chip 10c, the space is filled with an organic material such as epoxy resin used in the manufacturing process of the semiconductor device, that is, an underfill material (anda-fil) 22 .

Also, the conductive terminals 17 of the semiconductor chip 10c and the external electrodes 20 of the circuit substrate 1C are connected by, for example, bonding wires 21 . In addition, when the conductive terminal 17 is not formed, the metal layer 16 or the pad electrode 11 in the opening 15 and the external electrode 20 may be connected by, for example, a bonding wire 21 .

In this embodiment, as shown in FIGS. 14 and 15 , the pad electrodes 11 of the semiconductor chip 10c placed in the recess H1 and the external electrodes 20 of the circuit substrate 1C may also be formed by making them contain, for example, silver (Ag) particles. The conductive paste 21p is connected to the wiring formed by printing in accordance with a predetermined pattern. At this time, as shown in FIG. 16 , the semiconductor substrate 10 and the layers stacked thereon form the opening 15 and then are separated into a plurality of semiconductor chips 10 c by dicing. As shown in FIG. 17 , the bottom of the recess H1 is opposed to the back surface of the semiconductor chip 10c, and the semiconductor chip 10c is placed on the recess H1 of the circuit board 1C.

Furthermore, when there is a space between the side wall of the recess H1 and the semiconductor chip 10c, the space is filled with an underfill material (anda-fil) 22 . Then, the above-mentioned conductive paste 21p is printed in accordance with a predetermined pattern, electrically connected to the pad electrode 11, and extended from the inside of the opening 15 to the external electrode 20 of the circuit board 1C. The conductive paste 21p is formed with a film thickness of, for example, about 100 μm at positions other than the opening 15 .

Thus, when the semiconductor chip 10c is mounted on the recess H1 of the circuit substrate 1C, the distance between the lens 32 and the light receiving region 10i of the semiconductor chip 10c is longer than when the semiconductor chip 10c is mounted on the surface of the circuit substrate 10 . Thereby, the thickness of the camera module composed of the lens 32 and the semiconductor chip 10c (that is, the height of the end tube portion 30) can be reduced to only the extended distance, that is, at least the thickness of the semiconductor chip 10c.

For example, when the overall thickness of the semiconductor chip 10c and the layers stacked thereon is about 0.85-1mm, and the focal distance between the lens 32 and the light-receiving region 10i of the semiconductor chip 10c is 6-7mm, the thickness of the camera module ( That is, the height of the end cylinder portion 30) is reduced by about one-sixth of the above-mentioned focal length.

In addition, when the Cu layer 20m is exposed at the bottom of the recess H1, by making the Cu layer 20m exposed at the bottom of the recess H1 contact the back surface of the semiconductor chip 10c, the heat generated during the operation of the semiconductor chip 10c is easily transferred to the Cu layer 20m for conduction. , discharged to the outside. As a result, performance degradation of light-receiving elements such as CCDs, which tend to degrade electrical characteristics due to heat, can be suppressed as much as possible.

At this time, the Cu layer 20m and the back surface of the semiconductor chip 10c do not have to be directly connected. For example, an insulating film (not shown) made of a silicon oxide film or a silicon nitride film may be formed on the back surface of the semiconductor chip 10c, and the back surface of the semiconductor chip 10c and the Cu layer 20m may be connected through the insulating film. In addition, when the Cu layer 20m at the bottom of the recess H1 is not exposed, the semiconductor chip 10c may be mounted such that its back surface is in contact with the resin at the bottom of the recess H1.

In addition, as another mounting method, the semiconductor device of this embodiment may be embedded in a recess formed on the back surface of the circuit substrate (that is, the main surface side not facing the lens 32 ) for mounting.

That is, as shown in FIGS. 18 and 19 , for example, a Cu layer 20 m is laminated inside the circuit substrate 1D as a metal layer for external electrodes having a predetermined pattern. In addition, a light-receiving opening 1w, which is an opening having the same or substantially the same width as the light-receiving region 10i of the semiconductor chip 10c, is formed in a part of the circuit substrate 1D. In addition, a concave portion H2 having a size to enclose the semiconductor chip 10c and the entire layers stacked thereon is formed around the light receiving port 1w on the back surface of the circuit board 1D. The Cu layer 20m is exposed at the bottom of the recess H2. The formation of the concave portion H2 is not particularly limited, and it is performed, for example, by etching the circuit board 1D by irradiation with laser light of a predetermined output, or by cutting the circuit board 1D by punching.

Then, the bottom of the recess H2 is opposed to the surface of the semiconductor chip 10c, and the conductive terminal 17 and the Cu layer 20m are connected by a conductive paste (not shown), and the semiconductor chip 10c is placed in the recess H2. When there is a space between the sidewall of the recess H2 and the semiconductor chip 10c, the space is filled with an organic material such as epoxy resin used in the manufacturing process of the semiconductor device, that is, an underfill 22.

Even in this case, the distance between the lens 32 and the light receiving region 10i of the semiconductor chip 10c can be lengthened compared to the case where the semiconductor chip 10c is mounted on the surface of the circuit substrate. Furthermore, compared with the case where the semiconductor chip 10c is mounted on the recess H1 formed on the surface of the circuit substrate 1C, the thickness of the circuit substrate 1D at the bottom of the recess is extended. Thereby, the thickness of the imaging module (that is, the height of the end tube portion 30 ) constituted by the lens 32 and the semiconductor chip 10 c can be reduced by the above-mentioned extended distance.

Next, a semiconductor device according to a second embodiment of the present invention will be described with reference to the drawings. The manufacturing method of the semiconductor device of this embodiment is performed as follows. 20 to 22 are cross-sectional views illustrating a method of manufacturing a semiconductor device according to this embodiment. 20 to 22 show cross-sections of semiconductor substrate 10 at predetermined adjacent chip boundaries (that is, in the vicinity of not-shown dicing lines) divided by a dicing step described later. In addition, in FIGS. 20 to 22 , electronic devices not shown are formed on the surface of the semiconductor substrate 10 . Here, the electronic device not shown is a light receiving element such as a CCD or an electronic device other than the light receiving element.

First, as shown in FIG. 20 , a pad electrode 11 is formed on the surface of a semiconductor substrate 10 through an unshown interlayer insulating film (for example, composed of BPSG or the like). These semiconductor substrate 10 and pad electrodes 11 have the same structures as those of the semiconductor substrate 10 and pad electrodes 11 of the first embodiment. In addition, a passivation film (not shown) made of a silicon oxide film or a silicon nitride film is formed on the semiconductor substrate 10 including the pad electrode 11 with a part of the pad electrode 11 exposed.

Then, a resin layer 52 made of, for example, epoxy resin is formed on the surface of the semiconductor substrate 10 including the pad electrodes 11 . Furthermore, the resin layer 52 has a function of supporting the semiconductor substrate 10 and protecting the semiconductor substrate 10 .

Here, when the above-mentioned unillustrated electronic device is a light-receiving element such as a CCD, the resin layer 52 is preferably made of a transparent or translucent material, and its thickness is preferably formed, for example, on the order of 20 μm to 30 μm.

Then, if necessary, the back surface of the semiconductor substrate 10 is ground, and further, the back surface of the semiconductor substrate 10 is etched using an acid (for example, a mixed solution of HF and nitric acid) as an etchant. Thereby, the mechanically damaged layer of the semiconductor substrate 10 caused by the back grinding is removed, and the characteristics of electronic devices (not shown) formed on the surface of the semiconductor substrate 10 are improved.

Next, as shown in FIG. 21 , a resist layer 54 is selectively formed on the surface of the resin layer 52 . That is, the resist layer 54 is formed to have openings at positions corresponding to the pad electrodes 11 .

Next, as shown in FIG. 22, the selective removal of the resin layer 52 is performed. The selective removal of the resin layer 52 is preferably performed, for example, by dry etching or wet etching. Here, the resist layer 54 is used as an etching mask when performing the above etching, but may be removed. When the resist layer 54 is used as a mask, the resist layer 54 is removed after etching. By performing selective removal of the resin layer 52, the opening 55 penetrating the resin layer 52 is formed. Here, the pad electrode 11 is exposed at the bottom of the opening 55 .

Then, although not shown in the figure, the same metal layer 16 as that in the first embodiment is formed on the pad electrode 11 exposed by the opening 55 . In addition, the same conductive terminals 17 as those in the first embodiment can also be formed on the metal layer 16 .

Finally, the semiconductor substrate 10 is divided into semiconductor chips 10c along unillustrated dicing lines. In this way, the semiconductor device of this embodiment is completed. The completed semiconductor device is mounted on a circuit substrate (not shown) on which external electrodes (not shown) are patterned. The method of this installation is the same as that of the first embodiment. However, when an unillustrated electronic device formed on the surface of the semiconductor chip 10c is not a light receiving element, unlike the circuit substrate 1B of the first embodiment, it is not necessary to provide the light receiving port 1w on the circuit substrate.

As described above, in the semiconductor device of this embodiment, the pad electrode 11 and the circuit substrate can be electrically connected through the opening 55 penetrating the resin layer 52 on the surface. Accordingly, the structure and manufacturing process of the semiconductor device can be simplified, and the reliability can be improved compared with the case where the structure of the semiconductor device is complicated. That is, the reliability of the semiconductor device can be improved without increasing the manufacturing cost.

Next, a semiconductor device according to a third embodiment of the present invention will be described with reference to the drawings. The manufacturing method of the semiconductor device of this embodiment is performed as follows, for example. 23 and 24 are cross-sectional views illustrating a method of manufacturing the semiconductor device of this embodiment. 23 and 24 show cross-sections of semiconductor substrate 10 at predetermined adjacent chip boundaries (that is, in the vicinity of dicing lines not shown) divided by a dicing step described later. In addition, in FIGS. 23 and 24 , electronic devices not shown are formed on the surface of the semiconductor substrate 10 . Here, electronic devices not shown are electronic devices other than light-receiving elements such as CCDs.

First, as shown in FIG. 23 , pad electrodes 11 are formed on the surface of semiconductor substrate 10 through an interlayer insulating film (for example, BPSG, etc.) not shown. These semiconductor substrate 10 and pad electrodes 11 have the same structures as those of the semiconductor substrate 10 and pad electrodes 11 of the first embodiment. In addition, an unillustrated passivation film made of a silicon oxide film, a silicon nitride film, or the like is formed on the semiconductor substrate 10 including the pad electrode 11 with a part of the pad electrode 11 exposed.

Then, a photosensitive resist layer 62 made of a photosensitive material is formed on the surface of the semiconductor substrate 10 including the pad electrode 11 . The photosensitive resist layer 62 has a function of supporting the semiconductor substrate 10 and protecting the semiconductor substrate 10 .

Then, if necessary, the back surface of the semiconductor substrate 10 is ground, and further, the back surface of the semiconductor substrate 10 is etched using an acid (for example, a mixed solution of HF and nitric acid) as an etchant.

Next, as shown in FIG. 24 , openings 65 are formed locally in the photosensitive resist layer 62 by exposure and development using a mask. The opening 65 is formed at a position corresponding to the pad electrode 11 in the photosensitive resist layer 62 . The pad electrode 11 is exposed at the bottom of the opening 65 .

Then, although not shown in the figure, the same metal layer 16 as that in the first embodiment is formed on the pad electrode 11 exposed by the opening 55 . In addition, the same conductive terminals 17 as those in the first embodiment may also be formed on the metal layer 16 . Finally, the semiconductor substrate 10 is divided into semiconductor chips 10c along unillustrated dicing lines. In this way, the semiconductor device of this embodiment is completed. The completed semiconductor device is mounted on a circuit substrate (not shown) on which external electrodes (not shown) are patterned. The method of this installation is the same as that of the first embodiment. However, unlike the circuit substrate 1B of the first embodiment, it is not necessary to provide the light receiving port 1w on the circuit substrate.

As described above, in the semiconductor device of this embodiment, the pad electrode 11 and the circuit substrate can be electrically connected through the opening 55 penetrating the photoresist layer 62 on the surface. Accordingly, the structure and manufacturing process of the semiconductor device can be simplified, and the reliability can be improved compared with the case where the structure of the semiconductor device is complicated. That is, the reliability of the semiconductor device can be improved without increasing the manufacturing cost.

In addition, in the manufacturing method of the semiconductor device of the above-mentioned first, second and third embodiments, in the step of forming the pad electrode, as shown in the upper view of FIG. Two kinds of pad electrodes are formed. In addition, in FIG. 25, only the surface of the semiconductor chip 10c in the completed semiconductor device is shown. The manufacturing method of the semiconductor device at this time is performed as follows, for example. That is, not shown in the figure, but on the surface of the semiconductor substrate 10, as shown in the above-mentioned embodiment, for example, the pad electrode 11 is formed as the first pad electrode, and in addition, a mounting pad electrode 11 is formed along an unshown dicing line. The pad electrode 18 is used as the second pad electrode. The mounting pad electrodes 18 are preferably formed at predetermined intervals along the vicinity of the dicing line on the surface of the semiconductor substrate 10 .

Next, a wiring layer 19 for electrically connecting the pad electrodes 11 and the mounting pad electrodes 18 is formed on the surface of the semiconductor substrate 10 . The wiring layer 19 is patterned so as to connect the pad electrodes 11 and the mounting pad electrodes 18 .

Next, by selectively removing the resin layer 52 or the photosensitive resist layer 62, the first openings exposing the pad electrodes 11 (that is, the openings 15, 55, 65) are formed. Simultaneously (or in another process), by selectively removing the support body 13, the resin layer 52, and the photosensitive resist layer 62, a second opening (not shown) exposing the mounting pad electrode 18 is formed. Then, a conductive terminal (not shown) is formed on the mounting pad electrode 18 exposed in the second opening. At the same time, an unshown conductive terminal may also be formed on the pad electrode 11 as needed. Finally, the semiconductor substrate 10 is divided into semiconductor chips 10c to complete the semiconductor device. At this time, the mounting pad electrodes 18 are formed on the surface of the semiconductor chip 10c at the ends along the first and second sides.

In addition, when the semiconductor device is mounted on a circuit substrate not shown, the conductive terminal not shown formed on the mounting pad electrode 18 (that is, the second pad electrode) is connected to the external electrode of the circuit substrate. connect. On the other hand, the pad electrode 11 (that is, the first pad electrode) or the conductive terminal 17 formed on the electrode may not be connected to the external electrodes of the circuit substrate, but may be used as a test electrode when performing various tests of the semiconductor device. use.

At this time, the pad electrodes 11 and the circuit substrate can be electrically connected through the openings (that is, the second openings) on the support body 13 , the resin layer 52 , and the photosensitive resist layer 62 mounted on the pad electrodes 18 . Thus, since the end portions along the first and second sides of the semiconductor chip 10c are held uniformly on the circuit substrate, inclination and misalignment occurring when mounting the semiconductor device on the circuit substrate can be suppressed extremely low. In addition, the above-mentioned two types of pad electrodes can be used for testing and for mounting, respectively.

Accordingly, the structure and manufacturing method of the semiconductor device are simplified, and the reliability of the semiconductor device can be improved without increasing the manufacturing cost of the semiconductor device.

Claims (34)

1. A semiconductor device mounted on a circuit substrate on which external electrodes are formed, comprising: an electronic device formed on a surface of a semiconductor chip; a first pad electrode extended from the electronic device on the surface of the semiconductor chip; a support body, which is formed on the surface of the semiconductor chip; a first opening, which penetrates the support body, exposing the surface of the first pad electrode, and the first pad electrode electrically connected to the external electrodes. 2. The semiconductor device according to claim 1, wherein the support body is formed of any one of a glass substrate, a plastic substrate such as acrylic, or a silicon substrate through which infrared rays pass. 3. A semiconductor device mounted on a circuit substrate on which external electrodes are formed, comprising: an electronic device formed on a surface of a semiconductor chip; a first pad electrode formed extending from the electronic device on the surface of the semiconductor chip; a resin layer formed on the surface of the semiconductor chip including the electronic device and the first pad electrode; a first opening penetrating through the resin layer so that the The surface of the first pad electrode is exposed, and the first pad electrode is electrically connected to the external electrode. 4. The semiconductor device according to claim 3, wherein the resin layer is made of a photosensitive resin. 5. The semiconductor device according to any one of claims 1, 2, 3, and 4, wherein the back side of the semiconductor chip faces the circuit substrate, and the first opening The exposed first pad electrode and the external electrode are connected by an external connection wiring. 6. The semiconductor device according to any one of claims 1, 2, 3, and 4, characterized in that it has a conductive terminal formed on the first pad electrode exposed in the first opening, and the semiconductor device The back side of the chip is opposed to the circuit substrate, and the conductive terminals and the external electrodes are connected by external connection wiring. 7. The semiconductor device according to any one of claims 1, 2, 3, and 4, characterized in that it has a conductive terminal formed on the first pad electrode exposed from the first opening, and the semiconductor device The back side of the chip is opposed to the circuit substrate, while the conductive terminals and the external electrodes are directly connected. 8. The semiconductor device according to claim 1 or claim 2, characterized in that it comprises: a second pad electrode, in the surface of the semiconductor chip, along the first and second sides of the semiconductor chip The ends are formed at predetermined intervals; a wiring layer is formed on the surface of the semiconductor chip and connects the first pad electrode and the second pad electrode; a second opening penetrates through the The support body exposes the surface of the second pad electrode; and the conductive terminal is formed on the second pad electrode exposed in the second opening. 9. The semiconductor device according to claim 3 or claim 4, characterized in that it comprises: a second pad electrode in the surface of the semiconductor chip along the first and second sides of the semiconductor chip The ends of each are formed at predetermined intervals; a wiring layer is formed on the surface of the semiconductor chip and connects the first pad electrode and the second pad electrode; a second opening penetrates through the The resin exposes a surface of the second pad electrode; and a conductive terminal is formed on the second pad electrode exposed in the second opening. 10. The semiconductor device according to claim 8, wherein the surface side of the semiconductor chip is opposed to the circuit substrate, and the conductive terminal and the external electrode are directly connected. 11. The semiconductor device according to claim 9, wherein the surface side of the semiconductor chip is opposed to the circuit substrate, and the conductive terminal and the external electrode are directly connected. 12. A semiconductor device, which is placed on a circuit substrate having external electrodes and a concave portion, and is embedded in the concave portion, characterized in that it comprises: an electronic device formed on the surface of a semiconductor chip; a first pad electrode , which extends from the electronic device and is formed on the surface of the semiconductor chip; a support body, which is formed on the surface of the semiconductor chip; a first opening, which penetrates the support body, so that the first pad electrode The surface is exposed, and electrically connects the first pad electrode and the external electrode. 13. The semiconductor device according to claim 12, wherein the support body is formed of any one of a glass substrate, a plastic substrate such as acrylic, or a silicon substrate through which infrared rays pass. 14. A semiconductor device, which is mounted on a circuit substrate having external electrodes and a concave portion, and is embedded in the concave portion, characterized in that it comprises: an electronic device formed on the surface of a semiconductor chip; a first pad electrode extending from the electronic device and formed on the surface of the semiconductor chip; a resin layer formed on the surface of the semiconductor chip including the electronic device and the first pad electrode; a first opening, It penetrates through the resin layer, exposes the surface of the first pad electrode, and electrically connects the first pad electrode and the external electrode. 15. The semiconductor device according to claim 14, wherein the resin layer is made of a photosensitive resin. 16. The semiconductor device according to any one of claims 12, 13, 14, and 15, wherein the back side of the semiconductor chip is opposed to the end of the concave portion of the circuit substrate, and at the same time, The first pad electrode exposed in the first opening is connected to the external electrode by an external connection wire. 17. The semiconductor device according to any one of claims 12, 13, 14, and 15, characterized in that it has a conductive terminal formed on the first pad electrode exposed in the first opening, and the semiconductor device The back side of the chip is opposed to the bottom of the concave portion of the circuit substrate, and the conductive terminal and the external electrode are connected by an external connection wiring. 18. The semiconductor device according to claim 16, wherein a predetermined organic material is filled between the side wall of the recess and the semiconductor chip, and the external connection wiring is printed with conductive paste and the The pad electrode is electrically connected and formed to extend from inside the first opening to the external electrode of the circuit substrate. 19. The semiconductor device according to any one of claims 12, 13, 14, and 15, wherein a metal layer with a predetermined pattern is formed inside the circuit substrate, and the metal layer is formed on the bottom of the concave portion. A part of the layer is exposed, and a conductive terminal is formed on the first pad electrode exposed in the first opening, and the surface side of the semiconductor chip is opposed to the bottom of the concave portion of the circuit substrate. The terminal and the metal layer are directly connected. 20. The semiconductor device according to claim 12 or claim 13, characterized in that it comprises: a second pad electrode in the surface of the semiconductor chip along the first and second sides of the semiconductor chip The ends are formed at predetermined intervals; a wiring layer, which is formed on the surface of the semiconductor chip, connects the first pad electrode and the second pad electrode; a second opening, which penetrates the The support body exposes the surface of the second pad electrode; and the conductive terminal is formed on the second pad electrode exposed in the second opening. 21. The semiconductor device according to claim 14 or claim 15, characterized in that it comprises: a second pad electrode in the surface of the semiconductor chip along the first and second sides of the semiconductor chip The ends of each are formed at predetermined intervals; the wiring layer is formed on the surface of the semiconductor chip and connects the first pad electrode and the second pad electrode; the second opening penetrates through the The resin layer exposes the surface of the second pad electrode; and a conductive terminal is formed on the second pad electrode exposed in the second opening. 22. The semiconductor device according to claim 20, wherein a metal layer in a predetermined pattern is formed on the circuit substrate, a part of the metal layer is exposed at the bottom of the concave portion, and the surface side of the semiconductor chip is exposed. Opposite to the bottom of the concave portion of the circuit substrate, while the conductive terminal and the metal layer are directly connected. 23. The semiconductor device according to claim 21, wherein a metal layer of a predetermined pattern is formed inside the circuit substrate, a part of the metal layer is exposed at the bottom of the concave portion, and the surface of the semiconductor chip The side is opposite to the bottom of the recess of the circuit substrate, and the conductive terminal and the metal layer are directly connected. 24. A method for manufacturing a semiconductor device, comprising preparing a semiconductor substrate separated by dicing lines and forming first pad electrodes, and comprising the step of: bonding a support to the surface of the semiconductor substrate. Step: selectively removing the support body and forming a first opening through the support body to expose the first pad electrode; dividing the semiconductor substrate by cutting along the cut line The process of forming each semiconductor chip. 25. The method of manufacturing a semiconductor device according to claim 24, wherein the support is formed of any one of a glass substrate, a plastic substrate such as acrylic, or a silicon substrate through which infrared rays pass. 26. A method of manufacturing a semiconductor device, characterized in that preparing a semiconductor substrate separated by a dicing line and forming a first pad electrode, and comprising the following steps: A step of forming a resin layer on the surface of the substrate; a step of selectively removing the resin layer to form a first opening through the resin layer to expose the first pad electrode; Dicing is a process of dividing the semiconductor substrate into individual semiconductor chips. 27. The method of manufacturing a semiconductor device according to claim 26, wherein the resin layer is made of a photosensitive resin. 28. The method of manufacturing a semiconductor device according to any one of claims 24, 25, 26, and 27, wherein before the step of dividing the semiconductor substrate into individual semiconductor chips, there is a A step of forming a conductive terminal on the first pad electrode exposed by an opening. 29. The method of manufacturing a semiconductor device according to claim 24 or claim 25, characterized by comprising: after preparing the semiconductor substrate on which the first pad electrode is formed, forming all the pad electrodes along the surface of the semiconductor substrate. A step of separating the second pad electrodes at predetermined intervals near the dicing line; forming a patterned wiring layer connecting the second pad electrodes and the first pad electrodes on the surface of the semiconductor chip Step; a step of selectively removing the support body to form a second opening that penetrates the support body and exposes the second pad electrode; the second pad electrode exposed at the second opening The process of forming conductive terminals on it. 30. The method of manufacturing a semiconductor device according to claim 26 or claim 27, characterized by comprising: after preparing the semiconductor substrate on which the first pad electrode is formed, forming all the pad electrodes along the surface of the semiconductor substrate. A step of separating the second pad electrodes at predetermined intervals near the dicing line; forming a patterned wiring layer connecting the second pad electrodes and the first pad electrodes on the surface of the semiconductor chip A step of selectively removing the resin layer to form a second opening through the resin layer to expose the second pad electrode; the second pad electrode exposed in the second opening The process of forming conductive terminals on it. 31. The method of manufacturing a semiconductor device according to any one of claims 24, 25, 26, and 27, wherein a circuit substrate having a concave portion is prepared, and the semiconductor chip is embedded in the concave portion for mounting. 32. The method of manufacturing a semiconductor device according to claim 28, wherein a circuit substrate having a concave portion is prepared, and the semiconductor chip is embedded in the concave portion for mounting. 33. The method of manufacturing a semiconductor device according to claim 29, wherein a circuit substrate having a concave portion is prepared, and the semiconductor chip is embedded in the concave portion for mounting. 34. The method of manufacturing a semiconductor device according to claim 30, wherein a circuit substrate having a concave portion is prepared, and the semiconductor chip is embedded in the concave portion for mounting.

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