CN1707961B - Zero intermediate frequency radio receiver second-order inter-modulation automatic correcting circuit - Google Patents

Abstract

The invention discloses an automatic calibration circuit for the second-order intermodulation performance of a zero-IF wireless receiver. The carrier wave with the frequency f _LO is input into the mixer and the input end of the calibration signal generator respectively as a local oscillator signal, and the calibration signal generator outputs frequency is

The calibration signal is input to the balance unit, which is converted into a differential signal by the balance unit and input to the RF input terminal of the mixer, and the DC deviation signal is generated by mixing and input to the analog-to-digital conversion circuit to convert into a digital signal and enter the digital calibration circuit. The circuit selects the corresponding control level to adjust the mixer according to the magnitude of the DC deviation signal so that the DC deviation signal reaches the lowest value. The invention can effectively suppress the intermodulation interference caused by the even-order nonlinearity, avoid the signal receiving blockage and the increase of the bit error rate caused by the even-order nonlinearity, and ensure the normal operation of the system. Can be used in radio frequency direct conversion transceivers.

Description

Zero-IF wireless receiver second-order intermodulation automatic calibration circuit

technical field

The invention relates to a radio frequency receiver, in particular to an automatic calibration circuit for second-order intermodulation performance of a zero-IF wireless receiver.

Background technique

The traditional radio frequency receiver adopts superheterodyne structure, and its circuit structure is shown in Figure 1. It uses two frequency conversions to convert the RF signal to the high-frequency and then to the baseband, and uses an off-chip high-quality factor filter between the modules, so it has the advantages of high sensitivity and good selectivity. Obviously, in the superheterodyne structure, the intermodulation products generated by the even-order nonlinearity are filtered out by the off-chip filter and the coupling capacitor between the modules, and will not interfere with the intermediate frequency signal. However, due to off-chip filters and a large number of external components, the system integration level is difficult to improve, and multiple oscillators are required, and the power consumption is also high.

With the advancement of technology and the improvement of system integration requirements, there are more and more researches and designs on zero-IF wireless receivers. Fig. 2 is a block diagram of an existing zero-IF wireless receiver. It uses a frequency conversion to convert the radio frequency signal directly to the baseband. Compared with the superheterodyne structure, it has obvious advantages such as low power consumption and high integration. However, the DC offset caused by even-order nonlinearity and the self-mixing caused by carrier leakage will directly interfere with the zero-IF signal. Intermodulation products generated by even-order nonlinearities fall within the signal frequency band and cannot be filtered out by capacitors or filters.

The use of differential circuits can effectively suppress even-order nonlinear products, but the asymmetry of the circuit and the deviation of the process are unavoidable. The resulting DC deviation and second-order intermodulation products will cause signal reception blockage and increase the bit error rate, and even make the system can not work normally. Therefore, a calibration circuit that can detect even-order nonlinear products and improve second-order intermodulation performance through automatic adjustment is needed.

Contents of the invention

The technical problem solved by the present invention is to provide an automatic calibration circuit for a zero-IF wireless receiver, which can effectively suppress intermodulation interference generated by even-order nonlinearity, avoid receiving signal blocking and bit error rate increase caused by intermodulation interference, and ensure The system works normally.

In order to solve the problems of the technologies described above, the zero-IF wireless receiver second-order intermodulation automatic calibration circuit of the present invention includes a mixer and a calibration signal generator, and the frequency is that the carrier wave of f _LO is input into the mixer and the calibration signal as a local oscillator signal respectively to generate The input terminal of the generator, the output frequency of the calibration signal generator is The calibration signal is input to the balance unit, which is converted into a differential signal by the balance unit and input to the RF input terminal of the mixer, and then mixed by the mixer to generate a DC deviation, and the DC deviation signal is input into the analog-to-digital converter and converted into a digital signal into the A digital calibration circuit, the digital calibration circuit selects the corresponding control level to adjust the mixer according to the magnitude of the DC deviation signal to make the DC deviation signal reach the lowest value; the calibration signal generator and the transmission of the calibration signal need to be started by the calibration enable signal.

The invention detects the DC deviation caused by even-order nonlinearity, and sends it to the digital calibration circuit through analog-to-digital conversion. The digital calibration circuit searches for a group of optimal control levels to adjust the mixer according to the magnitude of the DC deviation, reducing even-order nonlinearity. The intermodulation interference generated linearly makes the second-order intermodulation performance of the zero-IF wireless receiver optimal.

Description of drawings

Below in conjunction with accompanying drawing and specific embodiment the present invention is described in further detail:

Fig. 1 is a block diagram of a traditional superheterodyne radio frequency receiver;

Fig. 2 is a block diagram of an existing zero-IF wireless receiver;

Fig. 3 is the automatic calibration circuit block diagram of zero-IF wireless receiver of the present invention;

Fig. 4 is a block diagram of the calibration signal generator in Fig. 3;

Fig. 5 is a block diagram of a traditional Gigapot mixer;

FIG. 6 is a block diagram of a Gigapot mixer with added bias current and load adjustable arrays according to the present invention.

Detailed ways

的校准信号，经过平衡单元2转换为差分信号进入到吉波特混频器4的射频输入端。频率为的校准信号由于混频器的非线性会产生的偶次谐波。由于电路布局的不对称和器件的失配，偶次谐波无法抵消，其中，二次谐波分量最大，且与载波频率相同，两者混频产生直流偏差。产生的直流偏差通过模数转换器5进入数字校准电路6。该数字校准电路6根据直流偏差的大小结合某种算法迅速找到一组最佳控制电平调节吉波特混频器使直流偏差达到最低值。校准信号发生器和校准信号的传输由校准使能信号启动。Fig. 3 is a block diagram of the automatic calibration circuit of the zero-IF wireless receiver of the present invention. After the zero-IF wireless receiver calibration function is started, the low-noise amplifier 1 does not work under the control of the calibration enable signal, and the calibration signal generator 3, the balance unit (BALUN) 2, the Gigapot mixer 4, and the analog-to-digital conversion The automatic calibration circuit composed of device 5 and digital calibration circuit 6 works. The required local oscillator signal of Gigapot mixer 4 is the carrier frequency of f _LO =f _RF , and this carrier is input to calibration signal generator 3, and the frequency component produced is

The calibration signal is converted into a differential signal by the balance unit 2 and enters the radio frequency input terminal of the Gigapot mixer 4 . frequency is The calibration signal due to the nonlinearity of the mixer will produce even harmonics of . Due to the asymmetry of the circuit layout and the mismatch of the components, the even-order harmonics cannot be offset. Among them, the second-order harmonic component is the largest and is the same as the carrier frequency, and the mixing of the two produces a DC deviation. The generated DC deviation enters the digital calibration circuit 6 through the analog-to-digital converter 5 . The digital calibration circuit 6 quickly finds a group of optimal control levels and adjusts the Gigapot mixer according to the magnitude of the DC deviation in combination with an algorithm to make the DC deviation reach the lowest value. The calibration signal generator and the transmission of the calibration signal are initiated by the calibration enable signal.

的校准信号分量应足够大，而频率为f_RF的射频信号分量应尽量低。此外，校准不工作时，应保证低噪声放大器1正常工作。图4是图3所示的自动校准电路中校准信号发生器3电路框图，它由高速二分频器8和包含谐振网络的差分转单端电路9构成。频率为f_LO＝f_RF的本振信号即载波经过二分频器8产生多谐波分量的差分信号，其中以频率为分量为主，通过差分转单端电路9后，差分信号转换为单端信号，同时频率为

的分量即校准信号被放大，而频率为f_RF的分量被抑制。图3所示的零中频无线接收机也可采用谐波混频器。采用谐波混频器时本振信号与校准信号都是频率为 $f_{\mathrm{LO}}=\frac{1}{2}{f}_{\mathrm{RF}}$ 的载波。同时，图4所示的校准信号发生器只需要包含谐振网络的差分转单端电路9，无需高速二分频器8。In order to effectively detect the even-order nonlinear products, after the calibration is started, at the input of the balance unit 2, the frequency is

The calibration signal component of the frequency should be large enough, and the radio frequency signal component of frequency f _RF should be as low as possible. In addition, when the calibration is not working, it should be ensured that the low noise amplifier 1 is working normally. Fig. 4 is a circuit block diagram of the calibration signal generator 3 in the automatic calibration circuit shown in Fig. 3, which is composed of a high-speed frequency divider 8 and a differential-to-single-ended circuit 9 including a resonant network. The frequency is the local oscillator signal of f _LO =f _RF , that is, the carrier wave passes through the two-frequency divider 8 to generate a differential signal of multi-harmonic components, wherein the frequency is The component is the main component. After passing through the differential to single-ended circuit 9, the differential signal is converted into a single-ended signal, and the frequency is

The component of , the calibration signal, is amplified, while the component at frequency f _RF is suppressed. The zero-IF wireless receiver shown in Figure 3 can also use harmonic mixers. When a harmonic mixer is used, both the local oscillator signal and the calibration signal have a frequency of $f_{\mathrm{LO}}=\frac{1}{2}{f}_{\mathrm{RF}}$ carrier. Meanwhile, the calibration signal generator shown in FIG. 4 only needs a differential-to-single-ended circuit 9 including a resonant network, and does not need a high-speed frequency divider 8 by two.

Figure 5 is a circuit diagram of a traditional Gigapot mixer, which consists of RF drive stages M1-M2, local oscillator switch stages M3-M6, load output stages R1-R2 and bias circuits. The mixer 4 in FIG. 3 is based on the present invention in FIG. 5 , adding an output load and an adjustable array of bias currents, and its circuit is shown in FIG. 6 . The output load adjustable array is the parallel connection of several groups of load output stages of the Gigapot mixer, and the circuits connected in series by the loads R1 ~ R6 and the control switches S1 ~ S6, the bias current adjustable array is in the bias circuit Several groups of circuits in which the bias currents Iref1-Iref6 are connected in series with the control switches S7-S12 are connected in parallel. The control terminals of the control switches S1 - S6 of the load adjustable array and the control switches S7 - S12 of the bias current adjustable array are controlled by a set of levels generated by the digital calibration circuit 6 in FIG. 3 . The digital calibration circuit 6 uses a certain algorithm to search for a set of control levels that make the DC deviation reach the lowest value, and the calibration ends. And the bias current and output load adjustable array is also applicable to the harmonic mixer. Vout+ in Figure 5 and 6 is the positive terminal of the mixing frequency output, Vout- is the negative terminal of the mixing frequency output, VLO+ is the positive terminal of the local oscillator input, VLO- is the negative terminal of the local oscillator input, VB+ is the positive terminal of the bias voltage, VB- is the negative terminal of the bias voltage, Vrf+ is the positive terminal of the RF input, Vrf- is the negative terminal of the RF input, and lref is the bias current.

Claims (6)

1. the automatic calibration circuit of a kind of zero-IF wireless receiver, it comprises mixer, is characterized in that: also comprises calibration signal generator, the carrier wave that frequency is f _LO inputs mixer and calibration signal generation respectively as local oscillator signal The input terminal of the generator, the output frequency of the calibration signal generator is The calibration signal is input to the balance unit, which is converted into a differential signal by the balance unit and input to the RF input terminal of the mixer, and mixed by the mixer to generate a DC deviation signal, which is input to the analog-to-digital converter and converted into a digital signal Enter the digital calibration circuit, the digital calibration circuit selects the corresponding control level to adjust the mixer according to the magnitude of the DC deviation signal so that the DC deviation signal reaches the lowest value; the start of the calibration signal generator, the calibration signal generator and the balance unit Calibration signal transmission is controlled by the calibration enable signal. 2. the automatic calibration circuit of zero-IF wireless receiver as claimed in claim 1, is characterized in that: described mixer is gigapot mixer, and the frequency f of local oscillator signal when adopting gigapot mixer _LO is equal to the frequency f _RF of the radio frequency signal, f _LO =f _RF . 3. the automatic calibration circuit of zero-IF wireless receiver as claimed in claim 2, it is characterized in that: described calibration signal generator is made of high-speed two frequency dividers and the difference that comprises resonant network and turns to single-ended circuit, and frequency is f _LO = f The local oscillator signal of _RF passes through a two-frequency divider to generate a differential signal of multi-harmonic components, and then converts the differential signal into a single-ended signal through a differential-to-single-ended circuit, and the frequency is

The component of is amplified, while the component of frequency f _RF is suppressed. 4. the automatic calibration circuit of zero intermediate frequency wireless receiver as claimed in claim 1 is characterized in that: described mixer is a harmonic mixer, and when adopting harmonic mixer, local oscillator signal frequency

. 5. The automatic calibration circuit of the zero-IF wireless receiver according to claim 1 or 4, characterized in that: the calibration signal generator is composed of a differential-to-single-ended circuit including a resonant network. 6. The automatic calibration circuit of the zero-IF wireless receiver as claimed in claim 2 or 4, characterized in that: the Gigapot mixer or harmonic mixer can also access bias current and output load can be Adjustable array, the output load adjustable array is a Gigapot mixer or harmonic mixer load output stage in parallel with several groups of circuits connected in series by the load and control switch, the bias current adjustable array is in the bias Several groups of circuits connected in series by bias current and control switches are connected in parallel in the setting circuit, and the control switches of the load adjustable array and the control switches of the bias current adjustable array are controlled by a group of levels generated by the digital calibration circuit.

Images