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CN1787171A - Method for Improving Capacitance Performance of Metal-Dielectric-Metal Structure - Google Patents

Method for Improving Capacitance Performance of Metal-Dielectric-Metal Structure Download PDF

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CN1787171A
CN1787171A CN 200410009984 CN200410009984A CN1787171A CN 1787171 A CN1787171 A CN 1787171A CN 200410009984 CN200410009984 CN 200410009984 CN 200410009984 A CN200410009984 A CN 200410009984A CN 1787171 A CN1787171 A CN 1787171A
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metal
dielectric
layer
titanium
gold
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陈晓娟
和致经
刘新宇
刘键
吴德馨
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Institute of Microelectronics of CAS
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Abstract

The invention relates to the technical field of semiconductor devices, in particular to a method for improving the quality of a metal-dielectric-metal (MIM) capacitor in a semiconductor passive element manufacturing process. The method comprises the following steps: step 1: photoetching and forming a capacitor lower plate pattern on a substrate; step 2: sequentially evaporating titanium/gold/titanium to form a lower capacitor plate; and step 3: depositing a dielectric layer; and 4, step 4: manufacturing an air bridge; and 5: and photoetching the upper electrode plate pattern, and forming the upper electrode plate by adopting an electroplating method. The method has the advantages of simple process, low cost and good repeatability, and the characteristics of the obtained capacitor device are greatly improved compared with the traditional process.

Description

提高金属-介质-金属结构电容性能的方法Methods for Improving Capacitive Performance of Metal-Dielectric-Metal Structures

技术领域technical field

本发明涉及半导体器件技术领域,是关于一种应用于半导体无源元件制作工艺中改善金属-介质-金属(MIM)电容质量的多层金属极板的方法,是在完成中国科学院重大创新项目微波器件与电路过程中形成的新的工艺方法。The invention relates to the technical field of semiconductor devices, and relates to a method for improving the quality of metal-medium-metal (MIM) capacitors in the manufacturing process of semiconductor passive components. New process methods formed in the process of devices and circuits.

背景技术Background technique

在微波单片集成电路(MMIC)中,大量无源器件将和有源器件集成在同一芯片上,这是微波单片集成电路(MMIC)有别于传统集成电路的重要标志之一。在微波单片集成电路(MMIC)设计中,无源器件常应用于匹配网络,直流偏置网络,相位变换以及滤波器等多种子电路中,而作为无源器件中的电容的质量将直接影响着整个微波单片集成电路(MMIC)的可靠性。在微波领域中,电容多采用覆盖电容即金属-介质-金属结构,这种结构的单位面积电容值大,能有效缩小芯片面积,在微波单片集成电路(MMIC)中广泛应用于低阻抗匹配电路、旁路和隔直电路。In Microwave Monolithic Integrated Circuit (MMIC), a large number of passive devices and active devices will be integrated on the same chip, which is one of the important signs that Microwave Monolithic Integrated Circuit (MMIC) is different from traditional integrated circuits. In microwave monolithic integrated circuit (MMIC) design, passive devices are often used in various sub-circuits such as matching networks, DC bias networks, phase conversion and filters, and the quality of capacitors in passive devices will directly affect It affects the reliability of the entire microwave monolithic integrated circuit (MMIC). In the microwave field, capacitors mostly use covered capacitors, that is, metal-dielectric-metal structures. This structure has a large capacitance per unit area and can effectively reduce the chip area. It is widely used in low-impedance matching in microwave monolithic integrated circuits (MMICs). circuit, bypass and DC blocking circuit.

目前国内工艺流程中,制作金属-介质-金属电容的的主要工艺流程如下:In the current domestic process flow, the main process flow for making metal-dielectric-metal capacitors is as follows:

1.涂胶,光刻出下极板。1. Glue coating, photolithography out of the lower plate.

2.蒸发下极板金属金。2. Evaporate the lower plate metal gold.

3.采用等离子增强化学气相沉积法(PECVD)生长介质层。3. The dielectric layer is grown by plasma enhanced chemical vapor deposition (PECVD).

4.涂胶,光刻出开孔的地方,利用干法/湿法去处孔处的介质层。4. Apply glue, photolithographically cut out the openings, and use dry/wet methods to remove the dielectric layer at the holes.

5.涂胶,光刻出桥面。5. Apply glue and photo-etch the bridge deck.

6.溅射起镀层。6. Coating by sputtering.

7.涂胶,光刻出上极板。7. Glue coating, photolithography out of the upper plate.

8.电镀完成空气桥和上极板制作。8. Electroplating completes the air bridge and the upper plate.

9.去除起镀层。9. Remove the plating layer.

然而,这种方法中有一些缺陷:首先在下极板金属金之上,直接淀积介质层,由于金和介质的黏附性不好,影响了金属下极板的表面状况,介质直接淀积在这样的表面上会影响介质层的生长,从而降低介质的致密性,降低介质层的质量,致使电容的漏电较大,品质因数Q值降低,击穿电压不高。其次,人们为了提高电容的质量,一般使用改善介质层的方法,例如加厚介质层,使用不同的淀积方法,但是对加厚介质层会降低单位电容值,增大芯片面积,采用不同的淀积介质方法会大大提高芯片制作成本,增加工艺复杂度。However, there are some defects in this method: first, a dielectric layer is directly deposited on the metal gold of the lower plate, because the adhesion between the gold and the dielectric is not good, which affects the surface condition of the metal lower plate, and the dielectric is directly deposited on the lower plate. Such a surface will affect the growth of the dielectric layer, thereby reducing the compactness of the dielectric, reducing the quality of the dielectric layer, resulting in a large leakage of the capacitor, a decrease in the quality factor Q value, and a low breakdown voltage. Secondly, in order to improve the quality of capacitance, people generally use methods to improve the dielectric layer, such as thickening the dielectric layer and using different deposition methods, but thickening the dielectric layer will reduce the unit capacitance value and increase the chip area. The method of depositing a dielectric will greatly increase the chip manufacturing cost and increase the complexity of the process.

发明内容Contents of the invention

本发明提出一种新的制作电容金属下极板的方法,主要目的是:1.改善电容介质层和金属下极板的黏附性;2.优化电容下极板表面状况,提高电容介质层的生长质量;3.提高金属-介质-金属电容直流及微波特性等一系列的问题。The present invention proposes a new method for making the lower metal plate of a capacitor, the main purpose of which is: 1. improve the adhesion of the capacitor dielectric layer and the lower metal plate; Growth quality; 3. Improve a series of problems such as metal-dielectric-metal capacitance DC and microwave characteristics.

为达到上述目的,本发明的技术解决方案是提供一种提高金属-介质-金属结构电容性能的方法,应用于半导体无源器件的金属-介质-金属(MIM)覆盖电容制作工艺中,包括如下步骤(如图10):In order to achieve the above object, the technical solution of the present invention is to provide a method for improving the capacitance performance of the metal-dielectric-metal structure, which is applied in the metal-dielectric-metal (MIM) covering capacitance manufacturing process of semiconductor passive devices, including the following Steps (as shown in Figure 10):

步骤1:在基板上,光刻形成电容下极板图形;Step 1: On the substrate, photolithography forms the lower plate pattern of the capacitor;

步骤2:依次蒸发钛/金/钛形成电容下极板;Step 2: Evaporate titanium/gold/titanium in sequence to form the lower plate of the capacitor;

步骤3:淀积介质层;Step 3: depositing a dielectric layer;

步骤4:制作空气桥;Step 4: Make the air bridge;

步骤5:光刻上极板图形,采用电镀方法形成上极板。Step 5: Photolithographically engraving the pattern of the upper plate, and forming the upper plate by electroplating.

所述的提高金属-介质-金属结构电容性能的方法,其所述基板为氮化铝基板。In the method for improving the capacitance performance of the metal-dielectric-metal structure, the substrate is an aluminum nitride substrate.

所述的提高金属-介质-金属结构电容性能的方法,其所述依次蒸发钛/金/钛,其中,钛层厚≤200,金层厚≤1μm。The method for improving the capacitance performance of the metal-dielectric-metal structure includes sequentially evaporating titanium/gold/titanium, wherein the thickness of the titanium layer is ≤200 Å, and the thickness of the gold layer is ≤1 μm.

所述的提高金属-介质-金属结构电容性能的方法,其所述淀积介质层,是用等离子增强化学气相沉积法生长介质层,介质层为氮化硅层,厚≤3000。In the method for improving the capacitance performance of the metal-medium-metal structure, the deposition of the dielectric layer is to grow the dielectric layer by plasma enhanced chemical vapor deposition, and the dielectric layer is a silicon nitride layer with a thickness of ≤3000 Å.

所述的提高金属-介质-金属结构电容性能的方法,其所述上极板为单层或双层;单层时,为金层,双层时,下层为钛层,上层为金层。In the method for improving the capacitive performance of a metal-dielectric-metal structure, the upper plate is a single layer or a double layer; in the case of a single layer, it is a gold layer; in the case of a double layer, the lower layer is a titanium layer, and the upper layer is a gold layer.

本发明采用多层金属制作电容下极板,在蒸发下极板时,采用钛/金/钛多层结构,然后再淀积介质层,以此达到改善介质与金属的黏附性,优化金属下极板的表面状况,从而有利于介质层的生长,提高金属-介质-金属结构电容微波及直流性能的目的。The invention uses multi-layer metal to make the lower plate of the capacitor. When evaporating the lower plate, a titanium/gold/titanium multi-layer structure is used, and then a dielectric layer is deposited to improve the adhesion between the medium and the metal and optimize the metal lower plate. The surface condition of the plate is conducive to the growth of the dielectric layer, and the purpose of improving the microwave and DC performance of the metal-dielectric-metal structure capacitance.

本发明用多层金属制作下极板的方法,通过改善下极板金属的制作方法有效的提高了下极板金属和介质的黏附性,同时优化了下极板的表面状况,更有利于介质层的生长,从而有效提高了介质的质量,使得电容在耐高压,减小漏电流,品质因数Q值方面得到了很大的改善,该发明的工艺方法简单,成本低,重复性很好,得到的电容器件的特性较之传统工艺有很大提高。The method for making the lower pole plate with multi-layer metal in the present invention effectively improves the adhesion between the metal of the lower pole plate and the medium by improving the manufacturing method of the metal of the lower pole plate, and at the same time optimizes the surface condition of the lower pole plate, which is more conducive to the medium The growth of the layer, thus effectively improving the quality of the medium, makes the capacitor greatly improved in terms of high voltage resistance, reduced leakage current, and Q value of the quality factor. The process method of the invention is simple, low in cost, and good in repeatability. The characteristics of the obtained capacitor device are greatly improved compared with the traditional process.

附图说明Description of drawings

图1:本发明金属-介质-金属电容的俯视示意图;Figure 1: a schematic top view of the metal-dielectric-metal capacitor of the present invention;

图2:传统工艺制作的金属-介质-金属电容器件剖面图;Figure 2: Cross-sectional view of a metal-dielectric-metal capacitor made by a traditional process;

图3:为图1中本发明金属-介质-金属电容A向的剖面图;Fig. 3: is the cross-sectional view of the metal-dielectric-metal capacitor A of the present invention in Fig. 1;

图4:200×200μm2电容直流漏电比较;Figure 4: DC leakage comparison of 200×200μm 2 capacitors;

图5:本发明工艺制作的金属-介质-金属电容测试图;Fig. 5: the metal-dielectric-metal capacitance test chart that the inventive process makes;

图6:传统工艺制作的金属-介质-金属电容测试图;Figure 6: Metal-dielectric-metal capacitance test diagram made by traditional technology;

图7:本发明工艺制作的金属-介质-金属电容品质因数Q值测试图;Fig. 7: the metal-dielectric-metal capacitance quality factor Q value test chart that the inventive process makes;

图8:本发明工艺制作的金属-介质-金属电容品质因数Q值测试图;Fig. 8: the metal-dielectric-metal capacitance quality factor Q value test chart that the process of the present invention makes;

图9:本发明工艺制作的金属-介质-金属电容顶视图(光学照片);Fig. 9: the top view (optical photo) of the metal-dielectric-metal capacitor made by the process of the present invention;

图10:本发明金属-介质-金属电容的工艺流程图。Fig. 10: Process flow diagram of the metal-dielectric-metal capacitor of the present invention.

具体实施方式Detailed ways

请见图1、图3、图10。图1为本发明金属-介质-金属电容的俯视示意图,图3为图1中本发明金属-介质-金属电容A向的剖面图,图10为本发明金属-介质-金属电容工艺流程图。由图3所示,本发明金属-介质-金属电容的结构是:在基板1表面上,依次固接钛层2、金层8、钛层2,该三层构成下极板3。下极板3中心区域上表面的钛层2上固接介质层4,在介质层4和中间金层8的周圆区域上表面固接起镀层5,起镀层5上表面固接上级板6,上级板6为金属材料制作。金属-介质-金属电容的右端设有空气桥7。See Figure 1, Figure 3, and Figure 10. Figure 1 is a schematic top view of the metal-dielectric-metal capacitor of the present invention, Figure 3 is a cross-sectional view of the metal-dielectric-metal capacitor of the present invention in Figure 1, and Figure 10 is a process flow chart of the metal-dielectric-metal capacitor of the present invention. As shown in FIG. 3 , the structure of the metal-dielectric-metal capacitor of the present invention is: on the surface of the substrate 1 , a titanium layer 2 , a gold layer 8 , and a titanium layer 2 are fixed in sequence, and the three layers constitute the lower plate 3 . The dielectric layer 4 is affixed to the titanium layer 2 on the upper surface of the central area of the lower plate 3, and the plating layer 5 is affixed to the upper surface of the peripheral area of the dielectric layer 4 and the middle gold layer 8, and the upper surface of the plating layer 5 is affixed to the upper plate 6 , The upper board 6 is made of metal material. The right end of the metal-dielectric-metal capacitor is provided with an air bridge 7 .

本发明可以应用于任何基板上金属-介质-金属(MIM)结构电容的制作,现结合制作工艺流程对本发明做以下详细描述,如图10所示:The present invention can be applied to the production of metal-medium-metal (MIM) structure capacitors on any substrate, and the present invention is described in detail below in conjunction with the production process, as shown in Figure 10:

1.制作下极板,由于我们采用的是氮化铝基板,平整度在±150,基板与下极板金属的黏附性需要考虑,这个问题同样存在于其他基板上。下极板与即将淀积的介质层之间的黏附性也需要考虑,同时,由于介质直接淀积在下极板表面之上,良好的表面状况是优质生长介质的保障,基于这三点,试验选用了钛层2/金层8/钛层2(200/1μm/200)多层金属结构蒸发形成金属-介质-金属电容的下极板3。1. To make the lower plate, since we use an aluminum nitride substrate with a flatness of ±150 Å, the adhesion between the substrate and the metal of the lower plate needs to be considered. This problem also exists on other substrates. The adhesion between the lower plate and the dielectric layer to be deposited also needs to be considered. At the same time, since the medium is directly deposited on the surface of the lower plate, a good surface condition is the guarantee of a high-quality growth medium. Based on these three points, the test A multilayer metal structure of titanium layer 2/gold layer 8/titanium layer 2 (200 Å/1 μm/200 Å) was selected to form the lower plate 3 of the metal-dielectric-metal capacitor by evaporation.

2.淀积介质层采用等离子增强化学气相沉积法(PECVD)生长介质层4,介质层4为氮化硅(Si3N4)3000。介质生长在新结构的电容金属下极板3之上,由于表面状况的优化,介质的致密性得以提高。2. Deposition of dielectric layer The dielectric layer 4 is grown by plasma enhanced chemical vapor deposition (PECVD), and the dielectric layer 4 is silicon nitride (Si 3 N 4 ) with a thickness of 3000 Å. The medium is grown on the capacitor metal lower plate 3 of the new structure, and the compactness of the medium is improved due to the optimization of the surface condition.

3.光刻桥面7,溅射起镀层5金属。3. The bridge surface 7 is photolithography, and the metal coating 5 is sputtered.

4.制作上极板6,上极板6金属也是与介质层4紧密相连,这里选用钛/金作为上极板6金属,改善电容上极板6与介质的黏附性。4. Make the upper pole plate 6, and the metal of the upper pole plate 6 is also closely connected with the dielectric layer 4. Here, titanium/gold is used as the metal of the upper pole plate 6 to improve the adhesion between the upper pole plate 6 and the medium of the capacitor.

5.测试分析如表1所示:5. Test analysis is shown in Table 1:

       表1:不同工艺下微波测试结果对比表   新工艺测试结果   传统工艺测试结果  电容值   3.1皮法(pF)(4GHz)   3.6皮法(pF)(4GHz)  品质因数Q值   41(6GHz)   12(6GHz)  介电常数   6.692(4GHz)   6.16(4GHz) Table 1: Comparison table of microwave test results under different processes New Process Test Results Traditional craft test results Capacitance 3.1 picofarad (pF) (4GHz) 3.6 picofarads (pF) (4GHz) Quality factor Q value 41(6GHz) 12(6GHz) Dielectric constant 6.692(4GHz) 6.16(4GHz)

从直流测试图4中可以看出,采用本发明新工艺的金属-介质-金属电容较之传统工艺在相同电压下漏电流下降了一个数量级,大大提高了器件的耐压性能,品质因数Q值也在整个频段(0.1GHz-15.1GHz)都有明显的提升,表1列出了电容性能的各个参数对比,如图7、8所示,6GHz下,本发明新工艺的电容品质因数Q值仍然有41,而传统工艺的片子下降到了12。从图5、6中可以读出电容值,本发明新工艺的采用使得电容值从3.6pF下降到3.1pF,但是图5中也显示,新工艺的片子谐振频率提高到14GHz,这样更有利于器件在微波领域中的应用,同时介电常数也从6.16上升为6.69,说明介质的致密性更好,质量更高。As can be seen from the DC test figure 4, the metal-dielectric-metal capacitor adopting the new process of the present invention has an order of magnitude lower leakage current at the same voltage than the traditional process, greatly improving the withstand voltage performance of the device, and the Q value of the quality factor Also there is obvious promotion in the whole frequency band (0.1GHz-15.1GHz), table 1 has listed the comparison of each parameter of capacitance performance, as shown in Figure 7, 8, under 6GHz, the capacitance quality factor Q value of the new technology of the present invention There are still 41, while the traditional craft pieces are down to 12. Can read capacitance value from Fig. 5, 6, the adopting of new technology of the present invention makes capacitance value drop to 3.1pF from 3.6pF, but also shows in Fig. 5, the sheet resonant frequency of new technology is raised to 14GHz, is more conducive to like this The application of the device in the microwave field also increases the dielectric constant from 6.16 to 6.69, indicating that the density of the medium is better and the quality is higher.

图9为本发明工艺制作的金属-介质-金属电容光学照片。Fig. 9 is an optical photo of the metal-dielectric-metal capacitor produced by the process of the present invention.

Claims (5)

1. a method that improves metal-dielectric-metal structure capacitive property is applied to it is characterized in that in metal-dielectric-metal covering electric capacity manufacture craft of semiconductor passive device, comprises the steps:
Step 1: on substrate, photoetching forms electric capacity bottom crown figure;
Step 2: evaporate titanium/gold/titanium successively and form the electric capacity bottom crown;
Step 3: dielectric layer deposited;
Step 4: make air bridges;
Step 5: photoetching top crown figure, adopt electro-plating method to form top crown.
2. the method for raising metal-dielectric according to claim 1-metal structure capacitive property is characterized in that described substrate is an aluminium nitride substrate.
3. the method for raising metal-dielectric according to claim 1-metal structure capacitive property is characterized in that, the described titanium/gold/titanium that evaporates successively, and wherein, titanium layer is thick≤200 , golden bed thickness≤1 μ m.
4. the method for raising metal-dielectric according to claim 1-metal structure capacitive property is characterized in that, described dielectric layer deposited is that dielectric layer is silicon nitride layer, and is thick≤3000 with plasma reinforced chemical vapour deposition method somatomedin layer.
5. the method for raising metal-dielectric according to claim 1-metal structure capacitive property is characterized in that described top crown is individual layer or bilayer; During individual layer, be the gold layer, when double-deck, lower floor is a titanium layer, and the upper strata is the gold layer.
CN 200410009984 2004-12-09 2004-12-09 Method for Improving Capacitance Performance of Metal-Dielectric-Metal Structure Pending CN1787171A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011097783A1 (en) * 2010-02-10 2011-08-18 中国科学院微电子研究所 Capacitor structure and method for producing the same
CN103928301A (en) * 2014-04-18 2014-07-16 中国科学院微电子研究所 A method for manufacturing a metal-dielectric-metal structure capacitor
CN105845669A (en) * 2016-03-24 2016-08-10 杭州立昂东芯微电子有限公司 MIM capacitor based on gallium arsenide device and manufacturing process thereof
CN106024379A (en) * 2016-05-12 2016-10-12 中国电子科技集团公司第四十研究所 Beam lead capacitor processing method

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011097783A1 (en) * 2010-02-10 2011-08-18 中国科学院微电子研究所 Capacitor structure and method for producing the same
US8610248B2 (en) 2010-02-10 2013-12-17 Institute of Microelectronics, Chinese Academy of Sciences Capacitor structure and method of manufacture
CN103928301A (en) * 2014-04-18 2014-07-16 中国科学院微电子研究所 A method for manufacturing a metal-dielectric-metal structure capacitor
CN105845669A (en) * 2016-03-24 2016-08-10 杭州立昂东芯微电子有限公司 MIM capacitor based on gallium arsenide device and manufacturing process thereof
CN105845669B (en) * 2016-03-24 2018-06-12 杭州立昂东芯微电子有限公司 A kind of MIM capacitor and its manufacturing process based on GaAs device
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