CN1783525A - Semiconductor element and method for manufacturing semiconductor element - Google Patents

Abstract

The present invention provides a technology that can improve the manufacturability of semiconductor devices using a gallium nitride substrate (GaN substrate) while forming a nitride-based semiconductor layer with excellent flatness and crystallinity on the GaN substrate. A gallium nitride substrate (10) is prepared, wherein the upper surface (10a) has an offset angle θ of greater than or equal to 0.1° and less than or equal to 1.0° relative to the (0001) plane in the <1-100> direction. Furthermore, a plurality of nitride-based semiconductor layers including an n-type semiconductor layer (11) are stacked on the upper surface (10a) of the GaN substrate (10), thereby forming a semiconductor device such as a semiconductor laser.

Description

Semiconductor element and method for manufacturing semiconductor element

                      

The present invention relates to a semiconductor element having a nitride-based semiconductor layer on a gallium nitride (GaN) substrate and a manufacturing method thereof.

Background technique

Nitride-based semiconductors such as gallium nitride have been used or studied as light-emitting elements and other electronic devices, and blue light-emitting diodes and green light-emitting diodes have been put into practical use due to their characteristics. In addition, using nitride-based semiconductors, blue-violet semiconductor lasers are being developed as next-generation high-density optical disk light sources.

Conventionally, when manufacturing a light-emitting device using a nitride-based semiconductor, a sapphire substrate has been mainly used as a substrate. However, the lattice mismatch ratio between the sapphire substrate and the nitride-based semiconductor formed thereon is very large at about 13%, and defects such as dislocations exist in a high density in the nitride-based semiconductor, making it difficult to obtain high-quality nitride class of semiconductors.

In addition, in recent years, gallium nitride substrates (hereinafter referred to as "GaN substrates") with a low defect density are being developed, and research and development related to the utilization method of GaN substrates is flourishing. It has been proposed to mainly use GaN substrates as substrates for semiconductor lasers.

In the case of growing the nitride-based semiconductor on the GaN substrate, there is a problem that good crystallinity cannot be obtained when the nitride-based semiconductor is grown on the C plane, that is, the (0001) plane. Regarding this problem, in Patent Document 1, the following technology is proposed: by inclining the upper surface of the GaN substrate with respect to the C-plane by 0.03° or more and 10° or less, the nitride formed on the GaN substrate can be improved. The crystallinity of semiconductor-like light-emitting elements can achieve long life.

In addition, techniques for forming semiconductor elements using nitride-based semiconductors are also disclosed in Patent Documents 2 and 3, for example.

Patent Document 1: JP-A-2000-223743

Patent Document 2: JP-A-2000-82676

Patent Document 3: JP-A-2003-60318

In addition, when a semiconductor element such as a semiconductor laser is formed using a GaN substrate, it is desired that not only the crystallinity of the nitride-based semiconductor layer formed on the GaN substrate is good but also the flatness of the surface thereof be good. However, when a nitride-based semiconductor layer is grown on a GaN substrate using the technique of Patent Document 1, the surface of the nitride-based semiconductor layer is not sufficiently flat, and furthermore, sufficient crystallinity cannot be ensured. Therefore, when a semiconductor element is formed using this nitride-based semiconductor layer, there is a problem that its electrical characteristics are deteriorated or its reliability is lowered. In addition, from the viewpoint of manufacturability of semiconductor elements, it is not desirable to incline the upper surface of the GaN substrate to a large extent.

Contents of the invention

Therefore, the present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a technique capable of improving the manufacturability of a semiconductor device using a GaN substrate while forming a nitrogen substrate having excellent flatness and crystallinity on the GaN substrate. compound semiconductor layer.

The semiconductor element of the present invention has a gallium nitride substrate and a nitride-based semiconductor layer formed on the upper surface of the gallium nitride substrate, wherein the upper surface of the gallium nitride substrate is at a distance <1 relative to the (0001) plane. The -100> direction has an off angle (off angle) of 0.1° or more and 1.0° or less.

In addition, the manufacturing method of the semiconductor element of the present invention has the following steps: step (a) preparing a nitriding film having an offset angle of 0.1° or more and 1.0° or less with respect to the (0001) plane on the upper surface in the <1-100> direction. a gallium substrate; and step (b) forming a nitride-based semiconductor layer on the upper surface of the gallium nitride substrate.

According to the semiconductor element and the manufacturing method of the semiconductor element of the present invention, since the upper surface of the gallium nitride substrate has an offset angle of not less than 0.1° and not more than 1.0° relative to the (0001) plane in the <1-100> direction, A nitride-based semiconductor layer excellent in flatness and crystallinity can be formed on a gallium nitride substrate while improving the manufacturability of the semiconductor element of the present invention.

Description of drawings

FIG. 1 is a perspective view showing the structure of a gallium nitride substrate according to an embodiment of the present invention.

FIG. 2 is a perspective view showing the structure of a semiconductor element according to an embodiment of the present invention.

3 is a perspective view showing a modified example of the structure of the semiconductor element according to the embodiment of the present invention.

4 is a flowchart showing a method of manufacturing a semiconductor element according to an embodiment of the present invention.

5 is a graph showing the relationship between the offset angle on the upper surface of the gallium nitride substrate and the maximum elevation difference on the surface of the nitride-based semiconductor layer.

FIG. 6 shows the offset angle in the <11-20> direction and the maximum elevation difference on the upper surface of the nitride-based semiconductor layer when the upper surface of the gallium nitride substrate has an offset angle in the <1-100> direction. diagram of the relationship.

7 is a perspective view of a modified example of the structure of the semiconductor element according to the embodiment of the present invention.

FIG. 8 is a graph showing the relationship between the heat treatment time for a gallium nitride substrate and the maximum elevation difference on the upper surface of the gallium nitride substrate.

FIG. 9 is a graph showing the relationship between the heat treatment temperature for a gallium nitride substrate and the maximum elevation difference on the upper surface of the gallium nitride substrate.

10 is a graph showing the relationship between the impurity concentration of a nitride-based semiconductor layer and the maximum level difference on the upper surface of the nitride-based semiconductor layer.

Detailed ways

FIG. 1 is a perspective view showing the structure of a GaN substrate 10 according to an embodiment of the present invention. The GaN substrate 10 of this embodiment has a hexagonal crystal structure, and light-emitting elements such as semiconductor lasers and light-emitting diodes and semiconductor elements such as high-frequency electronic devices are formed using the GaN substrate 10 .

As shown in FIG. 1 , the upper surface 10 a of the GaN substrate 10 has an offset angle θ in the <1-100> direction relative to the C plane, that is, the (0001) plane. Therefore, the upper surface 10a of the GaN substrate 10 and the <11-20> direction perpendicular to the <1-100> direction and parallel to the C-plane as the rotation axis are obtained by rotating the plane parallel to the C-plane by an angle θ. faces parallel. In this embodiment, the offset angle θ is set to be greater than or equal to 0.1° and less than or equal to 1.0°.

Including the GaN substrate 10 of this embodiment, as shown in FIG. 1 , generally on the surface of the GaN substrate, regions 21 with higher dislocation density and regions with lower dislocation density are alternately arranged along the <11-20> direction. twenty two. When forming a semiconductor element using such a GaN substrate, the region 22 with a low dislocation density is usually used.

Next, an example of a semiconductor element formed using the GaN substrate 10 will be described. FIG. 2 is a perspective view showing the structure of a nitride-based semiconductor laser formed using a GaN substrate 10 . As shown in FIG. 2 , a plurality of nitride-based semiconductor layers are stacked on the upper surface 10 a of the GaN substrate 10 . Specifically, on the upper surface 10a of the GaN substrate 10, an n-type semiconductor layer 11, an n-type cladding layer 12, an n-type optical guiding layer 13, a multiple quantum well (MQW) active layer 14, a p-type electron potential barrier layer 15 , p-type optical guide layer 16 , p-type cladding layer 17 , and p-type contact layer 18 . Furthermore, an n-electrode 19 is provided on the lower surface of the GaN substrate 10 , and a p-electrode 20 is provided on the upper surface of the p-type contact layer 18 .

The n-type semiconductor layer 11 is made of, for example, n-type GaN or n-type aluminum gallium nitride (AlGaN) with a thickness of 1.0 μm. The n-type cladding layer 12 is made of, for example, n-type Al _0.07 Ga _0.93 N with a thickness of 1.0 μm. The n-type optical guiding layer 13 is made of, for example, n-type GaN with a thickness of 0.1 μm. The multiple quantum well active layer 14 has, for example, a multiple quantum well structure in which well layers made of indium gallium nitride (In _0.12 Ga _0.88 N) with a thickness of 3.5 nm and barrier layers made of GaN with a thickness of 7.0 nm are alternately stacked.

The p-type electron barrier layer 15 is made of, for example, p-type Al _0.2 Ga _0.8 N with a thickness of 0.02 μm. The p-type optical guiding layer 16 is made of, for example, p-type GaN with a thickness of 0.1 μm. The p-type cladding layer 17 is made of, for example, p-type Al _0.07 Ga _0.93 N with a thickness of 0.4 μm. Also, the p-type contact layer 18 is made of p-type GaN with a thickness of 0.1 μm.

The nitride-based semiconductor laser of the present embodiment having such a structure is dissociated on the <1-100> plane, and has a resonator mirror on the <1-100> plane. And, when a voltage is applied between the n-electrode 19 and the p-electrode 20 , laser light is output from the multiple quantum well active layer 14 .

FIG. 3 is a perspective view showing a modified example of the structure of the semiconductor laser of the present embodiment. The semiconductor laser shown in FIG. 3 is a ridge waveguide type semiconductor laser. In the semiconductor laser shown in FIG. Oxide film 52. Next, a method of manufacturing the semiconductor laser shown in FIG. 3 will be described.

In addition, in the crystal growth method of the nitride-based semiconductor layer such as the n-type semiconductor layer 11 and the n-type cladding layer 12, there are metal organic vapor deposition method (MOCVD method), molecular beam epitaxy method (MBE method), hydride Vapor phase epitaxy (HVPE) etc., in the following examples, MOCVD method is used. Among the Group III raw materials, trimethylgallium (hereinafter referred to as "TMG"), trimethylaluminum (hereinafter referred to as "TMA") or trimethylindium (hereinafter referred to as "TMI") are used, and in Group V raw materials In this method, ammonia (NH ₃ ) gas was used. In addition, silane (SiH ₄ ), for example, is used as an n-type impurity raw material, and, for example, magnesocene (CP ₂ Mg) is used as a p-type impurity raw material. In addition, hydrogen (H ₂ ) gas and nitrogen (N ₂ ) gas are used as the carrier gas for carrying these source gases.

FIG. 4 is a flowchart showing a method of manufacturing the semiconductor laser shown in FIG. 3 . First, in step s1 , GaN substrate 10 shown in FIG. 1 with offset angle θ set to 0.5°, for example, is prepared. And, heat treatment is performed on GaN substrate 10 in step s2. In step s2, the GaN substrate 10 is first set in the MOCVD apparatus. Next, NH ₃ gas was supplied into the device, and the temperature inside the device was raised to 1000°C. After the temperature was raised, a mixed gas containing NH ₃ gas, N ₂ gas, and H ₂ gas was supplied into the apparatus, and the GaN substrate 10 was heat-treated for 15 minutes in the mixed gas atmosphere. At this time, the ratio of H ₂ gas in the mixed gas is set to 5%, for example.

Next, in step s3 , a plurality of nitride-based semiconductor layers including n-type semiconductor layer 11 and the like are stacked on GaN substrate 10 . In step s3 , first, supply of TMG gas and SiH ₄ gas into the MOCVD apparatus is started, and n-type semiconductor layer 11 made of n-type GaN is grown on upper surface 10 a of GaN substrate 10 . Further, the supply of TMA gas is started to grow the n-type cladding layer 12 made of n-type Al _0.07 Ga _0.93 N on the n-type semiconductor layer 11 .

Next, the supply of TMA gas was stopped, and the n-type optical guiding layer 13 made of n-type GaN was grown on the n-type cladding layer 12 . Thereafter, the supply of TMG gas and SiH ₄ gas was stopped, and the temperature in the apparatus was lowered to 700°C. Then, the multiple quantum well active layer 14 is grown on the n-type photoconductive layer 13 . Specifically, by supplying TMG gas, TMI gas, and NH ₃ gas, a well layer made of In _0.12 Ga _0.88 N was grown, and by supplying TMG gas and NH ₃ gas, a barrier layer made of GaN was grown. By repeatedly performing this process, the multiple quantum well active layer 14 having three pairs of well layers and barrier layers is formed.

Thereafter, while supplying NH ₃ gas, the temperature inside the device was raised to 1000°C, and then the supply of TMG gas, TMA gas, and CP ₂ Mg gas was started to make the p-type electron potential composed of p-type Al _0.2 Ga _0.8 N The barrier layer 15 is grown on the multiple quantum well active layer 14 . Next, the supply of TMA gas was stopped, and the p-type optical guide layer 16 made of p-type GaN was grown on the p-type electron barrier layer 15 . Next, the supply of TMA gas was restarted, and the p-type cladding layer 17 made of p-type Al _0.07 Ga _0.93 N and having a thickness of 0.4 μm was grown on the p-type optical guiding layer 16 .

Next, the supply of TMA gas was stopped, and a p-type contact layer 18 made of p-type GaN and having a thickness of 0.1 μm was grown on the p-type cladding layer 17 . Thereafter, the supply of TMG gas and CP ₂ Mg gas was stopped, and the temperature in the apparatus was cooled to room temperature.

As above, when the crystal growth of all the nitride-based semiconductor layers is completed and step s3 is completed, in step s4 , the ridge portion 51 to be the optical waveguide is formed. In step s4, first, a resist is applied over the entire wafer, and a photolithography process is performed to form a resist pattern having a predetermined shape corresponding to the shape of the mesa portion. Using this resist pattern as a mask, the p-type contact layer 18 and the p-type cladding layer 17 are sequentially etched, for example, by reactive ion etching (RIE). Thus, the ridge portion 51 serving as the optical waveguide is formed. In addition, as the etching gas at this time, for example, a chlorine-based gas is used.

Next, the p-electrode 20 and the n-electrode 19 are formed in step s5. In step s5, first, the resist pattern used as a mask in step s4 is left, and an oxide layer with a thickness of, for example, 0.2 μm is formed on the entire wafer by CVD, vacuum evaporation, or sputtering. Silicon film ( _SiO2 film) 52, the silicon oxide film 52 on the ridge 51 is removed at the same time as the resist pattern is removed. This treatment is called "lift-off". Thereby, the opening 53 exposing the ridge 51 is formed in the silicon oxide film 52 .

Next, a metal film made of platinum (Pt) and a metal film made of gold (Au) are sequentially formed on the entire wafer, for example, by a vacuum evaporation method, and then a resist coating process and a photolithography process are performed. Wet etching or dry etching forms the p-electrode 20 in the opening 53 .

Thereafter, on the entire lower surface of the GaN substrate 10, a metal film made of titanium (Ti) and a metal film made of aluminum (Al) are sequentially formed, for example, by a vacuum evaporation method, and the formed laminated film is etched to realize An n-electrode 19 is formed. Furthermore, a fusion process for bringing n-electrode 19 into ohmic contact with GaN substrate 10 is performed.

The above-formed structure is processed into strips by dissociation or the like, and two resonator end faces are formed on this structure. Then, after applying end surface coating to the end surfaces of these resonators, this strip structure is divided into chip shapes by dissociation or the like. Thus, the semiconductor laser shown in FIG. 3 is completed.

As above, in the present embodiment, since the upper surface 10a of the GaN substrate 10 has an offset angle θ of 0.1° or more in the <1-100> direction with respect to the (0001) plane, on the upper surface 10a The flatness and crystallinity of the formed n-type semiconductor layer 11 are improved. As a result, the electrical characteristics of the semiconductor element of the present embodiment formed using the n-type semiconductor layer 11 are improved, and the reliability is improved.

FIG. 5 is a graph showing the relationship between the offset angle θ of the upper surface 10a of the GaN substrate 10 and the maximum elevation difference on the upper surface of the n-type semiconductor layer 11 formed on the upper surface 10a. The diamond-shaped symbols in FIG. 5 are the data when the upper surface 10a of the GaN substrate 10 has an offset angle θ in the <1-100> direction as in this embodiment, and the square symbols are different from this embodiment, and are the data of the GaN substrate 10. The upper surface 10a has data when the angle θ is shifted in the <11-20> direction. The same applies to the rhombus symbols and square symbols in FIGS. 9 and 10 described later.

In addition, the maximum elevation difference on the vertical axis in FIG. 5 indicates that the n-type semiconductor layer 11 is grown to a thickness of 4 μm, and the n-type semiconductor layer 11 is grown in the range of 200 μm in the vertical direction by 200 μm in the lateral direction using an atomic force microscope (Atomic Force Microscopy: AFM). Layer 11 is the value when the surface is observed. The same applies to FIGS. 6 and 10 described later.

As shown in FIG. 5 , when the offset angle θ is greater than or equal to 0.1°, the maximum elevation difference on the upper surface of the n-type semiconductor layer 11 is greatly reduced, and the surface morphology is good. And, in the case of tilting the upper surface 10a of the GaN substrate 10 in the <1-100> direction, when the offset angle θ is greater than or equal to 0.25°, the maximum elevation difference in the n-type semiconductor layer 11 is further reduced, and the n-type The surface morphology of the semiconductor layer 11 was good. On the other hand, as shown in FIG. 5, when the offset angle θ is larger than 1.0°, the maximum level difference on the upper surface of the n-type semiconductor layer 11 becomes large.

Also, when the offset angle θ is 0.05° or less, since hexagonal hillocks are formed on the surface of the n-type semiconductor layer 11, the unevenness on the surface increases, and a flat form cannot be obtained.

In addition, when the offset angle θ is greater than or equal to 0.05° and less than 0.25°, a step is generated along the direction perpendicular to the direction of the offset angle θ, that is, the direction perpendicular to the <1-100> direction or the <11-20> direction the step difference. However, in the case where the direction of the offset angle θ is along the <1-100> direction, when the offset angle θ is greater than or equal to 0.25°, the step-like step difference is reduced and a flatter form is obtained. At this time, the average surface roughness of the n-type semiconductor layer 11 can be suppressed to be equal to or less than 0.5 nm.

On the other hand, in the case where the direction of the offset angle θ is along the <11-20> direction, even if the offset angle θ is 0.25° or more, dislocations on the surface of the GaN substrate 10 shown in FIG. 1 The region 21 with high density hinders the growth of step flow, so the step-like step difference remains, and a good surface shape cannot be obtained. Such unevenness on the surface causes the following problems: when fabricating, for example, a semiconductor laser like this embodiment, not only the n-type semiconductor layer 11, but also the multiple quantum well active layer 14 also produces a step difference, and the loss in the resonator of the laser becomes larger, the threshold current density deteriorates, etc.

As described above, the offset angle θ and the direction of the upper surface 10a of the GaN substrate 10 greatly affect the surface irregularities and crystallinity of the growth layer formed on the upper surface 10a. Like the present embodiment, when a semiconductor laser is fabricated on the upper surface 10a of the GaN substrate 10 inclined by 0.1° or more in the <1-100> direction, stable device characteristics with good flatness and crystallinity can be obtained. Moreover, when a semiconductor laser is fabricated on the upper surface 10a of the GaN substrate 10 tilted by 0.25° or more along the <1-100> direction, the flatness and crystallinity become better, and when the semiconductor laser is tilted along the <1-100> direction When a semiconductor laser is fabricated on the upper surface 10a of the GaN substrate 10 with an angle of 0.3° or more, the flatness and crystallinity are further improved.

Furthermore, in this embodiment, since the offset angle θ is set to be equal to or less than 1.0°, the processability when processing the GaN substrate 10 and setting the offset angle θ is improved, and further, it is easy to form A plurality of nitride-based semiconductor layers stacked. Therefore, the manufacturability of the semiconductor element using the GaN substrate 10 is improved.

In addition, there is usually a resonator mirror on the (1-100) plane of the semiconductor laser, but at this time, when the offset angle θ along the <1-100> direction becomes larger, the mirror loss becomes larger. Therefore, it is also preferable to set the offset angle θ to 1.0° or less from the viewpoint of reducing mirror loss in the semiconductor laser.

In the GaN substrate 10 shown in FIG. 1 , the offset angle θ is set only in the <1-100> direction, but the offset angle θ1 may also be set in the <11-20> direction. 6 is a diagram showing the offset angle θ1 when the upper surface 10a of the GaN substrate 10 has an offset angle θ1 of 0.25° in the <1-100> direction and also has an offset angle θ1 in the <11-20> direction. and the relationship between the maximum elevation difference on the upper surface of the n-type semiconductor layer 11 formed on the upper surface 10a.

As shown in FIG. 6, in the state where the upper surface 10a of the GaN substrate 10 is inclined by 0.25° in the <1-100> direction, when the offset angle θ1 in the <11-20> direction is set to be greater than or equal to 0° and less than When it is equal to 0.1°, the maximum elevation difference on the upper surface of the n-type semiconductor layer 11 hardly changes, and the surface morphology of the n-type semiconductor layer 11 is good. The result shown in FIG. 6 is the result when the offset angle θ is 0.25°, however, the same result is also obtained if the offset angle θ is greater than or equal to 0.25°. In addition, FIG. 7 shows that a GaN substrate 10 having an offset angle θ in the <1-100> direction and an offset angle θ1 in the <11-20> direction is used in the nitride-based semiconductor laser shown in FIG. 2 . The structure of the nitride-based semiconductor laser at the time.

Figure 8 shows the proportion of _H2 gas in the mixed gas as a parameter. In the growth furnace, in the mixed gas environment containing _NH3 gas, _N2 gas and _H2 gas, or containing _NH3 gas and _N2 gas ° A graph showing the relationship between the maximum elevation difference on the upper surface 10a of the GaN substrate 10 and the heat treatment time when the GaN substrate 10 is heat-treated.

The circular symbols in Fig. 8 indicate the data when the partial pressure of _H2 gas is 0%, that is, the data when the mixed gas does not contain _H2 gas, and the square symbols, triangle symbols, cross symbols, * symbols and rhombus symbols in Fig. 8 Data are shown when the partial pressure of H ₂ gas is set to 5%, 10%, 20%, 30%, and 40%, respectively. In addition, the maximum elevation difference on the vertical axis in FIG. 8 represents the value when the upper surface 10 a of the GaN substrate 10 was observed surface-wise in the range of 10 μm in the vertical direction and 10 μm in the lateral direction using AFM. The same applies to FIG. 9 described later.

As shown in FIG. 8 , in the above-mentioned step 2, when the partial pressure of _H2 gas is less than or equal to 30%, and the heat treatment is performed for more than or equal to 5 minutes, the unevenness of the upper surface 10a of the GaN substrate 10 is greatly reduced. .

In addition, the unevenness of the upper surface 10 a of the GaN substrate 10 can be reduced to 1 nm or less by performing heat treatment at a partial pressure of H ₂ gas of 0% or more and 10% or less for 10 minutes or more. Like the present invention, in the case where the nitride-based semiconductor layer is formed on the upper surface 10a of the GaN substrate 10 inclined by 0.1° or more in the <1-100> direction, when the upper surface 10a of the GaN substrate 10 has When the unevenness is equal to or larger than 2nm, the effects of improving flatness and crystal quality cannot be exhibited to the maximum. Therefore, it is very important to reduce the unevenness of the upper surface 10a of the GaN substrate 10 to 1nm or less by heat treatment before growing the nitride-based semiconductor layer to maximize the effect of the present invention.

In addition, when the heat treatment of GaN substrate 10 is performed for a long time, the decomposition of gallium nitride in GaN substrate 10 is promoted, and nitrogen is detached from GaN substrate 10. As a result, upper surface 10a of GaN substrate 10 The flatness is not improved. As can be seen from FIG. 8 , when the heat treatment time exceeds 30 minutes, the unevenness of the upper surface 10 a of the GaN substrate 10 becomes sharply larger. Therefore, in order to reliably improve the flatness of the GaN substrate 10 , it is ideal that the heat treatment time is less than or equal to 30 minutes.

As for the heat treatment temperature, as long as it is not less than 800° C. and not more than 1200° C., the same effect is produced, and the unevenness of the upper surface 10 a of the GaN substrate 10 is reduced. Also, by setting the heat treatment temperature at 1000° C. or more and 1200° C. or less, the unevenness of upper surface 10 a of GaN substrate 10 is further reduced. FIG. 9 shows that in a mixed gas environment containing NH ₃ gas, N ₂ gas, and H ₂ gas, and the partial pressure of H ₂ gas is set at 20%, a GaN substrate 10 is heat-treated for 5 minutes in a growth furnace. , a graph of the relationship between the maximum elevation difference on the upper surface 10a of the GaN substrate 10 and the heat treatment temperature. As shown in FIG. 9, when the heat treatment temperature is 700° C. or lower, a large amount of migration of Ga atoms on the upper surface 10a of the GaN substrate 10 hardly occurs, so no reduction in the unevenness of the upper surface 10a is seen. , However, when the heat treatment temperature is greater than or equal to 800 degrees, the unevenness on the upper surface 10a is greatly reduced. Also, when the heat treatment temperature is equal to or greater than 1000° C., the maximum elevation difference on the upper surface 10 a of the GaN substrate 10 is further reduced. On the other hand, when the heat treatment temperature is set higher than 1200° C., the load on the substrate heating heater in the MOCVD apparatus is significantly increased, and frequent replacement of the heater is required, which is not desirable. Furthermore, since the probability of re-evaporation of nitrogen atoms from the upper surface 10a of the GaN substrate 10 increases exponentially with respect to the heating temperature, when heating at a temperature higher than 1200°C, in order to prevent the re-evaporation of nitrogen atoms, Since it is necessary to increase the flow rate of the necessary NH ₃ gas, it is also not preferable from the viewpoint of productivity.

In addition, when the partial pressure of H ₂ gas is 30% or less, in the GaN substrate 10, the migration of gallium (Ga) atoms is promoted, so that the unevenness of the upper surface 10a of the GaN substrate 10 is reduced.

When the partial pressure of H ₂ gas is 30% or more, thermal etching of the substrate surface due to heat treatment has a strong effect, so the unevenness of upper surface 10 a of GaN substrate 10 hardly changes.

As above, in step s2, in the environment of the gas containing NH ₃ or the gas containing NH ₃ and H ₂ whose ratio of H ₂ is set to be equal to or less than 30%, the GaN substrate 10 is set to be equal to or greater than The flatness of the upper surface 10 a of the GaN substrate 10 is improved when the heat treatment is performed at 800° C. or less and 1200° C. for 5 minutes or more. Therefore, the flatness of the nitride-based semiconductor layer formed on the upper surface 10a of the GaN substrate 10 is also further improved, and it is possible to form a semiconductor element with good electrical characteristics using the nitride-based semiconductor layer.

In addition, by setting the heat treatment time to 30 minutes or less, the flatness of GaN substrate 10 can be surely improved.

In addition, when the GaN substrate 10 is heat-treated, the N ₂ gas contained in the mixed gas used in the above example functions as a carrier gas, and the N ₂ gas has a flatness effect on the upper surface 10 a of the GaN substrate 10 . There is almost no contribution to the improvement, so N ₂ gas does not necessarily need to be included in the mixed gas.

FIG. 10 is a graph showing the relationship between the impurity concentration of the n-type semiconductor layer 11 and the maximum elevation difference on the upper surface of the n-type semiconductor layer 11 according to the present embodiment. As shown in FIG. 10 , by setting the impurity concentration of the n-type semiconductor layer 11 to be greater than or equal to 1×10 ¹⁶ cm ^-3 and less than or equal to 1×10 ²⁰ cm ^-3 , the maximum elevation difference on its upper surface becomes smaller, The surface morphology of the n-type semiconductor layer 11 is further improved. In addition, by setting the impurity concentration of the n-type semiconductor layer 11 to be equal to or greater than 1×10 ¹⁷ cm ⁻³ and equal to or less than 1×10 ¹⁹ cm ⁻³ , the maximum elevation difference on the upper surface thereof becomes a value smaller than 10 nm, The surface morphology of the n-type semiconductor layer 11 is further improved. Furthermore, by setting the impurity concentration of the n-type semiconductor layer 11 to be greater than or equal to 1×10 ¹⁷ cm ^-3 and less than or equal to 5×10 ¹⁸ cm ^-3 , the maximum elevation difference on its upper surface becomes a smaller value, and the n-type The surface morphology of the semiconductor layer 11 is further improved.

The present invention is applicable not only to other semiconductor light-emitting elements other than semiconductor lasers, but also to other electronic devices.

As described above, according to the present invention, a nitride-based semiconductor layer excellent in flatness and crystallinity can be formed on a GaN substrate. The crystallinity referred to here refers to the electro-optical characteristics of the crystal which are attributable to the regularity of the atomic arrangement of the crystal, that is, the regularity of the structure of the crystal. When the structural regularity of the nitride-based semiconductor layer cannot be ensured, an abnormal structure independent of the flatness of the GaN substrate is formed in the nitride-based semiconductor layer. The abnormal structure can be roughly divided into irregular unevenness on the surface of the nitride-based semiconductor layer and a regular surface shape called a hillock, which recognizes the crystallographic symmetry of the reaction substrate. Essentially a type of facet. Irregular irregularities are formed during crystal growth due to insufficient surface migration of group III atoms. When the surface migration is insufficient, the probability that the group III atoms are located where the group III atoms should be arranged crystallographically decreases. As a result, the properties dictated by the microstructure at the atomic level deteriorate. Specifically, the carrier mobility defined by the carrier diffusion probability decreases as an electrical characteristic due to lattice defects such as atomic holes and interlattice atoms. In addition, as a result of the formation of luminescence centers caused by impurities, optical characteristics deteriorate. On the other hand, the formation of facets induces microscopic anisotropy of the surface migration of group III atoms. Therefore, the film thickness of the multiple quantum well active layer of the semiconductor laser causes spatial fluctuation. Even if this fluctuation is in the nanometer order, it has a great influence on the emission wavelength.

Therefore, realizing crystal growth that does not form an abnormal structure in the nitride-based semiconductor layer is essentially important in order to obtain good semiconductor laser characteristics. In order to prevent the formation of an abnormal structure, it is effective to set an appropriate offset angle on the GaN substrate in advance to cause so-called step flow growth, as in the present invention. In particular, as in the GaN substrate 10 shown in FIG. 1 , by setting the offset angle in only one direction and generating unidirectional step flow growth, the formation of abnormal structures can be reliably suppressed. Because the dynamic physical and chemical phenomena such as crystal growth are extremely complex, it is very difficult to quantitatively predict the ideal deviation angle theoretically. Generally, it is considered to be a highly realistic method to investigate an appropriate offset angle by an experimental method as in the present embodiment.

Claims (12)

1. A semiconductor element comprising: GaN substrates; and a nitride-based semiconductor layer formed on the upper surface of the gallium nitride substrate, The upper surface of the gallium nitride substrate has an offset angle of not less than 0.1° and not more than 1.0° relative to the (0001) plane in the <1-100> direction. 2. The semiconductor element according to claim 1, wherein, The aforementioned offset angle is greater than or equal to 0.25° and less than or equal to 1.0°. 3. The semiconductor element according to claim 2, wherein, The aforementioned offset angle is greater than or equal to 0.3° and less than or equal to 1.0°. 4. The semiconductor element according to any one of claim 2 and claim 3, wherein, The above-mentioned upper surface of the above-mentioned GaN substrate has an offset angle of not less than 0° and not more than 0.1° relative to the (0001) plane in the <11-20> direction. 5. The semiconductor element according to any one of claims 1 to 3, wherein, The aforementioned nitride-based semiconductor layer is an n-type semiconductor layer having an impurity concentration of not less than 1×10 ¹⁶ cm ⁻³ and not more than 1×10 ²⁰ cm ⁻³ . 6. The semiconductor element according to claim 5, wherein, The aforementioned nitride-based semiconductor layer is an n-type semiconductor layer having an impurity concentration of not less than 1×10 ¹⁷ cm ⁻³ and not more than 1×10 ¹⁹ cm ⁻³ . 7. The semiconductor element according to claim 6, wherein, The aforementioned nitride-based semiconductor layer is an n-type semiconductor layer having an impurity concentration of 1×10 ¹⁷ cm ⁻³ or more and 5×10 ¹⁸ cm ⁻³ or less. 8. A method of manufacturing a semiconductor element, comprising the steps of: Step (a), preparing a gallium nitride substrate having an upper surface with an offset angle greater than or equal to 0.1° and less than or equal to 1.0° in the <1-100> direction relative to the (0001) plane; and Step (b), forming a nitride-based semiconductor layer on the upper surface of the gallium nitride substrate. 9. The manufacturing method of a semiconductor element as claimed in claim 8, further comprising: a step (c), between the above-mentioned steps (a) and (b), in a gas containing at least NH ₃ or at least containing NH ₃ and _H2 gas environment, perform a heat treatment on the above-mentioned GaN substrate at a temperature of 800° C. or 1200° C. for 5 minutes or more, In the above step (c), when a gas containing at least NH ₃ and H ₂ is used, the ratio of H ₂ in the gas is set to be 30% or less. 10. The manufacturing method of a semiconductor element as claimed in claim 9, wherein, In the above step (c), heat treatment is performed on the gallium nitride substrate for not less than 5 minutes and not more than 30 minutes. 11. The method for manufacturing a semiconductor element according to any one of claim 9 and claim 10, wherein, In the above-mentioned step (c), heat treatment is performed on the above-mentioned gallium nitride substrate at a temperature of not less than 1000°C and not more than 1200°C. 12. The method for manufacturing a semiconductor element according to any one of claim 9 and claim 10, wherein, In the above-mentioned step (c), heat treatment is performed on the above-mentioned gallium nitride substrate at 1000° C. for 10 minutes or more, and further, when a gas containing at least NH ₃ and H ₂ is used, the ratio of H ₂ in the gas Set to 10% or less.

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