CN1781195A - Method for making group III nitride devices and devices produced thereby - Google Patents

Abstract

A method is for making at least one semiconductor device including providing a sacrificial growth substrate of Lithium Aluminate (LiAlO2); forming at least one semiconductor layer including a Group III nitride adjacent the sacrificial growth substrate; attaching a mounting substrate adjacent the at least one semiconductor layer opposite the sacrificial growth substrate; and removing the sacrificial growth substrate. The method may further include adding at least one contact onto a surface of the at least one semiconductor layer opposite the mounting substrate, and dividing the mounting substrate and at least one semiconductor layer into a plurality of individual semiconductor devices. To make the final devices, the method may further include bonding the mounting substrate of each individual semiconductor device to a heat sink. The step of removing the sacrificial substrate may include wet etching the sacrificial growth substrate.

Description

Method for fabricating III-nitride devices and devices fabricated therefrom

technical field

The present invention relates to the field of semiconductors, and more particularly to the fabrication of ultra-thin Ill-nitride-based semiconductor or electronic devices such as light emitting diodes (LEDs) and laser diodes, and related devices.

Background technique

Group III nitride compound semiconductor devices include light emitting devices and electronic devices. The light-emitting device can be tailored with the composition of the film to emit light in the range from yellowish all the way through green, blue, and finally into the ultraviolet. It is also possible to produce "white light" by means of appropriate combinations with light-emitting devices of other colors, or by adding phosphors to these devices. The emission mode of such a device can be incoherent, known as a "light emitting diode" (LED), or coherent, in which case the device is known as a "laser diode" (LD). Electronic devices may also include high electron mobility transistors (HEMTs), heterojunction bipolar transistors (HBTs), Schottky, p-i-n, and metal-semiconductor-metal (MSM) photodiodes, among others.

Sapphire is one of the primary materials used to grow GaN thin films and make blue and green LEDs. Because of its relatively low cost and availability in the market, it has become a frequently used material. The brightness of LEDs fabricated on sapphire is satisfactory because the transparent properties of the sapphire substrate enable light to be emitted efficiently without much obstruction.

Unfortunately, GaN films on sapphire have a high defect density due to poor lattice mismatch (greater than 17%). One solution to the poor mismatch that has been tried is to grow a low-temperature buffer layer of AlN before growing GaN. GaN layers are grown on AlN cores highly oriented along the c-axis. Although the GaN layer is technically polycrystalline, it is still suitable for making general LED devices. But the typical dislocation density of a GaN film on sapphire with a buffer layer is about 10 ¹¹ per square centimeter, although there is evidence that by growing a thicker GaN film, the dislocation density can be reduced due to grain growth and grain boundary reduction. error density. This improvement is limited, and growing thicker films comes at a higher cost.

To make high-performance devices, the problem with sapphire is that its thermal conductivity is not as good as GaN, AlN, SiC, or even Si. As a result, it is difficult to make high-brightness LEDs that require higher current injection and thus generate more heat. Also, GaN is very strongly bonded to sapphire, making it difficult to remove, and sapphire is an insulator. These add to the manufacturing steps required to produce LEDs. Since the electrical leads are all on the same side of the diode, the size of the device is larger and the number of diodes fabricated per unit area is thus reduced.

To fabricate laser diodes (LDs) on sapphire, the same problems are encountered, namely high defect density and poor thermal conductivity, which limit the current density and thus the power output of the laser. Also, since the GaN film is composed of polycrystalline grains, it is difficult to produce a smooth surface of the resonator. As a result, the mode structure of the laser is inferior.

Another method has been developed which uses epitaxial lateral overgrowth (ELOG) to produce cells with relatively large GaN grain size and low defect density. LDs formed from these selected low-defect regions do exhibit improved performance. Unfortunately, the whole process is complicated, the process cost is higher, and the yield of LD is very low.

A workaround is to use SiC as the substrate to grow GaN films. The lattice matching of SiC to GaN is much improved (less than 3.5%) compared to sapphire. The theoretical defect density is also greatly reduced, about 10 ⁹ per square centimeter. Perhaps most important of all, GaN films grown on SiC substrates with low lattice mismatch compared to polycrystalline films on sapphire can be considered monocrystalline films.

However, there are indeed some problems in growing high-quality GaN thin films on SiC wafers. First, SiC wafers are expensive because SiC crystals are difficult to grow. SiC crystals are produced by physical vapor transport at very high temperatures (above 2200°C) in a specially designed sealed vacuum reaction chamber. Second, the cutting and polishing process is also expensive due to the high hardness of SiC approaching that of diamond. Furthermore, the small coefficient of thermal expansion of SiC (4.2×10 ^-6 /°C) relative to that of GaN (5.6×10 ^-6 /°C) is also problematic because it may place the GaN film under stress, thereby Cracks are caused during cooling after growth.

To reduce this cracking, a special AlGaN multilayer can be grown on the SiC wafer before the final GaN film is grown. The same layers are also used to minimize the bandgap offset between SiC and GaN. With this minimized offset, it is possible to build GaN LEDs in conventional designs, taking advantage of the advantageous properties of the electrical conductivity of SiC substrates. This greatly reduces the size of the LED, and the yield per unit area is also significantly higher than that made from sapphire. Higher yields compensate for the high cost of substrate materials. SiC also has the advantage of high thermal conductivity. This, together with the low defect density, should allow LEDs and LDs to work better with SiC substrates.

The intrinsic quantum efficiency of GaN LEDs fabricated on SiC is indeed better than that on sapphire. But the total external brightness of GaN LEDs on SiC is poor. This is due to the fact that SiC is not as transparent to GaN's emission, blocking a significant portion of the light. This is even more the case with UV LEDs. On the other hand, GaN-on-SiC LDs perform much better due to the good cleavage surface available. The beam quality of the laser has a much simpler mode structure, making it more suitable for DVD-type applications. The high thermal conductivity of the SiC substrate also means that higher currents can be applied to the LD, increasing power output.

The results of GaN films on sapphire and SiC indicate a common conclusion to further improve the performance of LEDs and LDs that there is a need to grow GaN films with low defect density. In other words, the substrate should have a closely matched lattice constant to GaN. Moreover, the substrate should also be transparent and have good electrical and thermal conductivity. Currently, the only substrate that can meet all these requirements is a single crystal GaN substrate. Unfortunately, the technology to produce such single-crystal GaN substrates is not yet adequate.

UNIPRESS in Poland has developed a high-pressure process to produce true single-crystal GaN in flake morphology down to 1 cm in size, but this may not be a commercially viable process for mass production. Others, such as ATMI, Lincoln Laboratories in the US, and Samsung in South Korea, have successfully produced individual GaN wafers with dimensions a few centimeters thick. Unfortunately, mismatched thermal expansion coefficients tend to warp and crack the wafer after growth. To separate GaN from sapphire, laser ablation techniques have been used. The removed GaN wafers still need to be polished before they can be used.

Another material with good potential might be a single-crystal AlN substrate. Small single crystals have been produced using physical vapor transport techniques at high temperature conditions similar to SiC. The growth process is still in the development stage, and high-quality AlN wafers may not be available for many years to come. Also, AlN is an insulator. Fabrication of the device will therefore face the same constraints as on sapphire.

Another workaround is to find an alternative substrate that has a good lattice match to GaN. After growing a GaN film on this substrate, the surrogate substrate can be removed to obtain a free-standing single crystal GaN film. If this GaN film has the appropriate thickness, it will be strong enough to be used as a substrate wafer for the manufacture of GaN LEDs and LDs. For example, Japan's Sumitomo uses GaAs as a substitute substrate combined with ELOG technology to produce independent GaN wafers with a diameter of 2 inches. After growing a thick film of GaN, the GaAs substrate is removed by chemical etching. Since the GaN surface is very rough after growth, polishing is required to produce a smooth surface. The whole process is still complicated, and the cost of the wafer is thus high. Sumitomo's standalone GaN wafers are c-surface (0001) oriented. Sumitomo's standalone GaN wafers are polycrystalline due to the large lattice mismatch (greater than 45%) between GaAs and GaN.

In US Patent No. 5,625,202, Chai disclosed a large class of compounds suitable as substrate materials for growing GaN and AlN single crystal films. Among the compounds listed, LiAlO ₂ (LAO) and LiGaO ₂ (LGO) show the best potential. This is due to the ability to produce large-sized LAO and LGO single crystals using the standard Czochralski melt Czochralski technique. There are already technologies for producing large-diameter high-quality single-crystal substrates, and the growth of GaN thin films has been demonstrated on LAO and LGO substrates.

It was noted during the growth process that the chemistry that produced the GaN film was very poorly compatible with the LGO substrate, although the two crystals had the best lattice match and almost identical crystal structures. The chemicals used to grow GaN films can attack the surface of LGO during the growth process. Moreover, even if the GaN film can be grown on the LGO substrate, the adhesion of the GaN film is very poor, so it will inevitably be peeled off due to the mismatch of the thermal expansion coefficient after the growth.

LAO has a very different crystal structure and crystal symmetry from GaN, with GaN being hexagonal and LAO being tetragonal. Nevertheless, the 2D (100) surface of LAO still has almost the same structure and lattice size as the GaN m-plane (10 1 0). The lattice mismatch along the a-axis direction of GaN is +1.45%. The lattice mismatch along the c-axis direction of GaN is only -0.17%. LAOs are also much better chemically compatible with GaN growth chemicals. Perhaps the most important of these is that LAO wafers can be easily removed by acid etching after growth. Taking advantage of this unique property, free-standing single-crystal GaN wafers with a thickness of 150-500 microns have been produced using the HVPE (metal hydride vapor phase transport epitaxy) method. Single crystal GaN wafers produced from LAO substrates have an m-plane orientation with index (10 1 0). This is clearly different from all other freestanding GaN wafers available on the market, which all have a c-plane orientation with index (0001). These wafers are disclosed in US Patent No. 6,648,966 and published in US Application no. US2003/0183158, both assigned to the assignee of the present invention, the entire contents of which are hereby incorporated by reference.

The ease with which the substrate can be removed by simple acid etching is a desirable property of LAO compared to more common substrates such as sapphire and SiC. Other potential substrates with the potential for easy removal include GaAs and Si. Both have very poor lattice matching (greater than 45%) to GaN. The ability to lift off GaN films does not provide much flexibility in device design and fabrication.

U.S. Patent No. 5917196 to Teraguchi proposes a method for growing GaN-based laser structures on _LiAlO2 substrates. reported a violet laser diode emitting at 430 nm with a threshold voltage of 10 V. However, the removal of the substrate is not disclosed, so the final device may still have two contacts like the above-mentioned sapphire substrate.

When handling an insulating substrate such as sapphire, additional steps are required in order to manufacture LEDs or other devices, thereby requiring additional costs. To reduce the cost of LEDs, processes have been developed to remove the insulating layer, allowing the devices to be fabricated like conventional GaAs LEDs. These processes include mechanical grinding and ablation with short-wavelength lasers. In both cases, the removal process is very slow and thus unsuitable for large-scale production. Also, the GaN surface after substrate removal is very rough, requiring mechanical polishing or reactive ion etching (RIE) to smooth the GaN surface. With this extra effort, new device structures were generated. Several laboratories have practiced this approach, as described below.

Wong et al. have discussed the integration of blue GaN thin film structures with different substrates using wafer bonding and lift-off methods (W.Wong, T.Sands, N.Cheung, etc., Compound Semiconductor Vol.5, p. 54, 1999). They grew nitride-based devices on a sapphire substrate, then bonded the top surface to a silicon wafer with an adhesive. A short-wavelength laser is focused through sapphire onto the GaN backside, breaking down the very thin GaN film. Since Ga is a liquid and N is a gas, the sapphire peels off. By dissolving the binder, the nitride part is formed. This part can be transferred to another substrate. If the surface of this part is coated with Pd and In, it can be inverted onto a new substrate also coated with Pd. The heat melts the In dissolved in the Pd, forming a strong, permanent bond. This technique has been used to bond blue-emitting GaN LEDs p-side down to silicon substrates.

Hewlett-Packard reported the transfer of a multi-quantum well nitride LED to a conductive host substrate (Y.K.Song et al., Appl. Phys. Lett., vol.74, p.3720, 1999). The device structures were grown on standard sapphire wafers using the OMVPE method. A Ni/Au contact is deposited on the top p-type GaN:Mg layer. A copper film is then electrochemically grown on the top surface, and the samples are flip-chip mounted onto a new substrate such as silicon. After the sapphire is removed by laser ablation, a new surface contact is made to the n-type layer. The luminescence peak of the device is at 450nm.

LumiLeds Lighting Company reported a high-power AlGaInN flip-chip LED design (JJWierer, et al., Appl. Phys. Lett., vol.78, p.3379, 2001). This device has a large light emitting area (approximately 0.70 mm2) compared to conventional small area (approximately 0.07 mm2) LEDs. The flip-chip design provides a large light emitting area. Good thermal contact enables higher current and lower forward voltage, resulting in higher power conversion efficiency. Around July 2002, LumiLeds introduced a 1W Luxeon ^TM device using a single 1mm x 1mm LED (Tj = 25°C, 425nm, 259mW CW at 350mA and 3.27V, 22.6% wall plug efficiency) and A 5W Luxeon ^™ device (Tj = 25°C, 425nm, 1100mW CW at 700mA and 7V, 22.4% wall plug efficiency) using 4 single 1mm x 1mm LEDs. In their design, the sapphire substrate still covers the top of the LED. To reduce sheet resistance, the p-junction contacts are in larger comb-like solder joints, while the n-junction is interdigitated. RIE (Reactive Ion Etching) with photolithographic patterns is required to provide electrical contacts.

Xerox reported the transfer of nitride lasers to copper substrates using the laser lift-off method (W.S. Wong et al., Mat. Res. Soc. Symp. Proc. V. 639, p. G12.2.1, 2001). Ridge waveguide laser structures are grown on sapphire substrates using the MOCVD method. A double microstrip shaped metal contact on the dry etched ridge is deposited on the top p-type surface. The structure was then flipped and mounted on a temporary silicon wafer, and the sapphire was removed by laser ablation. After etching the fresh n-type GaN surface in hydrochloric acid, an indium film is deposited on it. This indium film is then used to bond the LD component to the copper heat sink and remove the temporary silicon substrate.

The University of South Carolina reported the use of flip-chip bonding UV-emitting GaN LEDs to silver-plated copper heads to obtain very high emission intensities at room temperature (A. Chitnis et al., Mat. Res. Soc. Symp.Proc.Vol.743, p.L7.7.1, 2003), because copper forms an effective heat sink, while silver provides a good reflection for light traveling downwards.

Similar lift-off techniques have been reported for GaAs-based laser structures. Bell Communications Research Laboratory reported the use of an intermediate AlAs layer to remove GaAs substrates from LD structures by wet etching (E. Yablonovitch et al., IEEE Phot. Technol. Lett., Vol. 1, p. 41 (1989)). Firstly, a conventional LD is grown on a GaAs substrate by MOCVD method. Diluted hydrofluoric acid is used to clean the GaAs substrate by dissolving the AlAs so that the epitaxial components can float freely. This part, comprising multiple LDs, is held in wax as a support. All processing steps are completed prior to lift-off, including etching the stripe lasers and metallization. The structure is then mounted on a new glass or silicon substrate and cleaned of wax.

Transparent substrate red AlGaInP LEDs are commercially available. Typically, Hewlett-Packard grows LED structures on lattice-matched GaAs substrates, but black GaAs tends to absorb about half of the emitted red light. Therefore, after completing the AlGaInP device, a thick layer of lattice-mismatched GaP is grown on the top surface in order to provide a carrier. Although this top carrier is full of structural defects, these defects do not propagate back into the active region. The GaAs substrate is then removed by wet chemical etching. The device flakes are then placed on new transparent high-quality GaP wafers and sintered. Each individual device is then cut out. It has been found that very thin films are difficult to contact and suffer from high spreading resistance. Also, very thin LED chips suffer from light extraction problems due to waveguides and thus suffer from parasitic absorption problems at contacts and edges. Thus, mounting a thick transparent substrate can be very beneficial.

Contents of the invention

In view of the above background, it is an object of the present invention to provide a method of fabricating, such as light emitting devices, which is relatively straightforward and produces devices having the desired operational properties such as thin active regions and the ability to easily dissipate heat from them .

This and other objects, features, and advantages in accordance with the present invention are provided by the following method of fabricating at least one semiconductor device, the method comprising the steps of: providing a sacrificial growth substrate comprising lithium aluminate (LiAlO ₂ ) forming at least one semiconductor layer comprising a group III nitride adjacent to the sacrificial growth substrate; securing the mounting substrate adjacent to the at least one semiconductor layer facing the sacrificial growth substrate; and removing the sacrificial growth substrate. The method may also include adding at least one contact to a surface of the at least one semiconductor layer facing the mounting substrate, and separating the mounting substrate and the at least one semiconductor layer into a plurality of individual semiconductor devices. To fabricate the final device, the method may also include bonding the mounting substrate of each individual semiconductor device to, for example, a heat sink comprising indium (In).

More specifically, the step of removing the sacrificial substrate may include mechanical grinding and wet etching of the sacrificial growth substrate. Thus, in certain embodiments, the mounting substrate can be selected to resist wet corrosion. In other embodiments where the mounting substrate is not resistant to wet corrosion, mechanical grinding may be the preferred method of removing the substrate. When wet etching is required, part of the mounting substrate can be protected from wet etching.

The sacrificial growth substrate preferably comprises single crystal _LiAlO2 , and the at least one semiconductor layer preferably comprises at least one single crystal gallium nitride (GaN) layer. This combination of materials can produce GaN layers with m-plane (10 1 0) orientation as desired.

The fixing the mounting substrate may include: forming an adhesive layer on the at least one semiconductor layer; and bonding the adhesive layer to the mounting substrate. For example, the adhesive layer may contain at least one of nickel (Ni) and gold (Au).

The mounting substrate can contain copper (Cu), silver (Ag), gold (Au), aluminum (Al), chromium (Cr), nickel (Ni), titanium (Ti), molybdenum (Mo), tungsten (W), At least one of zirconium (Zr), platinum (Pt), palladium (Pd), and silicon (Si). At least one semiconductor layer may be doped. In addition, the method may further include forming a buffer layer between the sacrificial growth substrate and the at least one semiconductor layer; and wherein removing the sacrificial growth substrate further includes removing the buffer layer.

Very thin active parts can be produced according to the invention. For example, at least one semiconductor layer may be less than about 10 microns thick. Of course, one or more semiconductor layers may be selected to emit light when electrically biased.

Another aspect of the present invention relates to a semiconductor device fabricated according to the above method. Specifically, the device may comprise a heat sink and a mounting substrate adjacent to the heat sink, the mounting substrate comprising at least one of metal or silicon. The device may also include a plurality of semiconductor layers disposed on the mounting substrate opposite the heat sink and defining at least one pn junction. These semiconductor layers may preferably comprise m-plane (10 1 0) oriented single crystal group III nitride layers. The device can also comprise only one contact arranged on the uppermost semiconductor layer opposite the mounting substrate. The Ill-nitride may comprise, for example, gallium nitride.

The device may also comprise an adhesive layer between the mounting substrate and the semiconductor layer. This adhesive layer may in turn contain at least one of nickel (Ni) and gold (Au). The bonding material to the mounting substrate may contain indium (In) or an indium-based low-melting alloy such as indium-silver or indium-gold. In addition, the mounting substrate may contain copper (Cu), silver (Ag), gold (Au), aluminum (Al), chromium (Cr), nickel (Ni), titanium (Ti), molybdenum (Mo), tungsten (W ), zirconium (Zr), platinum (Pt), palladium (Pd), silicon (Si). Of course, multiple semiconductor layers can emit light in response to an electrical bias applied to the metal substrate and heat sink.

Description of drawings

1-7 are schematic perspective views during fabrication of a device according to the present invention.

8-10 are schematic side views during fabrication of a device according to the invention.

11 and 12 are schematic perspective views during the manufacture of a device according to the present invention.

13 is a perspective view of an individual device after separation from adjacent devices on a wafer in accordance with the present invention.

Figure 14 is a schematic side view of the device shown in Figure 13 secured to a support.

FIG. 15 is a curve of reflection measurement data of a device according to the first embodiment of the present invention.

FIG. 16 is a graph of reflection measurement data of a device according to a second embodiment of the present invention.

FIG. 17 is a curve of reflection measurement data of a device according to a third embodiment of the present invention.

FIG. 18 is a curve of reflection measurement data of a device according to a fourth embodiment of the present invention.

Detailed ways

The present invention is described more fully hereinafter with reference to the accompanying drawings in which various preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like reference numbers denote all like elements, and main symbols are used to denote like elements in alternative embodiments.

The present invention relates to III-nitride compound semiconductor devices. This device includes light emitting devices and electronic devices. The light-emitting device can be tailored with the composition of the film to emit light in the range from yellowish all the way through green, blue, and finally into the ultraviolet. It is also possible to produce "white light" by means of appropriate combinations with light-emitting devices of other colors, or by adding phosphors to these devices.

The emission mode of such devices can be incoherent, like LEDs, or coherent, like LDs. Such electronic devices may also include high electron mobility transistors (HEMTs), heterojunction bipolar transistors (HBTs), Schottky, p-i-n, and metal-semiconductor-metal (MSM) optoelectronics, as known to those skilled in the art. Diodes etc. These devices can be ultrathin and detached from the original substrate. They can be bonded to metal or semiconductor substrates with high electrical and thermal conductivity. Efficient heat dissipation enhances device performance and enables the fabrication of large area devices.

A new method for the mass production of ultrathin GaN LEDs and LDs is described. Depending on the composition of the film, this technology enables the production of LEDs and LDs with emission wavelengths ranging from deep ultraviolet to green and beyond. This method enables the production of free-standing ultrathin epitaxial films without fixation to the original substrate, and offers great flexibility in chemical composition, including but not limited to simple binary systems of GaN and AlN, ternary systems of AlGaN and InGaN system, even AlInGaN quaternary system. This method also enables the fabrication of very large area LEDs that cannot be produced by conventional techniques. Large-area LEDs drastically reduce manufacturing costs and can produce higher brightness than conventional LEDs.

The production process may start with a polished (100) oriented LAO single crystal wafer 30 (FIG. 1). The surface of the wafer 30 is sufficiently cleaned. Then the LAO wafer 30 is placed in a not-shown MOCVD (metal organic chemical vapor deposition) reaction chamber, and heated to 700-1200° C., so as to grow GaN epitaxial film 32 (or have specific Al, In, Ga metal ratio AlGaN, InGaN, AlInGaN epitaxial film). But MOCVD is not the only method capable of growing GaN epitaxial films. Other available growth methods include MBE (Molecular Beam Epitaxy), ALE (Atomic Layer Epitaxy), HVPE (Hydride Vapor Phase Epitaxy), and the like.

The structure and composition of epitaxial film 32 will depend on the particular device being fabricated. An important feature is that the GaN epitaxial film 32 grown on the (100) LAO substrate 30 is located in the (10 1 0) or m-plane orientation, which is obviously different from that grown on any other known substrates including sapphire, SiC, GaAs, and Si. (0001) GaN film on a known substrate. LAO is the only substrate known to produce m-plane epitaxial films.

Here, first consider typical blue and green visible LEDs. A thin (less than 50 nm) low temperature buffer layer 31 of AlN, AlGaN, or InGaN may be first deposited on the LAO wafer 30 to help adhere the epitaxial film 32 . Although AlN is used as a buffer layer for growing GaN on sapphire, an AlGaN or InGaN layer may be preferably used as a buffer layer for the LAO substrate 30 . The reason is that it can provide the conductive substrate required for LED and LD devices. Also, AlN has the worst lattice match to the LAO substrate 30 , but is fully usable as the buffer layer 31 . Al _0.7 Ga _0.3 N has an accurate lattice match with LAO along the a-axis, while pure InGaN has the best lattice match with the c-axis.

In principle, any AlGaN composition can be used as a buffer layer. Al _0.3 Ga _0.7 N is probably the best compromise composition to obtain lattice matching. The deposition temperature of this buffer layer 31 can vary from 500°C to 1000°C. However, since the substrate 30 has a very good lattice match to the epitaxial layer 32, the deposition of the buffer layer 31 at a higher temperature (900° C.) is preferred. This is clearly different from other prior art techniques which typically require starting with a low temperature (550°C) buffer layer. Including growth on sapphire, GaAs, Si, SiC substrates.

After growing the buffer layer 31, the temperature may be raised to 950-1150°C in order to grow the first layer of GaN 32a n-doped by silicon. Thickness can vary from hundreds of nm to several microns. In the prior art, since the removal of the substrate 30 by mechanical grinding or laser ablation is destructive, thicker GaN is required to ensure that the remaining epitaxial film 32 will not be damaged during the substrate removal process. . According to the present invention, the process of cleaning LAO substrate 30 does not damage epitaxial film 32, as will be described in more detail below. Therefore, there is no reason to grow very thick undoped or n-doped GaN. A preferred thickness of n-doped layer 32a may be about 800 nm to 2 microns.

After the n-doped GaN layer 32a is completed, as shown in FIG. 2, the growth of the multiple quantum well structure 32b having alternating undoped InGaN thin layers 32b and GaN thin layers 32c can begin. The thickness of both the InGaN well 32b and the GaN barrier 32c of this quantum well structure can vary from 1 nm to 10 nm. The thickness of the well is preferably about 2nm, while the preferred thickness of the barrier is about 5nm. After growing the quantum wells, a Mg-doped p-type GaN layer 32d may be grown as a cap layer. The thickness of p-layer 32d can again range from a few hundred nm to a few microns. Thus, a basic p-n junction GaN diode structure is formed.

In order to form LDs, the thickness of the p layer 32d may be increased. This is because, as explained further below, it may be desirable to form an inverse mesa structure as opposed to a conventional structure.

After the epitaxial growth is completed, the LAO wafer 30 with the GaN epitaxial film 32 is taken out from the MOCVD chamber (FIG. 2). It can be placed in a metal evaporator to coat the entire top GaN surface with thin films of Ni (approximately 20nm) and gold (approximately 150nm) to form p-type ohmic contacts 34 (Fig. 3).

Then, as shown in FIG. 4, the metal-coated surface layer 34 of the LAO wafer 30 is bonded to a highly polished flat metal or silicon wafer base 36 capable of holding the entire LAO wafer, typically 2 inches in diameter. This metal or silicon substrate 34 serves as an electrical contact as well as a heat sink. There are a large number of metals suitable for this purpose, such as Cu, Ag, Au, Al, Cr, Ni, Ti, Mo, W, Zr, Pt, Pd.

Silicon is readily available and cheap, even though it is not technically considered a metal. The coefficient of linear thermal expansion (4.7×10 ⁻⁶ /K) is slightly smaller than that of GaN (5.6×10 ⁻⁶ /K), and the thermal conductivity of 80-150 W/m°K is also acceptable. As an adhesive substrate is an option. All of these metals can be used as substrates for LEDs with different engineering requirements due to their vastly different physical properties. The choice of metal substrate 36 depends on thermal and electrical conductivity, coefficient of thermal expansion, resistance to acid corrosion, and ductility of the metal and ease of bonding. Most metals have a much higher coefficient of thermal expansion, eg Al (23.5×10 ^-6 /K), Ag (19.1× ^{10 -6} /K), Cu (17.0× ^{10 -6} /K). Other metals have much more reasonable coefficients of thermal expansion, such as Mo (5.1 x 10 ^-6 /K), W (4.5 x ^{10 -6} /K), Zr (5.9 x ^{10 -6} /K). The rest are in between.

A large mismatch in thermal expansion can cause cracking of the GaN film 32 during any heating process such as forming a good ohmic contact 34 . In addition, it may also be desirable to consider metal bonding, corrosion resistance, and alloying properties between dissimilar metals.

Finally, it may also be desirable to consider the ductility (or molassity) of metals. Since it is generally desirable to use a very thin diamond saw to cut the GaN film 32 and metal substrate 36 into individual chips, it is best to avoid covering the saw blade with the cut metal. There are concrete steps that can minimize this potential problem. Furthermore, as known to those skilled in the art, the metal substrate 36 can be pre-woven in a manner that allows it to be easily divided into smaller chips of a specific size to simplify the LED or LD manufacturing process.

The pre-woven metal substrate 36 is aligned with the a-axis and c-axis of the LAO wafer 30 (which in turn is aligned with the c-axis and a-axis of GaN) so that when divided into smaller pieces, the GaN cleavage plane aligns with the metal Edge alignment of the substrate may be desirable.

The thickness of metal base 36 can vary from 50 microns to 500 microns. Perhaps the most desirable material for metal base 36 is Cu (copper) because Cu is highly thermally and electrically conductive, inexpensive and readily available. The problem with Cu, however, is that it is poorly resistant to acid corrosion, so special steps are required to seal the copper from contact with the acid during the corrosion process.

The next preferred choices might be Si (silicon), Ag (silver), and/or Mo (molybdenum). These three materials have very different properties, but all share the common property of being resistant to acids. Thus, procedures developed for one metal can be adapted for other metals. The difference is the metal bonding properties and ductility of the materials. For purposes of illustration, Ag has been chosen as the metal of substrate 36 . The same procedure can also be applied to Si or Mo as the base metal.

A sheet of Ag metal with a thickness of 100 micrometers was cut into disc shapes 36 with a diameter of 2 inches. The LAO wafer 30 with metallized GaN sides 34 was then thermally bonded face down to a circular Ag metal disc 36 with an In (Indium) alloy, resulting in the structure shown in FIG. 5 . Ag is the metal with the highest electrical and thermal conductivity (its resistivity at 20°C is 1.63 μΩcm, and its thermal conductivity is 429 W/m°k). Even though Ag has a relatively large thermal expansion coefficient (19.1×10 ⁻⁶ /K), the bonding temperature involved may be much lower to cope with this problem.

Both Si and Mo have significantly smaller thermal expansion coefficients than other metals (4.7 and 5.1×10 ^-6 /K, respectively), and are more comparable to those of GaN, but require higher thermal bonding temperatures, resulting in The overall effect of differential thermal expansion is comparable to that of Ag metal. In order to avoid subsequent peeling, the bonding of the Ag, Si, Mo metal substrate to the Ni-Au coated surface must be very good. Due to the different properties of metals, different bonding materials are used. For Ag metal substrates, the preferred bonding material is Indalloy ^R #3 (90In 10Ag). For Si substrates, the preferred bonding material is AuIn (gold indium). For Mo metal substrates, the preferred bonding material is AuGe (gold germanium).

After bonding the Ag metal substrate 36 to the GaN side 32 of the LAO wafer 30, the entire wafer is first placed on a grinder to grind away most of the LAO substrate and then soaked in warm hydrochloric acid (HCl) to dissolve and remove the remaining LAO substrate 30 (FIG. 6). In order to prevent the bonding metal from being corroded by corrosive acids, the edge of the wafer 30 can be glued with epoxy resin as a seal. While it is not difficult to prevent the metal edges from being etched by the acid, any pinholes or cracks in the GaN film 32 can cause difficulties during the etching process. In this case, one can rely entirely on physical grinding to clean the LAO substrate. Since the bonding between GaN and LAO is relatively weak, more than 90% of the LAO substrate can be effectively removed by mechanical grinding. Ag metal has been found to be very resistant to hydrochloric acid corrosion. It forms a thin AgCl coating on the surface that can be easily removed with nitric acid (HNO ₃ ). Preferred acid resistant metals with similar properties are Si and Mo. Other metals resistant to hydrochloric acid corrosion are W (tungsten), Au (gold), Pt (platinum).

After hydrochloric acid etching to remove the LAO substrate 30, only the GaN film 32 bonded to the Ag metal substrate 36 remains (FIG. 6). The top surface of GaN film 32 is n-type. Now depending on the type of final device to be fabricated, the entire block can be processed in the following different ways:

(1) Standard blue LED

To make a standard blue LED, the sheet shown in Figure 6 was washed and dried. An n-type ohmic contact pad is then formed on the GaN surface. Since only the top side can emit light, the patterned contact pads are made to minimize metal coverage and allow enough area to emit light. The top surface may be metal coated first with 20nm titanium and then with 150nm aluminum. Then, the surface is spin-coated with photoresist. Form the pattern of ohmic contact solder joints. Depending on the size and shape of the LED device, the geometry of the contact pads can be simple points, stripes, or meanders. The exposed metal is etched away and the photoresist is stripped to leave a pattern of solder joints.

Of course, lift-off techniques can be used by first coating the surface with photoresist 40 (FIG. 7). A pad pattern is formed on the photoresist 40 (FIG. 8). The top of the wafer is then coated with Ti and Al metal coatings to define portions 42a and 42b (FIG. 9). Stripping the photoresist 40 creates contact pads 42a (FIGS. 10 and 11).

The resulting devices will have excellent thermal conductivity, enabling large area devices (greater than 1 square millimeter). The final size and shape of the LED chip depends on the application. LED chips can be cut into any geometry such as strips, as long as the device can dissipate heat properly. The Ag metal backside was bonded to a glass sheet before being cut into chiplets. The dicing process only needs to make the kerf 44 deep into the wafer just enough to cut through the Ag metal layer into the glass sheet 45 (FIG. 11). The glass sheet 45 is used to clean the dicing saw blade and to deal with metal overlay issues.

For Si or Mo metal substrates 36, there is no metal coverage issue. It is therefore possible to use a stretchable tape instead of a glass sheet, as will be appreciated by those skilled in the art.

After the dicing is completed, the diced sheet 50 is washed to remove cutting dust and then dissolved in acetone to remove the chip from the glass sheet (FIG. 13). For Si or Mo metal-based devices, it is possible to stretch and separate the ribbons into individual chips. The finished chips can then be collected and mounted into the final device package in the same manner as conventional red LEDs. This creates ultra-thin blue LEDs. To achieve high brightness, effective heat sinking is provided with a heat sink 48 bonded by metal portion 44 as shown in the illustrated embodiment (FIG. 14). Lead wire 46 is also secured to upper contact 42a.

(2) High brightness white LED

To make high-brightness white _LEDs , one can use Ce-YAG or Eu- _SrAl2O4 or other known ceramic-coated phosphor reflectors at the back of blue LEDs, or on top of the n-doped GaN side A thick layer of n-doped ZnSe is deposited on it. Using phosphor reflectors to generate white light does not require any additional wafer processing steps. But for the coating layer of ZnSe as phosphor, an additional deposition process is used.

After cleaning the LAO substrate, the wafer was cleaned and dried, then placed in a ZnSe reactor to coat the surface with an n-doped ZnSe layer on top of an n-doped GaN layer. The ZnSe layer can absorb the blue light emitted by GaN and emit its own yellow light, which mixes with the blue color of GaN to provide white light.

The thickness of the ZnSe is controlled as needed to have the correct absorption and thus the correct white color. In this case, an n-side ohmic contact can be formed on top of the ZnSe film. The rest of the deposition process is very similar to that described in the previous sections. Subsequent steps for dicing the wafer and forming individual LEDs are similar to those in (1) above.

Ce-doped YAG or Eu _- doped _SrAl2O4 ceramic reflectors are insensitive to temperature, so that the state of white light does not change with respect to light intensity (or drive current). On the other hand, the emission of ZnSe is very sensitive to temperature. Redshifts with increasing temperature. Therefore, the state of white light also redshifts with the increase of intensity (or temperature). Since the device according to the present invention can have a very large highly thermally conductive metal base to dissipate heat, the temperature variation across the device is much smaller. As known to those skilled in the art, this will significantly reduce the color shift effect. Furthermore, applicants believe this device is the first combination of ZnSe-GaN nnnp devices.

(3)LD

This LD configuration is in contrast to conventional LDs with n-type GaN substrate and p-type GaN mesas. In this case, the device has a p-type GaN base and n-type GaN mesas. The basic manufacturing process is largely the same as described above. Unlike conventional LD designs, thick films are not required.

To prevent light leakage, conventional LD designs require a thick AlGaN cladding with high Al content to confine the light. In order to prevent the MQW (Multiple Quantum Well) structure from cracking, GaN/AlGaN MD-SLS (Modulated Doped Strained Layer Superlattice) layers are grown on both sides of the MQW. According to the invention, the entire top of the n-type GaN surface will be metallized in order to form an n-side ohmic contact.

The present invention replaces the use of MD-SLS for light confinement with metallized ohmic contact films on the p-side and n-side for light confinement. After coating the top of the n-type GaN surface with Ti and Al metals for ohmic contact, the surface was patterned with photoresist to mark the positions of the individual laser diodes. This ohmic contact pattern is aligned with the cleavage plane of the GaN film, making it possible to cleave the GaN film to form resonant cavities for laser applications.

RIE (Reactive Ion Etching) may be used to form the mesa structure. This etch will penetrate the p-layer of GaN to the metal substrate. The sides of the countertop will be wrapped with an absorbent material such as silicon dioxide to prevent reflections.

The wafer is then cut through the metal substrate into a supporting glass sheet according to the pattern produced by the RIE process. After washing to remove cutting dust, the glass piece is placed in a flux to dissolve the epoxy and release the LD chip. These chips were cleaned, dried, and then cleaved at both ends along the (0001) plane to create the resonant cavity.

To lower the lasing current threshold, the two cleaved GaN surfaces may require a highly reflective coating (composed of paired quarter-wave _TiO2 / _SiO2 multilayers). These chips can then be mounted to complete the laser diode.

The detailed process of producing visible light and white light LEDs and visible light LDs has been described so far. To produce UV LEDs and LDs, the general steps are largely the same as those for making visible light devices, except that the basic film composition is AlGaN instead of GaN. The increase of Al content will increase the band gap of the AlGaN film, but at the same time, the resistivity of the film will also increase.

Pure AlN is an insulator, so there is a limit to the maximum Al content before device functionality is hampered too much. This limit is usually set at about 50% of the Al content in the AlGaN film. Since the lattice constant of LAO is slightly smaller than that of GaN, it actually fits better with the AlGaN composition. To fabricate UV LEDs, after initially growing a thin (less than 50nm) AlGaN buffer layer at 900°C, an n-doped AlGaN is deposited at 1000-1200°C. Similar to visible light LEDs, the preferred thickness of the n-doped layer is also about 800 nm to 1 micron.

The multiple quantum well structure consists of alternating thin layers of GaN/AlGaN. The thickness of this quantum well structure is only a few nm per pair. A large built-in electric field (approximately 1 MV/cm) is known to exist due to spontaneous polarization and piezoelectric effects in conventional growth on sapphire and SiC with c-plane (0001) film orientation. This could lead to a redshift caused by the quantum confinement Stark effect. Since the films according to the invention are grown along the nonpolar m-plane (1010) direction, there is no such red shift under high intensity excitation.

After growing the quantum wells, Mg-doped p-type AlGaN is grown as a cap layer. The preferred thickness of this p-layer is also only a few hundred nm. This forms the basic p-n junction ultraviolet AlGaN diode structure.

After growing the p-n junction structure, the rest of the device manufacturing process is exactly the same as that of the visible light LED. The emission of UV light is through the n-doped GaN layer. There is very little blocking of emitted light due to the Ti-Al ohmic electrical contact pads. To make a UV LD, the steps are again the same except that the composition of the film is changed from GaN to AlGaN.

Compared to conventional LEDs and LDs currently fabricated on sapphire and SiC, the device design according to the present invention has presented many unique features and advantages as described below.

(1) An important feature of LEDs and LDs is the ultra-thin structure of the GaN film, without the need to fix the original substrate on it. The overall thickness of the device can be as thin as 1 micron or less. No other technology is currently considered capable of fabricating such thin free-standing GaN devices. The ultra-thin structure helps dissipate heat, especially when the device is bonded to a highly thermally conductive metal substrate.

(2) The emitted light is not blocked. Both the LED and LD designs of the present invention are flip-chip designs with a more transparent n-doped GaN side on top for direct light emission. Proper metallization on the back of the LED can further increase the reflectivity and thus the overall light output.

(3) The LED and LD consist of a very thin GaN film bonded on top of a highly thermally conductive metal substrate. There is excellent heat sinking at the base of the device, enabling it to be driven more strongly by higher currents than existing sapphire or even SiC-based LEDs and LDs.

(4) The LED and LD employ sufficient metal base electrical contact to the p-doped GaN layer. This significantly reduces the effect of low carrier concentration and low two-dimensional sheet current of the p-doped layer.

(5) Compared with GaN films on sapphire and SiC, good lattice matching with relatively low defect density enables devices to be driven by higher currents to produce higher brightness.

(6) Since the heat sink is on the entire substrate of the device, the size of the LED of the present invention can have a much larger light-emitting surface than that on existing sapphire or SiC. Since the entire metal substrate is an electrode, the flow of current is not a problem. The final size of the device is limited only by the thermal limitations of the metal substrate. Moreover, the shape of LEDs is no longer limited to square chips. Long strip LEDs can be made. Its length is limited only by the original substrate wafer diameter. This provides unique lighting that cannot be achieved with existing LEDs.

(7) Since there is no difficulty in making the device transparent to ultraviolet light by replacing the initial growth of the GaN layer with the initial growth of the AlGaN layer, the structure of the device is very suitable for ultraviolet LEDs and LDs. Moreover, since the membrane of the present invention is an m-membrane, it is non-piezoelectric, so there is no quantum-confined Stark effect. The emission wavelength of the device of the present invention will remain constant regardless of the power of the device.

(8) This structure provides a natural cleavage plane for the laser cavity.

(9) No ELOG (Epitaxial Lateral Overgrowth) or other complicated photolithography or etching processes are required. The manufacturing process of the whole device is much simpler. The LED has a conventional mounting design, identical to that of the red GaAs-based LED and LD, enabling the device to be fully integrated with the GaAs-based LED at chip level before packaging to form an LED group.

Produces GaN and AlGaN used to fabricate electronic devices such as high electron mobility transistors (HEMTs), heterojunction bipolar transistors (HBTs), Schottky, p-i-n, and metal-semiconductor-metal (MSM) photodiodes The basic steps of epitaxial film are basically the same as that of forming epitaxial film of similar composition for LED and LD. The only difference is the detailed order of the layers. Diodes only need two basic layers, p and n, and use quantum wells to control photon radiation. In the case of HBT or BJT (Bipolar Junction Transistor) devices, 3 layers of n-p-n, p-n-p, or other configuration are required. The design according to the invention is still able to provide a fully metal base for high heat dissipation, which must be followed for any high power application. Moreover, for MSM-structured devices, this process provides the simplest and most straightforward design.

Embodiments of the present invention can be divided into two specific steps. The first step is to grow GaN epitaxial film by MOCVD method. The second step is to fabricate GaN LED and LD devices from these epitaxial films.

(A) Growth of GaN epitaxial film:

In order to be able to make GaN LEDs and LDs, it is first necessary to have a high-quality GaN epitaxial film, and to make devices with an intermediate layer of a specific structure. The most basic requirement is that the film should be smooth, mirror-like, and free of cracks. Also, this film should be able to be fixed to the substrate without delamination to enable post-growth processing. All films were grown using an Aixtron 200 HTMOCVD system. Each round of growth produced only one 2 inch diameter wafer. Gas sources for the reactor include nitrogen (N ₂ ), ammonia (NH ₃ ), hydrogen (H ₂ ), silane (SiH ₄ ), trimethylgallium (TMG), trimethylaluminum (TMA), trimethylindium (TMIn), and Cp ₂ Mg.

It is well understood in the art that the growth of films of particular composition requires the flow of appropriate gas sources to achieve deposition. For example, the growth of AlN layers requires flowing ammonia and TMA to form the reaction. GaN growth requires flowing ammonia and TMG. Growth of InGaN quantum wells requires flowing ammonia, TMIn, and TMG. To achieve n-doping, flowing silane is required, while p-doping requires flowing _Cp2Mg . Accordingly, no detailed description of gas flow will be provided in the following specific examples of embodiments of the invention.

The gas flow rates and mixing ratios used to provide the optimum membrane composition vary from reactor to vendor. Even for reactors supplied by the same vendor, there is variation among different units.

Example 1:

LAO wafers were cleaned and placed in an Aixtron 200HT MOCVD reactor. The growth process follows standard GaN-on-sapphire growth steps. The substrate was first preheated to 1050°C for 10 minutes in a nitrogen atmosphere. Lower the temperature to 580 °C and grow an AlN low-temperature buffer layer with a thickness of 50 nm on the LAO wafer. Then, the temperature was raised to 950 °C and 800 nm of undoped GaN was grown on top of the AlN buffer layer. Reflection measurement results are shown in FIG. 15 . The state of the film was smooth, and there was no peeling.

But TEM (Transmission Electron Microscopy) showed very different results. The AlN layer is poorly crystallized and provides a growth nucleus for the GaN film on top of it. Since the preferred orientation of AlN nuclei is along the c-axis [0001] direction, as a result, the GaN film is a c-plane (0001) film rather than an m-plane (10 1 0) film. Therefore, there is no epitaxial relationship between the GaN film and the LAO substrate. This film exhibits a high defect density due to the low temperature AlN buffer layer.

Example 2:

New LAO wafers are cleaned and placed in an Aixtron 200HT MOCVD reactor. Following our method changed the growth steps. First, the step of preheating the substrate to 1050° C. for 10 minutes is eliminated. Instead, the wafer is directly heated to 900°C, and AlN deposition begins at this high temperature. After growing a 50 nm high temperature AlN buffer layer, the temperature was raised to 950 °C and an 800 nm n-doped GaN:Si layer was grown on top of the AlN layer. Reflectance measurement data ( FIG. 16 ) monitoring the smoothness of the film during growth showed a substantial improvement in film quality and was significantly different from that of Example 1 .

The film was specular and showed no peeling after cooling to room temperature. Silicon doping has no effect on the quality of the film. When observed under a microscope, the GaN film was very uniform, and no cracks were found in the film. This is consistent with the fact that the thermal expansion coefficient of GaN is smaller than that of LAO, so that the GaN film is always under tension during cooling.

TEM (Transmission Electron Microscopy) shows that the AlN layer is crystalline and very thin. We estimate that it may have alloyed with GaN at the interface. Due to the better crystallinity of the AlN buffer layer, the film is more uniform and has fewer defects.

Example 3:

Once the basic growth process of n-doped GaN:Si epitaxial film is established, the growth of GaN film with complete p-n junction and quantum well structure is carried out. New LAO wafers are cleaned and placed in an Aixtron 200HT MOCVD reactor. We used the growth procedure established in Example 2 to grow a fully structured GaN film. The wafer is directly heated to 900°C, and then a 50nm-thick AlN high-temperature buffer layer is deposited. After growing the AlN buffer layer, the temperature was raised to 950° C. in order to grow an 800 nm n-doped GaN:Si layer. Then, grow a quantum well structure consisting of two pairs of 10nm undoped GaN barriers and 5nm InGaN wells. A 10 nm AlGaN barrier layer was grown on top of the quantum well structure before growing a final 200 nm p-doped GaN:Mg cap layer.

Reflectance measurement data (FIG. 17) showed an excellent growth state. After the growth of the p-n junction and MQW structure is completed, the furnace temperature is lowered to 750°C for 40 minutes to thermally anneal and activate the p-doped GaN:Mg layer. After thermal annealing, the reactor was cooled to room temperature. Similar to Example 2, the GaN film on LAO is smooth and specular. No cracks were found in the finished film across the 2 inch wafer. This wafer can be used to make LED devices.

Example 4:

The above three embodiments illustrate the process of growing GaN films with complete structures for visible light LED and LD devices. This example will demonstrate that UV LED and LD devices can be fabricated. This means that an AlGaN film needs to be grown on LAO. The cell lattice size of AlN is smaller than that of GaN, a-axis = 3.112 angstroms, c-axis = 4.995 angstroms. The lattice constant is also smaller compared to the lattice size of LAO. The mismatch along the a-axis is -0.7%, and the mismatch along the c-axis is -3.5%. In fact, AlN has the worst lattice matching in the AlN-GaN solid solution composition range. Al is about 30% AlGaN, which has the best overall lattice match with LAO.

Therefore, to examine the ability to grow thick AlN films on LAO, we will provide the necessary information on the feasibility of growing AlGaN epitaxial films for UV LEDs and LDs. New LAO wafers are cleaned and placed in an Aixtron 200HT MOCVD reactor. First, the wafer is directly heated to 900°C, and then the AlN buffer layer is deposited at this temperature. After growing the 50 nm AlN buffer layer, the temperature was raised to 950° C., and the growth of the AlN film was continued at this temperature. The total finished AlN film is about 350nm.

Reflectance measurement data is shown in Figure 18, which is excellent. After cooling to room temperature, the AlN film is uniform and specular. When examined under a microscope, no visible cracks were found throughout the 2-inch AlN film. This demonstrates the growth of undoped AlN films. Similar to the case of GaN, it should be possible to grow AlGaN on LAO.

(B) Manufacture of GaN LED and LD devices:

After completing the growth of the complete p-n junction and quantum well structure epitaxial film as described in Example 3 of the above chapter, the LAO wafer with the GaN epitaxial film is taken out from the MOCVD reactor, and the LED device can be manufactured. The wafer was placed in a metal evaporator and the top of the GaN surface was coated first with about 20 nm thick Ni and then about 150 nm thick Au film to form an ohmic contact to the p-GaN layer.

Highly polished flat Ag metal sheets with a thickness of 100 μm were cut into 2-inch diameter discs. Then, the LAO wafer with the metallized GaN side was thermally bonded face down to the Ag metal disc by indium metal. During thermal bonding, the entire assembly is stressed with appropriate weights to ensure good physical contact after curing.

After the LAO wafer was firmly bonded to the Ag metal pad, epoxy was applied to the edge of the LAO wafer in contact with the Ag metal. This will seal the edges of the sheet metal during the subsequent acid etch process. Once the epoxy was cured, the entire wafer was immersed in warm 50% diluted hydrochloric acid (HCl) to dissolve and clean the LAO substrate. After the LAO substrate was etched away by HCl, the wafer was rinsed with dilute nitric acid in order to remove the AgCl on the Ag metal surface. Thus, only the GaN thin film bonded to the Ag metal substrate by the indium alloy remains. This GaN film is now flipped relative to the support wafer. The top surface of the GaN film is n-type.

The entire sheet is rinsed to remove acid, washed, and dried. The GaN film surface can then be used to form ohmic contact pads on the n-doped side. Here a lift-off technique is used to form the contact pads. The surface of the GaN film is spin-coated with photoresist. A pattern is formed for the ohmic contact pads. For simplicity, very large 100 micron dots are formed as contact pads. In an actual device, the size and shape of the electrical contact pads can be varied to suit needs.

Due to the excellent thermal conductivity of the device of the present invention, a large-area device (greater than 1 square millimeter) can be obtained. We make the center-to-center spacing of the individual contact pads of the pattern 1.5mm. Once the pattern is exposed to UV light, the unexposed photoresist is stripped to expose the pad areas. Then, n-type ohmic contact pads were formed by first coating 20 nm of Ti followed by 150 nm of Al metal. By stripping the photoresist together with the metal film on top of the photoresist, a Ti-Al metal contact pad for the n-doped side electrode remains on the GaN film.

The construction of the device structure is now complete. The backside of the wafer is taped with a stretchable tape and placed under a dicing machine to cut the wafer into the final chip size. This dicing process will cut through the GaN film layer and the Ag metal base layer, but not through the stretchable ribbon. This cut places the Ti-Al contact pad at the center of the chip. The cut sheet is washed to remove cut debris and stretched to separate the individual chips still on the tape. The finished chip will break free from the stretchable tape and can be mounted in the same way as regular red LEDs, resulting in ultra-thin blue LEDs.

The chip was tested with a 12V DC battery source. When the battery is electrically connected to the device, blue light is emitted. The implementation shown here is a minimal LED design without any high resolution and more sophisticated equipment. Many modifications and other embodiments will come to mind to those skilled in the art after reading the present disclosure and the related embodiments. Therefore, it is to be understood that the inventions are not to be limited to the particular embodiments disclosed and that modifications and other embodiments are intended to be included within the scope of the appended claims.

Claims (49)

1. A method of making at least one semiconductor device, comprising: providing a sacrificial growth substrate comprising lithium aluminate (LiAlO ₂ ); forming at least one Ill-nitride-containing semiconductor layer adjacent to the sacrificial growth substrate; securing a mounting substrate adjacent the at least one semiconductor layer opposite the sacrificial growth substrate; and Remove the sacrificial growth substrate. 2. The method according to claim 1, further comprising adding at least one contact to the surface of the at least one semiconductor layer opposite the mounting substrate. 3. The method of claim 2, further comprising singulating the mounting substrate and the at least one semiconductor layer into a plurality of individual semiconductor devices. 4. The method according to claim 3, further comprising bonding the mounting substrate of each individual semiconductor device to the heat sink. 5. The method of claim 4, wherein the heat sink comprises a copper (Cu) block. 6. The method of claim 1, wherein removing comprises mechanically grinding and wet etching the sacrificial growth substrate. 7. The method of claim 6, wherein the mounting substrate is wet corrosion resistant. 8. The method of claim 6, further comprising protecting at least a portion of the mounting substrate during the wet etching. 9. The method of claim 1, wherein the sacrificial growth substrate comprises single crystal _LiAlO2 . 10. The method of claim 1, wherein the at least one semiconductor layer comprises at least one single crystal gallium nitride (GaN) layer. 11. The method of claim 1, wherein securing the mounting substrate comprises: forming an adhesion layer on the at least one semiconductor layer; and The adhesive layer is bonded to the mounting substrate. 12. The method of claim 11, wherein the adhesive layer comprises at least one of nickel (Ni) and gold (Au). 13. The method according to claim 11, wherein the mounting substrate comprises copper (Cu), silver (Ag), gold (Au), aluminum (Al), chromium (Cr), nickel (Ni), titanium (Ti ), molybdenum (Mo), tungsten (W), zirconium (Zr), platinum (Pt), palladium (Pd), silicon (Si). 14. The method of claim 1, wherein forming at least one semiconductor layer comprises doping at least one semiconductor layer. 15. The method of claim 1, further comprising forming a buffer layer between the sacrificial growth substrate and the at least one semiconductor layer; and wherein removing the sacrificial growth substrate further comprises removing the buffer layer. 16. The method of claim 1, wherein the at least one semiconductor layer has an m-plane (10 1 0) orientation. 17. The method of claim 1, wherein the at least one semiconductor layer has a thickness of less than about 10 microns. 18. The method of claim 1, wherein the at least one semiconductor layer emits light when electrically biased. 19. A method of fabricating a plurality of semiconductor devices comprising: providing a sacrificial growth substrate comprising lithium aluminate (LiAlO ₂ ); forming at least one Ill-nitride-containing semiconductor layer adjacent to the sacrificial growth substrate; securing a mounting substrate adjacent the at least one semiconductor layer opposite the sacrificial growth substrate, the mounting substrate comprising at least one of metal and silicon; Using mechanical grinding and wet chemical etching to remove the sacrificial growth substrate; forming a plurality of contacts on the at least one semiconductor layer opposite the mounting substrate; and The mounting substrate and at least one semiconductor layer are separated into a plurality of individual semiconductor devices. 20. The method of claim 19, further comprising bonding the mounting substrate of each individual semiconductor device to the heat sink. 21. The method of claim 19, wherein the mounting substrate is wet corrosion resistant. 22. The method of claim 19, further comprising protecting at least a portion of the mounting substrate during the wet etching. 23. The method of claim 19, wherein the sacrificial growth substrate comprises single crystal _LiAlO2 . 24. The method of claim 19, wherein the at least one semiconductor layer comprises at least one single crystal gallium nitride (GaN) layer. 25. The method of claim 19, wherein securing the mounting substrate comprises: forming an adhesion layer on the at least one semiconductor layer; and The adhesive layer is bonded to the mounting substrate. 26. The method of claim 19, wherein forming at least one semiconductor layer comprises doping the at least one semiconductor layer. 27. The method of claim 19, further comprising forming a buffer layer between the sacrificial growth substrate and the at least one semiconductor layer; and wherein removing the sacrificial growth substrate further comprises removing the buffer layer. 28. The method of claim 19, wherein the at least one semiconductor layer has an m-plane (10 1 0) orientation. 29. The method of claim 1, wherein the at least one semiconductor layer emits light when electrically biased. 30. A method of making at least one semiconductor device, comprising: providing a sacrificial growth substrate comprising single crystal lithium aluminate (LiAlO ₂ ); forming at least one semiconductor layer comprising a Group III nitride having an m-plane (10 1 0) orientation adjacent to the sacrificial growth substrate; securing a mounting substrate adjacent the at least one semiconductor layer opposite the sacrificial growth substrate, the mounting substrate comprising at least one of metal and silicon; and Remove the sacrificial growth substrate. 31. The method according to claim 30, further comprising: adding at least one contact to the surface of the at least one semiconductor layer opposite to the mounting substrate; and separating the mounting substrate and the at least one semiconductor layer into a plurality of individual semiconductor devices; and The mounting substrates of the respective individual semiconductor devices are bonded to the heat sink. 32. The method of claim 31, wherein removing comprises mechanically grinding and wet etching the sacrificial growth substrate; and wherein the mounting substrate is resistant to wet etching. 33. The method of claim 31, wherein removing comprises mechanically grinding and wet etching the sacrificial growth substrate; and further comprising protecting at least a portion of the mounting substrate during the wet etching. 34. The method of claim 31, wherein the at least one semiconductor layer comprises at least one single crystal gallium nitride (GaN) layer. 35. The method of claim 31 , wherein securing the mounting substrate comprises: forming an adhesion layer on the at least one semiconductor layer; and The adhesive layer is bonded to the mounting substrate. 36. The method of claim 31, further comprising forming a buffer layer between the sacrificial growth substrate and the at least one semiconductor layer; and, wherein removing the sacrificial growth substrate further includes removing the buffer layer. 37. The method of claim 31, wherein the at least one semiconductor layer emits light when electrically biased. 38. A semiconductor device comprising: heat sink; a mounting substrate adjacent to the heat sink, the mounting substrate comprising at least one of metal and silicon; a plurality of semiconductor layers on the mounting substrate opposite to the heat sink and defining at least one pn junction, the semiconductor layers comprising a single crystal III-nitride layer having an m-plane (10 1 0) orientation; and At least one contact on an uppermost one of the semiconductor layers opposite to the mounting substrate. 39. The semiconductor device according to claim 38, wherein said group III nitride comprises gallium nitride. 40. The semiconductor device according to claim 38, further comprising an adhesive layer between said mounting substrate and said semiconductor layer. 41. The semiconductor device according to claim 40, wherein the adhesive layer contains at least one of nickel (Ni) and gold (Au). 42. The semiconductor device according to claim 38, wherein said heat sink contains copper (Cu). 43. The semiconductor device according to claim 38, wherein said mounting substrate contains copper (Cu), silver (Ag), gold (Au), aluminum (Al), chromium (Cr), nickel (Ni), titanium ( At least one of Ti), molybdenum (Mo), tungsten (W), zirconium (Zr), platinum (Pt), palladium (Pd), and silicon (Si). 44. The semiconductor device of claim 38, wherein the semiconductor layer emits light in response to an electrical bias applied to the metal substrate and the heat sink. 45. A light emitting semiconductor device comprising: heat sink; a metal substrate adjacent to the heat sink; a plurality of semiconductor layers on said metal substrate opposite said heat sink and defining at least one pn junction, said semiconductor layers comprising a nitride layer of monocrystalline gallium nitride having an m-plane (10 1 0) orientation; as well as at least one contact on the uppermost one of the semiconductor layers opposite the metal substrate; The semiconductor layer emits light in response to an electrical bias applied to the substrate and the at least one contact. 46. The light emitting semiconductor device according to claim 45, further comprising an adhesive layer between said metal substrate and said semiconductor layer. 47. The light emitting semiconductor device according to claim 46, wherein the adhesive layer contains at least one of nickel (Ni) and gold (Au). 48. The light emitting semiconductor device according to claim 45, wherein the heat sink comprises copper (Cu). 49. The light emitting semiconductor device according to claim 45, wherein the metal substrate comprises copper (Cu), silver (Ag), gold (Au), aluminum (Al), chromium (Cr), nickel (Ni), titanium (Ti), molybdenum (Mo), tungsten (W), zirconium (Zr), platinum (Pt), palladium (Pd), and silicon (Si).

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