CN1764346B - Method capable of reducing source impedance of printed circuit board - Google Patents
Method capable of reducing source impedance of printed circuit board Download PDFInfo
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- CN1764346B CN1764346B CN 200410086158 CN200410086158A CN1764346B CN 1764346 B CN1764346 B CN 1764346B CN 200410086158 CN200410086158 CN 200410086158 CN 200410086158 A CN200410086158 A CN 200410086158A CN 1764346 B CN1764346 B CN 1764346B
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Abstract
本发明提供一种可以降低一印刷电路板的电源阻抗的方法，其包括以下步骤：(a)于该印刷电路板的第一层中，形成一第一金属板；(b)于该印刷电路板的第二层中，形成一第二金属板及一第三金属板；(c)于该印刷电路板的第一层与第二层间，形成一介电层，以隔绝该第一层与该第二层；以及(d)将该第二金属板电连接至与该第一及第三金属板实质上相异的电位。
The present invention provides a method for reducing the power supply impedance of a printed circuit board, which includes the following steps: (a) forming a first metal plate in the first layer of the printed circuit board; (b) forming a first metal plate in the printed circuit board In the second layer of the printed circuit board, a second metal plate and a third metal plate are formed; (c) between the first layer and the second layer of the printed circuit board, a dielectric layer is formed to isolate the first layer to the second layer; and (d) electrically connecting the second metal plate to a substantially different electrical potential than the first and third metal plates.
Description
Technical field
The present invention relates to a kind of method of source impedance of reduction by one printed circuit board (PCB), particularly a kind of borrowing is provided with another ground end to reduce the method for source impedance in the bus plane of printed circuit board (PCB).
Background technology
Printed circuit board (PCB) (Printed Circuit Board) is the support of circuit element and each assembly in the electronic product, provides the circuit of circuit element and each assembly to link.Along with the fast development of electronic circuit technology, the density of printed circuit board (PCB) is increasingly high.Therefore, the ability of the good bad influence anti-interference (Anti-interference) of PCB design is very big.Generally speaking, even the circuit diagram design is correct, but PCB design was not at that time, can produce adverse influence to the usefulness and the reliability of electronic product yet.For instance, for the motherboard in the computer,, may cause the problem that signal transmits between each device, even reduce the main frame life-span if the motherboard design was not at that time.
Please refer to Fig. 1, Fig. 1 is the cross-sectional view of traditional computer motherboard 10.Because the relation of cost factor, the legacy hosts plate structure is four layers of cabling mostly.Therefore, among Fig. 1, motherboard 10 includes routing layer 12,14,16,18 and dielectric layer 20,22,24.Routing layer 12,14,16,18 is arranged bus plane (Power Plane), ground plane (Ground Plane), circuit layer (Circuit Plane) etc. in order to borrow modes such as shop copper etching.Dielectric layer 20,22,24 is generally the FR4 material in order to isolated adjacent routing layer; Wherein the thickness of dielectric layer 20,22,24 is respectively 4.4,48,4.4 mil (mil; 1000 mils=1 English inch); Only if therefore bus plane is arranged in routing layer 12, ground plane is arranged in routing layer 14, or bus plane is arranged in routing layer 18, ground plane is arranged in routing layer 16, otherwise do not have coupling (Coupling) closely between bus plane and ground plane.Its main cause be because between the routing layer 14 of traditional computer motherboard 10 and the routing layer 16 at a distance of 48 mils (as shown in Figure 1), and 18 of 14 of routing layer 12 and routing layers and routing layer 16 and routing layers, separated 4.4 mils.Yet in order to take into account usefulness, cost and convenient production, the circuit layer of traditional computer motherboard 10 is usually placed in routing layer 12,18, and bus plane and ground plane are arranged in routing layer 14,16, that is the outermost of motherboard 10 two-layer be circuit layer.But, when the bus plane of motherboard 10 and ground plane are arranged in second and third routing layer 14,16, mean that bus plane and ground plane are located at FR4 dielectric layer 22 two ends the thickest in the motherboard 10.With the angle of power supply supply, ground plane is the return path (Return Path) of bus plane.That is to say that the electric current of bus plane output can be considered and finally flow to ground plane and form a loop.Therefore, both spacings are near more, and the path sectional area in loop is more little, and (Loop Inductance) is low more for loop inductance; And lower loop inductance can make the source impedance in a certain frequency range reduce.
About the influence of the medium thickness between bus plane and ground plane, ask for an interview following explanation to input impedance.Please refer to Fig. 2 and Fig. 3, Fig. 2 is the sketch map of two layer printed circuit boards 30.Printed circuit board (PCB) 30 include a bus plane 32, a ground plane 34 and between bus plane 32 and ground plane 34 and material be the dielectric layer 36 of FR4.Corresponding input impedance was to the sketch map of frequency when Fig. 3 was 5,10,20 mils for dielectric layer 36 thickness among Fig. 2.Among Fig. 3, the longitudinal axis is input impedance, and transverse axis is a frequency; Wherein, the input impedance when solid line representes that dielectric layer 36 thickness are 5 mils is to frequency diagram, and the input impedance when dotted line representes that dielectric layer 36 thickness are 10 mils is to frequency diagram, and the input impedance of dotted line when representing that dielectric layer 36 thickness are 20 mils is to frequency diagram.Can know that by Fig. 3 for same frequency, thicker dielectric layer 36 can make printed circuit board (PCB) 30 have higher input impedance.Secondly, (impedance of 1000MHz～5000MHz) cause main zero point increases the frequency range that has limited printed circuit board (PCB) 30 to the part of Fig. 3 medium-high frequency fast.Because when dielectric layer 36 thickness were thicker, printed circuit board (PCB) 30 had higher input impedance, it is narrower to make printed circuit board (PCB) 30 keep low-impedance frequency range, and narrower frequency range can limit the application of some high-frequency circuit.That is to say that the increase along with the medium thickness of 34 of bus plane 32 and ground planes causes the input impedance of printed circuit board (PCB) 30 to increase, and increases the frequency range that reduces with input impedance.In addition, can get via calculating, when frequency was 100MHz, dielectric layer 36 thickness of printed circuit board (PCB) 30 were that the corresponding equivalent inductance of 5,10,20 mils is about 2.85,4.52 respectively, 7.99nH.Therefore, thick more dielectric layer 36 its equivalent inductances are also big more, and in that (frequency＜1GHz), printed circuit board (PCB) 30 can be considered resistance and connects with inductance than low-frequency range.Because when low frequency, the difference of resistance is very little, so inductance stool and urine becomes for this reason in the band limits the main factor of decision impedance height.In brief, bus plane 32 is near more with ground plane 34 distances, and equivalent inductance is low more, frequency range is wide more, input impedance is also low more.
Yet; As previously mentioned; In order to take into account usefulness, cost and convenient production; The bus plane of legacy hosts plate and ground plane often are located at FR4 dielectric layer two ends the thickest in the motherboard (being among Fig. 1, routing layer 14,16), so that the input impedance of power supply can't effectively reduce and limited the usefulness of legacy hosts plate at high frequency frequency range place.
Summary of the invention
Therefore, the main purpose of the present invention method that promptly is the source impedance that can reduce a printed circuit board (PCB) is provided is to improve the shortcoming of conventional art.
The present invention discloses a kind of method that can reduce the source impedance of a printed circuit board (PCB), and it may further comprise the steps: (a) in the ground floor of this printed circuit board (PCB), form one first metallic plate; (b) in the second layer of this printed circuit board (PCB), form one second metallic plate and one the 3rd metallic plate; (c) between the ground floor and the second layer of this printed circuit board (PCB), form a dielectric layer, with isolated this ground floor and this second layer; And (d) this second metallic plate is electrically connected to and the different in fact current potential of this first and the 3rd metallic plate.
Description of drawings
Fig. 1 is the cross-sectional view of traditional computer motherboard.
Fig. 2 is the sketch map of one or two layer printed circuit board.
Fig. 3 is the sketch map of the corresponding input impedance of the printed circuit board (PCB) of Fig. 2 to frequency.
Fig. 4 reduces the schematic flow sheet of the source impedance of a printed circuit board (PCB) for the present invention.
5th, 6,7,8,9,13,14 figure are the sketch map according to the motherboard of the flow scheme design of Fig. 4.
Figure 10 one does not contain the sketch map of the motherboard of any grounding plate in bus plane.
11st, 15 figure are the sketch map of input impedance to frequency.
12nd, 16 figure are input impedance, loop inductance, loop resistance and D.C. resistance sorting table.
Symbol description
10,50,60,70,80,90,100,110,120 motherboards
12,14,16,18,32,34 routing layers
20,22,24,36 dielectric layers
30 printed circuit board (PCB)s
40 flow processs
402,404,406,408,410,412 steps
52,56,62,66,68,72,76,82,86,88,89,92,86,97,98,99,102,112,116,118,119,122,126,127,128,129 grounding plates
54,64,74,84,94,104,114,124 power supply metallic plates
Embodiment
Please refer to Fig. 4, Fig. 4 reduces the sketch map of flow process 40 of the source impedance of a printed circuit board (PCB) for the present invention.Flow process 40 includes following steps:
Step 402: beginning;
Step 404: in the ground plane of a printed circuit board (PCB), form one first metallic plate;
Step 406: in the bus plane of this printed circuit board (PCB), form one second metallic plate and one the 3rd metallic plate;
Step 408: between the ground plane and bus plane of this printed circuit board (PCB), form a dielectric layer;
Step 410: second metallic plate is electrically connected to a power end, and first metallic plate and the 3rd metallic plate are electrically connected to a ground end;
Step 412: finish.
The metallic plate that the electric current of exporting owing to the metallic plate in the bus plane of printed circuit board (PCB) can be considered in the ground plane that finally flow to printed circuit board (PCB) forms a loop, so the loop inductance of printed circuit board (PCB) can be represented it by following loop inductance equation: L
LOOP=L
PWR+ L
GND-2L
M(wherein, L
LOOPBe loop inductance, L
PWRBe the self-induction value of bus plane, L
GNDBe the self-induction value of ground plane, and L
MMutual inductance value for bus plane and ground plane).By loop inductance equation (L
LOOP=L
PWR+ L
GND-2L
M) can know that if will reduce loop inductance, a kind of mode is to reduce the self-induction value L of bus plane
PWRSelf-induction value L with ground plane
GND, a kind of in addition mode is the mutual inductance value L that increases bus plane and ground plane
MYet the former will change the sectional area size of the bus plane Width of printed circuit board (PCB), can increase cost on the one hand, on the other hand, generally speaking, does not also have excess area can supply expansion on the printed circuit board (PCB), difficult the implementation.Therefore, flow process 40 of the present invention is primarily aimed at the bus plane of increase printed circuit board (PCB) and the mutual inductance (L between the ground plane
M), reach the purpose that reduces loop inductance.
According to flow process 40, the present invention is in the ground plane of a printed circuit board (PCB), forms one first metallic plate, to borrow first metallic plate one ground end is provided in printed circuit board (PCB).And in the bus plane of this printed circuit board (PCB), form one second metallic plate and one the 3rd metallic plate respectively, by second metallic plate one power end is provided, and another ground end is provided in the bus plane of printed circuit board (PCB) by the 3rd metallic plate.In addition, flow process 40 of the present invention between the ground plane and bus plane of printed circuit board (PCB), forms a dielectric layer in addition, with isolated ground plane and bus plane.In brief, flow process 40 of the present invention is in the bus plane of printed circuit board (PCB), and other is provided with a metallic plate and holds so that another ground to be provided, thereby reduces the distance between bus plane and ground plane.That is to say,, relatively, reduced ground plane and power supply layer coupling (Coupling) degree because the dielectric layer of printed circuit board (PCB) is in order to isolated ground plane and bus plane.Flow process 40 of the present invention is in the bus plane of printed circuit board (PCB), and other forms the metallic plate that can hold with providing, to increase the coupling between ground plane and bus plane.For instance; Generally speaking; In order to take into account usefulness, cost and convenient production; The bus plane of one motherboard and ground plane often are located at FR4 dielectric layer two ends the thickest in the motherboard (at a distance of 48 mils), and flow process of the present invention 40 can be in the bus plane of motherboard, and other is provided with a metallic plate so that another ground end to be provided.
Please refer to Fig. 5, Fig. 5 is the sketch map according to an embodiment motherboard 50 of flow process 40 designs of the present invention.Motherboard 50 includes one first grounding plate 52, a power supply metallic plate 54 and one second grounding plate 56.For the sake of clarity, Fig. 5 only draws the relative position sketch map of first grounding plate 52, power supply metallic plate 54 and second grounding plate 56.In Fig. 5, first grounding plate 52 is provided in a side of in the ground plane (not being painted among Fig. 5) of motherboard 50, and its length and width is respectively 4000 mils and 480 mils.The power supply metallic plate 54 and second grounding plate 56 are located in the bus plane (not being painted among Fig. 5) of motherboard 50; The length and width of power supply metallic plate 54 is respectively 4000 mils and 315 mils, and the length and width of second grounding plate 56 is respectively 4000 mils and 150 mils, and power supply metallic plate 54 and second grounding plate 56 are at a distance of 15 mils.First grounding plate 52 and second grounding plate 56 are electrically connected respectively to a ground end, and power supply metallic plate 54 is electrically connected to a power end.Because first grounding plate 52 and power supply metallic plate 54 and 56 of second grounding plates are that a thickness is the dielectric layer (not being painted among Fig. 5) of 48 mils; Therefore compared to distance 48 mils of 52 of power supply metallic plate 54 and first grounding plates; The distance of second grounding plate 56 and power supply metallic plate 54 is 15 mils only, can provide power supply metallic plate 54 higher degree of coupling (because close together).That is to say, can effectively reduce the loop inductance of bus plane and ground plane according to the motherboard 50 of flow process 40 designs of the present invention.
In addition, among Fig. 5, the present invention can whenever run through the dielectric layer punching at a distance from a predeterminable range in addition on second grounding plate 56 of motherboard 50, with second grounding plate 56 and first grounding plate 52 of being electrically connected.Thus, second grounding plate 56 and first grounding plate 52 are all samely to be held, the degree of coupling between the power end that therefore improving power supply metallic plate 54 provides is held with ground.
Because second grounding plate 56 can effectively improve the degree of coupling between power end and ground end, so the present invention can form another grounding plate in addition to improve the degree of coupling between power end and ground end in the bus plane of motherboard 50.Please continue with reference to figure 6, Fig. 6 is the sketch map according to an embodiment motherboard 60 of flow process 40 designs of the present invention.Motherboard 60 includes one first grounding plate 62, a power supply metallic plate 64, one second grounding plate 66 and one the 3rd grounding plate 68.For the sake of clarity, Fig. 6 only draws the relative position sketch map of first grounding plate 62, power supply metallic plate 64, second grounding plate 66 and the 3rd grounding plate 68.In Fig. 6, first grounding plate 62 is provided in a side of in the ground plane (not being painted among Fig. 6) of motherboard 60, and its length and width is respectively 4000 mils and 480 mils.Power supply metallic plate 64, second grounding plate 66 and the 3rd grounding plate 68 are located in the bus plane (not being painted among Fig. 6) of motherboard 60; The length and width of power supply metallic plate 64 is respectively 4000 mils and 150 mils, and the length and width of second and third grounding plate 66 is 4000 mils and 150 mils, and power supply metallic plate 64 and second and third grounding plate 66,68 are respectively at a distance of 15 mils.First grounding plate 62 and power supply metallic plate 64, second grounding plate 66 and 68 of the 3rd grounding plates are that a thickness is the dielectric layer (not being painted among Fig. 6) of 48 mils.First grounding plate 62, second grounding plate 66 and the 3rd grounding plate 68 are electrically connected respectively to a ground end, and power supply metallic plate 64 is electrically connected to a power end.
The motherboard 60 of comparison diagram 6 can find with the motherboard 50 of Fig. 5, motherboard 60 than motherboard more than 50 the 3rd grounding plate 68.As previously mentioned; Because second grounding plate 66 and the 3rd grounding plate 68 are near apart from power supply metallic plate 64 than first grounding plate 62 apart from power supply metallic plate 64, therefore second grounding plate 66 and the 3rd grounding plate 68 can provide power supply metallic plate 64 higher degree of coupling.In addition, only second grounding plate 56 is set compared to the motherboard 50 of Fig. 5, and the motherboard 60 of Fig. 6 is provided with second grounding plate 66 and the 3rd grounding plate 68 respectively in the both sides of power supply metallic plate 64 in a side of power supply metallic plate 54.Therefore, the motherboard 60 of Fig. 6 has more improved the degree of coupling between power end and ground end compared to the motherboard 50 of Fig. 5.Certainly, the present invention needs on second grounding plate 66 of motherboard 60 and the 3rd grounding plate 68, whenever to run through the dielectric layer punching at a distance from a predeterminable range, so that second grounding plate 66 and the 3rd grounding plate 68 are electrically connected to first grounding plate 62.Thus, second grounding plate 66, the 3rd grounding plate 68 and first grounding plate 62 could keep holding samely.
In brief, flow process 40 of the present invention is in the bus plane of a printed circuit board (PCB) (like motherboard), and a ground end is set in addition, has therefore increased the degree of coupling between power end and ground end, and then has lowered the loop inductance value, reaches the purpose that reduces power supply input impedance.
Except aforesaid in the bus plane of a motherboard one or both sides of power supply metallic plate, increase grounding plate to provide outside the ground end.Flow process 40 according to the present invention, in addition can be within the power supply metallic plate of a motherboard, and increase by a grounding plate of end with being linked to.Please refer to Fig. 7, Fig. 7 is the sketch map according to an embodiment motherboard 70 of flow process 40 designs of the present invention.Motherboard 70 includes one first grounding plate 72, a power supply metallic plate 74 and one second grounding plate 76.For the sake of clarity, Fig. 7 only draws the relative position sketch map of first grounding plate 72, power supply metallic plate 74 and second grounding plate 76.In Fig. 7, first grounding plate 72 is provided in a side of in the ground plane (not being painted among Fig. 7) of motherboard 70, and its length and width is respectively 4000 mils and 480 mils.The power supply metallic plate 74 and second grounding plate 76 are located in the bus plane (not being painted among Fig. 7) of motherboard 50; Power supply metallic plate 74 peripheral length and widths are respectively 4000 mils and 480 mils, and it is the cutting of 30 mils that a width is arranged in it.And the width of second grounding plate 76 is 10 mils, is located at not contact in the cutting of power supply metallic plate 74 or be electrically connected to power supply metallic plate 74.That is to say that in the bus plane of motherboard 70, power supply metallic plate 74 includes a cutting, in this cutting, promptly be provided with second grounding plate 76.Therefore, when making motherboard 70, can be on the copper of the bus plane shop of motherboard 70 etching one ring-type rectangle to form the power supply metallic plate 74 and second grounding plate 76 simultaneously.And on second grounding plate 76, whenever run through the dielectric layer punching, with second grounding plate 76 and first grounding plate 72 of being electrically connected at a distance from a predeterminable range.Thus, second grounding plate 76 and first grounding plate 72 are all samely and hold.As previously mentioned; Because first grounding plate 72 and 74 of power supply metallic plates are that a thickness is the dielectric layer (not being painted among Fig. 7) of 48 mils; Therefore compare distance 48 mils 72 of power supply metallic plate 74 and first grounding plates; The distance of second grounding plate 76 and power supply metallic plate 74 is 10 mils only, can provide power supply metallic plate 74 higher degree of coupling (close together).
The motherboard 70 of comparison diagram 7 can know that with the motherboard 50 of Fig. 5 motherboard 70 is that second grounding plate that is arranged on power supply metallic plate one side in the bus plane with motherboard 50 is moved within the power supply metallic plate by the power supply metallic plate.In some applications, need bigger power supply metallic plate with the bus plane of minimizing motherboard and the D.C. resistance between ground plane, thereby stable operation is provided.At this moment, the collocation method of motherboard 70 that can adopt Fig. 7 reaches the purpose that reduces loop inductance with in limited area, and then the stable of system kept in the input impedance that reduces power supply.
When motherboard has above-mentioned misgivings (need bigger power supply metallic plate), flow process 40 according to the present invention, in addition can be with motherboard 60 appropriate the combining to reach better effect of motherboard 70 with Fig. 6 of Fig. 7.Please refer to Fig. 8, Fig. 8 is the sketch map according to an embodiment motherboard 80 of flow process 40 designs of the present invention.Motherboard 80 includes one first grounding plate 82, a power supply metallic plate 84, one second grounding plate 86, one the 3rd grounding plate 88 and one the 4th grounding plate 89.For the sake of clarity, Fig. 8 only draws the relative position sketch map of first grounding plate 82, power supply metallic plate 84, second grounding plate 86, the 3rd grounding plate 88 and the 4th grounding plate 89.In Fig. 8, first grounding plate 82 is provided in a side of in the ground plane (not being painted among Fig. 8) of motherboard 80, and its length and width is respectively 4000 mils and 480 mils.Power supply metallic plate 84, second grounding plate 86 and the 3rd grounding plate 88 and the 4th grounding plate 89 are located in the bus plane (not being painted among Fig. 8) of motherboard 80.As the configuration of the motherboard 60 of Fig. 6, the motherboard 80 of Fig. 8 comprises second grounding plate 86, the 3rd grounding plate 88 in both sides.In addition, as the motherboard 70 of Fig. 7, other is provided with strip the 4th grounding plate 89 in the central authorities of the power supply metallic plate 84 of motherboard 80.Therefore, compared to the motherboard 60 of Fig. 6 or the motherboard 70 of Fig. 7, the motherboard 80 of Fig. 8 more can provide power supply metallic plate 84 higher degree of coupling.
Further, can certainly in the power supply metallic plate 84 of Fig. 8 motherboard 80, add a strip grounding plate again.Please refer to Fig. 9, Fig. 9 is the sketch map according to a preferred embodiment motherboard 90 of flow process 40 designs of the present invention.Motherboard 90 includes one first grounding plate 92, a power supply metallic plate 94, one second grounding plate 96, one the 3rd grounding plate 97, one the 4th grounding plate 98 and one the 5th grounding plate 99.Comparison diagram 8 and Fig. 9 can find, the motherboard 90 of Fig. 9 and the motherboard 80 of Fig. 8 different be Fig. 9 motherboard 90 power supply metallic plate 94 internal ratio Fig. 8 motherboard 80 power supply metallic plate more than 84 strip the 5th grounding plate 99.Therefore, more can improve degree of coupling.
The effect of improving for more above-mentioned each motherboard input impedance please refer to following explanation.Please earlier with reference to Figure 10, Figure 10 one does not contain the sketch map of the motherboard 100 of any grounding plate in bus plane.Motherboard 100 includes a grounding plate 102 and a power supply metallic plate 104.Grounding plate 102 is provided in a side of in the ground plane of motherboard 100, and its length and width is 4000 mils and 480 mils; And power supply metallic plate 104 is provided in a side of in the bus plane of motherboard 100, and its length and width is 4000 mils and 150 mils.For asking the reliability in when test, the below relatively power supply input impedance between motherboard 100,60,80,90 (please refer to the 6th, 8,9,10 figure).Please refer to Figure 11, Figure 11 is the sketch map of the input impedance of motherboard 100,60,80,90 to frequency.In Figure 11, the longitudinal axis is input impedance, and transverse axis is a frequency; Wherein, solid line, dotted line, dotted line, imaginary point line represent motherboard 100,60,80,90 respectively input impedance to frequency diagram.Therefore, can be known by Figure 11 that for same frequency, motherboard 100 has the highest input impedance, motherboard 60 takes second place, and motherboard 80 takes second place again, and motherboard 90 minimums.That is to say that when comprising more grounding plate in the bus plane of motherboard, motherboard has lower input impedance, therefore increased frequency range, and then made system more stable.Moreover, please continue with reference to Figure 12, Figure 12 is each motherboard (different frequency) input impedance, loop inductance, loop resistance and the D.C. resistance sorting table of Figure 11.Can know by the sorting table of Figure 12 and to learn that at frequency 1MHz, 10MHz, 100MHz, along with the increase of grounding plate (by motherboard 100 to motherboard 90), input impedance is just low more, makes loop inductance also low more.For example; At frequency 100MHz; Motherboard 100,60,80,90 corresponding input impedance are 15.253,11.292,0.943,0.824, and corresponding loop inductance LLOOP (100MHz) is about 24.276nH, 17.872nH, 15.204nH, 13.079nH respectively.Yet, owing in bus plane, insert grounding plate, can let the effective width of script bus plane conducting electric current narrow down (reduction of conducting sectional area), can cause the resistance value of D.C. resistance RDC, loop AC resistance RAC (Loop) to increase.Therefore; In Figure 12; Motherboard 100,60,80,90 D.C. resistance RDC are respectively 0.0781,0.0812,0.0913,0.1073, and are that corresponding loop AC resistance RAC (Loop) of 100MHz is respectively 0.0173,0.0159,0.0189,0.0238 in frequency.That is to say that along with the increase of grounding plate makes the conducting area reduce, big supreme, the resistance value of D.C. resistance RDC, loop AC resistance RAC (Loop) also can be along with increase.
Therefore, if can increase the conducting area, keep the degree of coupling between power end and ground end simultaneously, it is lower just can to design an equivalent circuit inductance, but resistance is unlikely to increase too many structure.About this point, can utilize middle grounding plate that inserts of attenuating power supply metallic plate and the spacing between the power supply metallic plate to improve.For example, please refer to the 13rd, 14 figure.13rd, 14 figure are the embodiment motherboard 110,120 of 5mils with the distance attenuating of the grounding plate in the power supply metallic plate in the motherboard 90 of the motherboard 80 of Fig. 8 and Fig. 9 and power supply metallic plate respectively.In Figure 13, motherboard 110 includes one first grounding plate 112, a power supply metallic plate 114, one second grounding plate 116, one the 3rd grounding plate 118 and one the 4th grounding plate 119.Comparison diagram 8 can be known with Figure 13; The 4th grounding plate 119 in the power supply metallic plate 114 of motherboard 110 is 5 mils with the distance of power supply metallic plate 114; Also lack than 10 mils among Fig. 8, therefore can reduce the resistance value of D.C. resistance RDC, loop AC resistance RAC (Loop).In like manner, in Figure 14, motherboard 120 includes one first grounding plate 122, a power supply metallic plate 124, one second grounding plate 126, one the 3rd grounding plate 127, one the 4th grounding plate 128 and one the 5th grounding plate 129.Comparison diagram 9 and Figure 14 can know; Fourth, fifth grounding plate 128,129 in the power supply metallic plate 124 of motherboard 120 and the distance of power supply metallic plate 124 are 5 mils; Also lack than 10 mils among Fig. 9, therefore can reduce the resistance value of D.C. resistance RDC, loop AC resistance RAC (Loop).Please continue with reference to Figure 15, Figure 15 is for being the sketch map of the input impedance of motherboard 80,110,90,120 to frequency.In Figure 15, the longitudinal axis is input impedance, and transverse axis is a frequency; Wherein, solid line, dotted line, dotted line, imaginary point line represent motherboard 80,110,90,120 respectively input impedance to frequency diagram.
Please continue with reference to Figure 16, Figure 16 is each motherboard (different frequency) input impedance, loop inductance, loop resistance and the D.C. resistance sorting table of Figure 15.Can know that by Figure 16 for same frequency, motherboard 110 has input impedance, loop inductance and the D.C. resistance low than motherboard 80.That is to say, change 5 mils into by distance with fourth, fifth grounding plate 88,89 and power supply metallic plate 84 in the motherboard 80 after, except effective minimizing input impedance, more can reduce D.C. resistance.In like manner, motherboard 120 has input impedance, loop inductance, loop resistance and the D.C. resistance low than motherboard 90.As previously mentioned, along with the increase of grounding plate makes the conducting area reduce, the resistance value of D.C. resistance RDC, loop AC resistance RAC (Loop) can be along with increase.Yet, borrow to reduce the distance between grounding plate and power supply metallic plate, can effectively reduce resistance value and input impedance, the loop inductance of D.C. resistance RDC, loop AC resistance RAC (Loop).Thus, can improve degree of coupling, increase frequency range and stiffness of system.
In sum; Flow process 40 of the present invention is in the bus plane of a printed circuit board (PCB) (like motherboard), and one or more grounding plate is set in addition, so that degree of coupling higher between bus plane and ground plane to be provided; Thereby reduce input impedance, increase frequency range, so that more stable system to be provided.
The above is merely preferred embodiment of the present invention, and is all according to equalization variation and modification that the present invention did, all should belong to covering scope of the present invention.
Claims (10)
1. method that can reduce the source impedance of a printed circuit board (PCB) may further comprise the steps:
(a) in the ground floor of this printed circuit board (PCB), form one first metallic plate;
(b) in the second layer of this printed circuit board (PCB), form one second metallic plate and one the 3rd metallic plate;
(c) between the ground floor and the second layer of this printed circuit board (PCB), form a dielectric layer, with isolated this ground floor and this second layer; And
(d) this second metallic plate is electrically connected to and the different current potential of this first and the 3rd metallic plate.
2. the method for claim 1, wherein step (b) be in the second layer of this printed circuit board (PCB) with respect to a side of this second metallic plate, form the 3rd metallic plate.
3. method as claimed in claim 2 wherein is included on the 3rd metallic plate in addition, and is every at a distance from a predeterminable range, runs through this dielectric layer to be electrically connected to this first metallic plate with hole knockout.
4. the method for claim 1, wherein step (b) is in the second layer of this printed circuit board (PCB), form this second metallic plate after, on this second metallic plate, form one first cutting again, and in this first cutting, form the 3rd metallic plate.
5. method as claimed in claim 4 wherein is included on the 3rd metallic plate in addition, and is every at a distance from a predeterminable range, runs through this dielectric layer to be electrically connected to this first metallic plate with hole knockout.
6. the method for claim 1 wherein comprises step (e) in addition, in the second layer of this printed circuit board (PCB), forms one the 4th metallic plate, and the 4th metallic plate is electrically connected to and the identical current potential of this first and the 3rd metallic plate.
7. method as claimed in claim 6, wherein step (e) be in the second layer of this printed circuit board (PCB) with respect to a side of the 3rd metallic plate, form the 4th metallic plate.
8. method as claimed in claim 7 wherein is included on the 4th metallic plate in addition, and is every at a distance from a predeterminable range, runs through this dielectric layer to be electrically connected to this first metallic plate with hole knockout.
9. method as claimed in claim 6, wherein step (e) is in the second layer of this printed circuit board (PCB), form this second metallic plate after, on this second metallic plate, form one second cutting again, and in this second cutting, form the 3rd metallic plate.
10. method as claimed in claim 9 wherein is included on the 4th metallic plate in addition, and is every at a distance from a predeterminable range, runs through this dielectric layer to be electrically connected to this first metallic plate with hole knockout.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410086158 CN1764346B (en) | 2004-10-19 | 2004-10-19 | Method capable of reducing source impedance of printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200410086158 CN1764346B (en) | 2004-10-19 | 2004-10-19 | Method capable of reducing source impedance of printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1764346A CN1764346A (en) | 2006-04-26 |
| CN1764346B true CN1764346B (en) | 2012-05-30 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200410086158 Expired - Fee Related CN1764346B (en) | 2004-10-19 | 2004-10-19 | Method capable of reducing source impedance of printed circuit board |
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| Country | Link |
|---|---|
| CN (1) | CN1764346B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6215373B1 (en) * | 1998-05-19 | 2001-04-10 | Sun Microsystems, Inc. | Method for edge termination of parallel conductive planes including estimating the characteristic impedance of the structure |
| CN1326312A (en) * | 2000-05-31 | 2001-12-12 | 株式会社东芝 | Printed circuit board and electronic device therewith |
| US6777620B1 (en) * | 1999-12-02 | 2004-08-17 | Nec Corporation | Circuit board |
-
2004
- 2004-10-19 CN CN 200410086158 patent/CN1764346B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6215373B1 (en) * | 1998-05-19 | 2001-04-10 | Sun Microsystems, Inc. | Method for edge termination of parallel conductive planes including estimating the characteristic impedance of the structure |
| US6777620B1 (en) * | 1999-12-02 | 2004-08-17 | Nec Corporation | Circuit board |
| CN1326312A (en) * | 2000-05-31 | 2001-12-12 | 株式会社东芝 | Printed circuit board and electronic device therewith |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1764346A (en) | 2006-04-26 |
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