CN1609831A - Special equipment and configuration of equipment function - Google Patents
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Abstract
The present invention discloses system and method of configuring equipment requiring bus business and equipment functions. The main processing system can execute citing course to configure one or several pieces of equipment connected to data bus. During citing course, the main processing system hides at least one of the equipment and equipment functions. The hidden equipment or equipment function may be configured as the bus business for entity independent from the main processing system to start.
Description
Related application
The U.S. Patent application 09/472,502 that theme disclosed herein relates on Dec 27th, 1999 to be submitted to, and the U.S. Patent application of submitting to September 14 calendar year 2001 09/954,129.
Technical field
Theme disclosed herein relates to the communication of each equipment room in the processing platform.Particularly, relate to communication at this disclosed theme according to each equipment room of data bus protocol.
Background technology
Processing platform generally includes the host process system that is connected to one or more peripherals by data bus.For the networking client provides in the processing platform of data storage resource, a kind of like this peripherals can communicate with the redundant arrays of inexpensive disks (RAID) of cheapness, so that healthy and strong data-storage system to be provided.A kind of like this processing platform generally includes I/O (I/O) processor that is connected to the host process system by data bus.This I/O processor provides the I/O passage of data storage resource to control visit to storage medium through one or more to the networking client subsequently.
Be used for providing the I/O passage of the visit of data storage resource can comprise the I/O equipment of the data bus of connection processing platform.A kind of data bus of even now can make host processing system communicate with such one I/O equipment that is connected data bus, but some function of entire I/O equipment or I/O equipment has been hidden in control to host processing system to the I/O processor of the visit of I/O passage.This makes the I/O processor carry out exclusive control to equipment and the functions of the equipments hidden.
Description of drawings
Below with reference to the following drawings unrestricted and non exhaustive embodiment of the present invention is described, wherein, unless otherwise indicated, otherwise similar Reference numeral is represented similar parts in whole accompanying drawings.
Fig. 1 has shown the synoptic diagram of the processing platform of the embodiment of the invention;
Fig. 2 has shown the synoptic diagram of the processing platform of another embodiment of the present invention;
Fig. 3 illustrates the process flow diagram that disposes the processing of a concealing device or functions of the equipments according to the embodiment of Fig. 1 or processing platform shown in Figure 2;
Fig. 4 is the synoptic diagram of form that illustrates the configuration title of Processing Example shown in Figure 3.
Embodiment
In this instructions, " embodiment " or " embodiment " are meant in conjunction with the described certain features of this embodiment, structure, feature and are comprised in the one embodiment of the invention at least.Therefore, occur everywhere phrase " in one embodiment " or " embodiment " at this instructions differs to establish a capital and refers to same embodiment.In addition, certain features, structure or feature can be incorporated among one or more embodiment.
" machine readable " instruction described here relates to can be by one or more machine perceptions to carry out the expression formula of one or more logical operations.For example, machine readable instructions can comprise and can be explained so that one or more data objects are carried out a plurality of instructions of one or more operations by the compiler of processor.Yet this is an example of machine readable instructions, and the embodiment of the invention is not limited to this on the one hand.
" storage medium " described here relates to that can keep can be by the media of the expression formula of one or more machine perceptions.For example, machine readable medium can comprise one or more memory devices of storage machine readable instructions or data.Such memory device comprises storage medium, for example light, magnetic or semiconductor storage media.Yet this is an example of machine readable medium, and the embodiment of the invention is not limited to this on the one hand.
" logical circuit " described here relates to the structure of carrying out one or more logical operation.For example, logical circuit can comprise the circuit that one or more output signals are provided according to one or more input signals.Such circuit can comprise a finite state machine that receives the numeral input and numeral output is provided, and perhaps responds the circuit that one or more analog input signals provide one or more simulation outputs.Such circuit can be provided in special IC (ASIC) or the field programmable gate array (FPGA).In addition, logical circuit can comprise machine readable instructions, and this instruction is stored in and carries out in the combined storage medium of the treatment circuit of this machine readable instructions.Yet these just can provide the example of the structure of logical circuit, and the embodiment of the invention is not limited to this on the one hand.
" disposal system " described here relates to the combination of the hardware and software resource of finishing calculation task." host process system " relates to can be used for the disposal system of communicating by letter with " peripherals ".For example, peripherals can be handled to the application in the host process system provides input or receives its output.Yet these are the example of disposal system, host process system and peripherals, and the embodiment of the invention is not limited to this on the one hand.
" data bus " described here relates to the circuit in equipment room transmission data.For example, data bus can transmit data between host process system and peripherals.In addition, data bus can also transmit data between two peripherals.Data bus can be according to the peripheral component interconnect (pci) local bus specification on March 29th, 2002, and Rev2.3 (below be referred to as the PCI local bus specification) or PCI-X2.0 protocol specification (below be referred to as the PCI-X2.0 protocol specification) form.As an alternative, also can form data bus with by " root assembly (root complex) " connections " end points " equipment and host process system, described " root assembly " is (below be referred to as " PCI expresses standard ") that the PCI by on July 16th, 2002 expresses that the PCI expression environment described in the fundamental norms Rev.1.0 provides.Also can form data bus to be used to the equipment of joining two endpoints.Yet these are the example of data bus, and the embodiment of the invention is not limited to this on the one hand." bus transaction " described here relates to the interaction between the equipment that connects by data bus structure, and one of them equipment sends the data that are addressed to miscellaneous equipment via data bus structure.Yet these are the example of bus transaction, and the embodiment of the invention is not limited to this on the one hand.
Data bus can be connected to one or more equipment of locating with " data-interface " of the address correlation of data bus.Such data interface can comprise a physical connection that equipment is connected to data bus.In addition, data-interface can define physics signaling format and address, so that communicate with associate device in bus transaction.Yet these are the example of the data-interface of data bus and equipment room, and the embodiment of the invention is not limited to this on the one hand.
" bridge " described here relates to an equipment that is connected between the data bus, and this equipment transmits data being connected to a bus and being connected between the equipment of another bus.According to an embodiment, bridge can be connected between two buses, is used for transmitting data between peripherals and processing resource.Yet the embodiment of the invention is not limited to this on the one hand, also can use other application of bridge.In addition, bridge can define " first " data bus of bridging being received the host process system, and definition " second " data bus relative with the host process system.A kind of like this bridge described here can form to the disclosed peripheral component interconnect (pci) of PCI bridge construction standard Rev.1.1 (below be referred to as PCI to PCI bridge gauge model) according to the PCI on Dec 18th, 1998.Yet the embodiment of the invention is not limited to this on the one hand, also can use other technology to utilize bus, bridge or bus configuration.
" functions of the equipments " described here relate to the entity with device association, and this equipment is connected with data bus at the data-interface place.Data bus can be communicated by letter with functions of the equipments by the message that transmits via data-interface.In addition, many functions of the equipments can be associated with individual equipment, data bus can be communicated through transmission and any certain apparatus functions of the data-interface between equipment and the data bus by signal and data, and be addressed to certain apparatus functions.Yet these are the example of functions of the equipments, and the embodiment of the invention is not limited to this on the one hand.
" bus enumeration " described here relates to and comprises Resources allocation so that processing or the process that communicates with the equipment that is connected data bus.For example, the disposal system that connects data bus can be carried out bus enumeration and handle, and with the equipment on the identification data bus and any functions of the equipments of being provided by the equipment of sign, and the allocation process resource is so that communicate with the equipment and the functions of the equipments of sign.A kind of like this bus enumeration is handled can comprise the functions of the equipments of attempting to enumerate individual equipment or this equipment.Yet this is the example that bus enumeration is handled, and the embodiment of the invention is not limited to this on the one hand.
" configuration transaction " described here relates to the affairs that take place in the bus enumeration treatment progress that distributes the resource that communicates with equipment that is identified or functions of the equipments.For being connected to equipment and the functions of the equipments to the pci bus described in the PCI bridge gauge model as PCI, for example, enumeration process can be carried out type 0 configuration transaction, and with the equipment and the functions of the equipments of sign connection data bus, and Resources allocation is so that communicate with the equipment or the functions of the equipments that are identified.In addition, enumeration process can be carried out the Class1 configuration transaction, connect the equipment and the functions of the equipments of second data bus with sign, this second data bus is positioned at PCI (and Resources allocation so that with communicated by marking equipment or functions of the equipments) after the described bridge of chapter 3 of PCI bridge gauge model.Yet these are the example of configuration transaction, and the embodiment of the invention is not limited to this on the one hand.
" configuring request " described here relates to event in configuration transaction.For example, configuring request can comprise the bus transaction to the target device addressing, with identity to this environment inquiry equipment, and the perhaps identity of the functions of the equipments of target device.Can in attempting to enumerate the configuration transaction of target device or functions of the equipments, start a kind of like this configuring request.For the data bus and the equipment that form to PCI bridge gauge model according to PCI, for example, configuring request can comprise the bus transaction that is used to start type 0 configuring request that is addressed to the equipment that connects data bus, perhaps be used for starting the bus transaction of the Class1 configuring request that is addressed to the equipment that connects second data bus (for example, after the bridge of data bus).
Configuring request can comprise the configuration read request that is addressed to target device.Respond a kind of like this configuration read request, target device can provide information, as comprises the configuration title of the information of the functions of the equipments that are used for marking equipment or equipment.As an alternative, configuring request can comprise that also the configuration that is addressed to target device writes request.Respond a kind of like this configuration and write request, information can be write in one or more registers of the configuration title related with target device.Yet these are the example of configuring request, and the embodiment of the invention is not limited to this on the one hand.
Can " hide " equipment that connects data bus to enumeration process, perhaps connect one or more functions of the equipments of a kind of like this equipment of data bus, make enumeration process avoid Resources allocation and communicate with equipment or the functions of the equipments hidden.For example, can forbid or avoid finishing by enumeration process system start-up and be the configuration transaction of target with the functions of the equipments of equipment and an equipment, thereby to enumeration process system vanishing target equipment or functions of the equipments.Yet just how to an example of enumeration process system concealing device or functions of the equipments, the embodiment of the invention is not limited to this on the one hand for this.
" I/O passage " described here relates to a kind of like this entity, passes this entity, data can be sent to external system or receive data from external system.For example, the I/O passage can be included in data bus with communicate by letter or memory device between send the peripherals or the functions of the equipments of data.Yet this is the example of I/O passage, and the embodiment of the invention is not limited to this on the one hand.
In a word, the embodiment of the invention relates to the equipment of configuration requirement (claim) bus transaction or the system and method for functions of the equipments.The host process system can carry out the enumeration process of the equipment that is used to dispose one or more connection data buss.Can be during enumeration process at least one of host process system concealing device and functions of the equipments.Equipment that is hidden or functions of the equipments can be configured to require to be independent of the bus transaction request that host process systematically starts by entity.
Fig. 1 has shown the synoptic diagram of processing platform 10 according to an embodiment of the invention.The host-processor 12 that is connected to system storage 28 by core logic circuit 26 can provide the host process system to come to provide the host for operating system and application program.I/O (I/O) processor 14 can be connected to host process system and one or more peripherals 16.This I/O processor 14 can provide the host for operating system and application program, thereby by the visit of peripherals 16 controls to I/O passage 20.
According to data bus protocol, data bus 24 can make I/O processor 14 and host process system communication, and data bus 18 makes I/O processor 14 communicate by letter with peripherals 16.This I/O processor 14 comprises an internal bridge that data bus 24 is defined as first bus 24 and data bus 18 is defined as second bus.According to an embodiment, first and second buses 24 and 18 can be according to such as being formed by the pci data bus structure of PCI special interest group in disclosed PCI local bus specification on March 29th, 2002 (below be referred to as " PCI local bus specification ") Rev.2.3 record.Yet, the bus-structured example that this just can be utilized by the data bus of transmission data between equipment, but the embodiment of the invention is not limited to this on the one hand.In addition, internal bridge can form to PCI bridge gauge model according to PCI, yet how this just is implemented in the example that forms the bridge of first and second data buss in the processing platform, and the embodiment of the invention is not limited to this on the one hand.
Fig. 2 has shown the synoptic diagram according to the processing platform that comprises peripherals 116 100 of an alternate embodiment of the present invention.Peripherals 116 can comprise one or more functions of the equipments of communicating by letter with I/O passage 120.Different with the peripherals 16 among Fig. 1 embodiment, peripherals 116 does not rely on intervention bridge (interveningbridge) and is directly connected to I/O processor 114 and core logic circuit 126 by data bus 124.So, data bus 124 can make the host process system that comprises host-processor 112, system storage 128 and core logic circuit 126 can enumerate the host process system, thereby does not rely on the functions of the equipments that the intervention bridge that is connected between data bus 124 and the peripherals 116 just can be enumerated peripherals 116 or peripherals 116.
Host- processor 12 or 112 can comprise any common CPU (central processing unit) (CPU), such as the Pentium that is sold by Intel company
, Xeon
, or Itanium
Processor.Core logic circuit 26 or 126 can comprise any one of some board chip set, comprise the storage control hub of for example controlling for the visit of system storage (the E7500 MCH that sells such as Intel company) (MCH), and the main control system disposal system is controlled hub (ICH) with the I/O that communicates by letter between one or more peripherals (such as the 82801CAICH that is sold by Intel company).Yet, the CPU that this just can use in the host process system and the example of core logic circuit, the embodiment of the invention is not limited by this respect.I/O processor 14 can comprise memory I/O processor, such as the 80303 or 80310 I/O processors of being sold by Intel company.I/O processor 114 can comprise storage I/O processor, as 80303, the 80310 or 80321 I/O processors of being sold by Intel company.Yet this is the example of I/O processor, and the embodiment of the invention is not limited to this on the one hand.
In an illustrated embodiment, peripherals 16 or 116 can comprise an interface, and the change of the small computer system interface (SCSI) that this interface can be set up according to national information technical standard (NCITS) council realizes by I/ O passage 20 and 120 communicate by letter.Yet this is how peripherals promote the example that communicates with a plurality of I/O passages and other interfaces according to different-format, and these forms are such as being Fibre Channel, SSA, IBA, serial ATA, Serial Attached SCSI (SAS) (SAS) or Ethernet.I/ O passage 20 or 120 can be used for directly or communicate via any one of switch ground and some I/O equipment, and these I/O equipment are such as being storage system, communication port, server, client computer or other storage system such as the Redundant Array of Independent Disks (not shown).A kind of like this RAID system can comprise memory device, as magnetic storage disk or other mass data storage medium.
In other embodiments, the I/O processor can be connected to host process system as " end points " equipment via " root assembly ", provides above-mentioned " root assembly " in the PCI expression environment of the pci express fundamental norms Rev.1.0 on July 16th, 2002 (below be referred to as " PCI expresses standard ") record.For example, the I/O processor can be connected to the downstream port of " switch ", communicates by letter with the peripherals of other downstream port that is connected switch simultaneously.As selection, the I/O processor can be connected to peripherals by the data bus according to PCI local bus specification or PCI-X2.0 protocol specification formation.In another embodiment, the I/O processor can connect the upstream port of second switch, so that communicate with the peripherals of the downstream port that is connected to second switch.Yet, thereby how be the I/O processor to connect expresses the embodiment that the host process system in the environment communicates by letter with peripherals with PCI for these, and the embodiment of the invention is not limited to this on the one hand.
Embodiment according to Fig. 1 and Fig. 2, (for example can carry out enumeration process, by host-processor among Fig. 1 embodiment 12 or I/O processor 4, perhaps host-processor 112 among Fig. 2 embodiment or I/O processor 114) dispose the resource that communicates with one or more device, described one or more device is connected with the apparatus function of data bus or this device.I/O processor (for example, I/O processor 14 or 114) can comprise a logical circuit, so that the performed enumeration process of host process system is hidden one or more devices that are connected with data bus.In addition, the I/O processor can be hidden the specific installation function of peripherals to such enumeration process, and other that allows peripherals simultaneously not concealing device is configured by hiding process.
Connect among the embodiment of pci bus at equipment, for example, the I/O processor can by " IDSEL " signal on the control data interface (referring to, for example PCI local bus specification 3.2.2.3.4 and 3.2.2.3.5 save) thus stop host process system configuration resource in enumeration process, to communicate with peripherals, and this data-interface connects data bus and peripherals.This logical circuit of controlling idsel signal for concealing device can be realized with the form of for example I/O processor or discrete logic, as submit and transfer the U.S. Patent application 09/472 of Intel company on Dec 27th, 1999,502 record, this application is quoted as a reference.For example, the I/O processor can comprise and is used to declare that optional pci signal " TMS " enters the logical circuit of peripherals (for example, peripheral 16 or 116) with the idsel signal on the forbidden data interface.Yet this is the example how first disposal system forbids second disposal system equipment on the configuration data bus in enumeration process, and the embodiment of the invention is not limited to this on the one hand.
According to an embodiment, peripherals can comprise more than one functions of the equipments (for example, control is for the different functions of the equipments of the visit of relevant I/ O passage 20 or 120).The I/O processor can also comprise the logical circuit (allowing the host process system configuration to be used for the resource that communicates with remaining not concealing device function) of one or more functions of the equipments of concealing device.Be connected among the embodiment of pci bus at peripherals, for example, use the U.S. Patent application 09/954 of people of submitting to September 14 calendar year 2001 of assigning as Intel company, 129 disclosed technology, the I/O processor can be hidden each functions of the equipments to the host process system, and described technology is comprised in this as a reference.
According to an embodiment, the I/O processor can dispose equipment that is hidden or functions of the equipments, systematically communicates with the I/O processor so that be independent of host process.In one embodiment, the host process system can carry out first enumeration process, to dispose all peripherals of not hiding and arbitrary functions of the equipments of not hiding.The I/O processor can be carried out second enumeration process, and to dispose any equipment that is hidden or functions of the equipments, equipment that this is hidden or functions of the equipments are independent of the host process system and the I/O processor communicates.
Fig. 3 has shown the process flow diagram according to the logic on the I/O processor (for example, I/O processor 14 or 114) that is used to dispose the equipment that is hidden and functions of the equipments of an embodiment.In this illustrated embodiment, the I/O processor can dispose equipment and the functions of the equipments that are hidden, so that communicate according to data bus protocol of being put down in writing as the PCI local bus specification and I/O processor.For example, the I/O processor can dispose the storer that the equipment that is hidden or functions of the equipments put down in writing with response as PCI local bus specification the 3rd chapter and reads or memory writer command.For the equipment or the functions of the equipments response sort memory that are hidden are read or memory writer command, the I/O processor disposes the equipment or the functions of the equipments that are hidden by initialization local drive and Resources allocation (for example memory address range of indication in base register (BAR)).
At square frame 202, the I/O processor can determine to distribute to the equipment that is hidden or the memory addressing resource of functions of the equipments.The I/O processor (for example can be carried out firmware, in response to reseting event), described firmware comprises that the information and quantizing of configuration address of information, marking equipment or the functions of the equipments of each equipment that (or local retrieval) sign will be hidden or functions of the equipments will distribute to the information of the memory addressing resource of equipment or functions of the equipments.This memory addressing resource that will distribute to hiding equipment or functions of the equipments can comprise the scope of storage address, the scope definition of this storage address will read with storer by the storer that equipment or functions of the equipments propose and write request.
As described below, at square frame 212, the I/O processor can start enumeration process, so that configuration is hidden after by the initial enumeration process of host process system control equipment or functions of the equipments.The alternate example of the configuration address of equipment of determining from firmware information to be hidden or functions of the equipments, the I/O processor can (for example scan by the initial bus of actuating equipment on data bus, use configuration read request), before enumeration process, to receive configuration address by the control of host process system.The I/O processor is associated device id information (from the configuration title that is scanned equipment) and the device id information of programming (being the equipment that is hidden or the information of functions of the equipments) subsequently in I/O processor firmware, with the equipment determining to be hidden or the configuration address of functions of the equipments.
During the enumeration process that the host process system carries out, the host process system can attempt to be addressed to by transmission the configuration read request of the configuration address of equipment and enumerate each equipment (perhaps each function of this equipment) that connects data bus.At square frame 204, the I/O processor can (for example come concealing device or functions of the equipments (shown in square frame 202) by forbidding responding from the equipment that is addressed to of host process system or the configuration read request of functions of the equipments, of U.S. Patent application 09/472,502 and 09/954,129).
At square frame 206, the I/O processor can respond the configuration read request that is addressed to the I/O processor, structure will offer the host process system as the defined configuration title of PCI local bus specification the 6th chapter.The configuration title can be formatted, as shown in Figure 4.Particularly, the I/O processor can be provided with BAR in the configuration title, will distribute to I/O processor and the memory addressing resource of distributing to each equipment that is hidden and functions of the equipments with indication.For example, the I/O processor can be provided with BAR in the configuration title, so that the single scope of the storage address that (from the host process system) request will distribute between I/O processor, the equipment that is hidden and functions of the equipments.As selection, the I/O processor can be provided with BAR in the title in configuration, will distribute to request the I/O processor storage address first scope and will be allocated in second scope of one or more equipment that are hidden and the storage address between the functions of the equipments.In another embodiment, the I/O processor can be provided with BAR on the title in configuration, will distribute to request the I/O processor storage address scope and will distribute to the additional range of the storage address of each equipment hidden or functions of the equipments.Yet how these just are provided with the configuration title so that request will be dispensed on the example of the memory addressing resource between a plurality of entities, and the embodiment of the invention is not limited to this on the one hand.
At square frame 208, the I/O processor can respond the configuration read request from host process system enumeration process by the configuration title (as forming at square frame 206) that provides the indication with BAR will distribute to the memory address range of I/O processor and equipment that is hidden or functions of the equipments.After bus transaction is read in configuration, the host process system can start configuration and write affairs, so that with configuration title that the I/O processor is associated in BAR is set, I/O processor and the equipment that is hidden or the memory address range of functions of the equipments are distributed in indication, as described in the 6.2.5 joint of PCI local bus specification.
At square frame 210, the configuration that the I/O processor can receive from host process system enumeration process writes request, so that in the configuration title of I/O processor BAR is set.The reception that configuration is write request is responded, and these BAR can be configured to define the particular memory address scope that the host process system has distributed to the I/O processor.So these BAR can reflect that defined will be by the memory address range of the bus transaction of I/O processor requirement, and the memory address range that has defined the bus transaction that will require by the equipment that is hidden or functions of the equipments.
At square frame 212, the I/O processor is carried out enumeration process and is disposed equipment and the functions of the equipments that are hidden, and systematically communicates with the I/O processor so that be independent of host process.The I/O processor can start configuration read request (before the enumeration process that the host process system is controlled or afterwards) to each equipment that is hidden or functions of the equipments.After the configuration read request of response from equipment that is hidden or functions of the equipments, the I/O processor can: 1) initialization driver, be used for and the communicating by letter of equipment that is hidden or device driver so that on the I/O processor, carry out, with 2) start configuration and write bus transaction, so that to equipment that is hidden or functions of the equipments allocate memory address realm.This configuration that is addressed to the equipment that is hidden or functions of the equipments writes bus transaction and can in being associated with the configuration title of equipment or functions of the equipments the BAR register be set, and is assigned to the equipment that is hidden or the memory address range of functions of the equipments so that define according to the explanation of PCI local bus specification 6.2.5 joint.
The memory address range of distributing to the equipment that is hidden or functions of the equipments can be included in square frame 210 is given the I/O processor from the host process system assignment memory address range.For example, the memory address range of distributing to the equipment that is hidden or functions of the equipments from the subclass of the storage address of the second memory address realm of distributing to the I/O processor (for example can comprise, the first memory address of distributing to the I/O processor will dispose the I/O processor with host process system communication, and the second memory address realm then is dispensed between the equipment or functions of the equipments that is hidden).As selection, the memory address range of distributing to the equipment that is hidden or functions of the equipments can comprise distribute to the I/O processor whole address (for example, except memory address range is used for each equipment or functions of the equipments that is hidden, also memory address range is distributed to the I/O processor) with configuration I/O processor.
After the enumeration process that square frame 212 is started by the I/O processor, the I/O processor can be independent of host process and systematically storer be read and write request with storer and be addressed to equipment and the functions of the equipments that are configured and hide.A kind of like this storer reads or storer writes equipment or the functions of the equipments that request can utilize storage address to be addressed to be hidden, this storage address is positioned within the memory address range of the equipment of distributing to or functions of the equipments, as it is indicated to be associated with the BAR of equipment or functions of the equipments.For example, equipment or functions of the equipments can be used PCI local bus specification 3.2.2.2 to save described storage space to decode the requirement sort memory to read or storer writes request.
Although diagram and description is the example of the present embodiments of the invention of considering, those skilled in the art will appreciate that and to make other different modifications, and substitute, and do not deviate from true scope of the present invention with equivalents.In addition, under the situation that does not deviate from main inventive concept described here, can make many modifications so that instruction of the present invention is adapted to specific situation.Therefore, the present invention is not limited to disclosed specific embodiment, the present invention includes all embodiment that fall within the claims scope.
Claims (39)
1, a kind of method comprises:
In the host process system, carry out enumeration process, be connected to one or more equipment of data bus with configuration;
To in host process system concealing device and the functions of the equipments at least one, at least one in described equipment and the functions of the equipments is connected to data bus during enumeration process; With
Dispose at least one in described equipment and the functions of the equipments, so that require bus transaction request on data bus, this bus transaction request is independent of host process system start-up.
2, method according to claim 1, wherein at least one in configuration device and the functions of the equipments is so that require bus transaction request also to comprise setting and at least one one or more base register that are associated in equipment and the functions of the equipments.
3, method according to claim 1, wherein at least one in configuration device and the functions of the equipments carried out enumeration process so that require bus transaction request also to be included on the I/O processor, so that at least one in configuration device and the functions of the equipments requires bus transaction request on data bus.
4, method according to claim 3, this method also comprises:
Log-on data bus line command on the I/O processor; With
Require the data bus order in equipment and functions of the equipments at least one.
5, method according to claim 1 wherein comprises idsel signal at least one the data bus of forbidding in the equipment that is associated with and the functions of the equipments in host process system concealing device and the functions of the equipments at least one during enumeration process.
6, method according to claim 1, wherein carrying out enumeration process in the host process system also comprises to the one or more memory address range of I/O processor distribution that are connected to data bus, wherein this method also is included on the I/O processor and carries out enumeration process, so as from one or more memory address range of distributing to the I/O processor scope of at least one the allocate memory address in equipment that is hidden and functions of the equipments.
7, a kind of article comprise:
One storage medium comprises storage machine readable instructions thereon, is used for:
During the enumeration process that the host process system is started, the host process system hidden and be connected to the equipment of data bus and at least one in the functions of the equipments; With
In configuration device and the functions of the equipments at least one, so that require bus transaction request on data bus, this bus transaction request is independent of host process system start-up.
8, article according to claim 6, wherein storage medium comprises that also storage is thereon in order to the machine readable instructions of at least one the one or more base register that are associated in setting and equipment and the functions of the equipments.
9, article according to claim 6, wherein storage medium also comprise storage thereon in order to carry out enumeration process so that at least one in configuration device and the functions of the equipments requires the machine readable instructions of bus transaction request on data bus.
10, article according to claim 6, wherein storage medium comprises that also storage is thereon in order to forbid the machine readable instructions of the idsel signal at least one the data bus in the equipment that is associated with and the functions of the equipments.
11, article according to claim 6, wherein storage medium also comprise storage thereon in order to carry out second enumeration process in case during the enumeration process that the host process system is started from one or more memory address range of distributing to equipment the machine readable instructions of at least one the allocate memory address realm in equipment that is hidden and functions of the equipments.
12, a kind of I/O processor comprises:
Be used for during the enumeration process that the host process system is controlled the host process system is hidden at least one logical circuit of the equipment that is connected to data bus and functions of the equipments; With
Be used at least one of configuration device and functions of the equipments so that require the logical circuit of bus transaction request on data bus, described bus transaction request is independent of host process system start-up.
13, I/O processor according to claim 12, this I/O processor also comprise the logical circuit that is used for being provided with at least one one or more base registers that are associated of equipment and functions of the equipments.
14, I/O processor according to claim 12, described I/O processor also comprise and are used for carrying out enumeration process so that at least one of configuration device and functions of the equipments requires the logical circuit of bus transaction request on data bus.
15, I/O processor according to claim 12, this I/O processor comprise that also idsel signal on the data bus that is used to forbid to be associated with the I/O controller is so that hide the logical circuit of I/O controller during the enumeration process that the host process system is controlled.
16, I/O processor according to claim 12, wherein the I/O processor also comprise be used for carrying out second enumeration process in case during the enumeration process that the host process system is controlled from the logical circuit of at least one the allocate memory address realm of one or more memory address range to equipment that is hidden and functions of the equipments of distributing to the I/O processor device.
17, a kind of system comprises:
One host process system;
Be connected to the equipment of host process system via data bus; With
One I/O processor comprises:
Be used for during the enumeration process that the host process system is controlled logical circuit at least one of the functions of the equipments of host process system concealing device and equipment; With
One that is used for that configuration device and functions of the equipments are hidden so that require the logical circuit of bus transaction request on data bus, described bus transaction is independent of host process system start-up.
18, system according to claim 17, wherein the I/O processor also comprises via first data bus and is connected to the host process system and is connected to the bridge of equipment via second data bus.
19, system according to claim 17, wherein this system also comprises the magnetic storage medium that links to each other with equipment, so that according to data memory format storage data.
20, system according to claim 17, wherein equipment comprises the logical circuit that sends or receive data according to the serial ATA form.
21, system according to claim 17, wherein equipment comprises the logical circuit that sends or receive data according to the SCSI form.
22, system according to claim 17, wherein equipment also comprises the logical circuit that sends or receive data according to the SAS form.
23, system according to claim 17, wherein the I/O processor also comprises the logical circuit that is used for being provided with at least one one or more base registers that are associated of equipment and functions of the equipments.
24, system according to claim 17, wherein the I/O processor also comprises and is used for carrying out enumeration process so that at least one of configuration device and functions of the equipments comes to require the logical circuit of bus transaction request on data bus.
25, system according to claim 17, wherein the I/O processor comprises that also idsel signal on the data bus that is used to forbid to be associated with the I/O controller is so that hide the logical circuit of I/O controller during the enumeration process that the host process system is controlled.
26, system according to claim 17, wherein the I/O processor also comprise be used for carrying out second enumeration process in case during the enumeration process that the host process system is controlled from the logical circuit of at least one the allocate memory address realm of one or more memory address range to equipment that is hidden and functions of the equipments of distributing to the I/O processor.
27, a kind of method comprises:
Carry out in check first enumeration process in the host process system, so that dispose the I/O processor that is connected to the host process system via data bus, this first enumeration process comprises distributes the memory address range of the one or more I/O of being assigned to processors; With
On the I/O processor, carry out in check second enumeration process, so that configuration and the equipment of I/O processor communication and at least one in the functions of the equipments, this second enumeration process comprises at least one allocate memory address realm in equipment and functions of the equipments from one or more memory address range of distributing to the I/O processor.
28, method according to claim 27, this method also are included in during first enumeration process in host process system concealing device and the functions of the equipments at least one.
29, method according to claim 27, wherein carry out second enumeration process and also comprise at least one in configuration device and the functions of the equipments so that require bus transaction request on data bus, described bus transaction request is independent of host process system start-up.
30, method according to claim 27, wherein at least one the allocate memory address realm in equipment and functions of the equipments also be included in at least one configuration title that is associated in equipment and the functions of the equipments in one or more base registers are set.
31, I/O processor comprises:
Response is asked from the logical circuit of the one or more memory address range of host process system assignment by first enumeration process of host process system control; With
Be used for starting second enumeration process so that the logical circuit of at least one of configuration and the equipment of I/O processor communication and functions of the equipments, this second enumeration process comprises at least one allocate memory address realm in equipment and functions of the equipments from one or more memory address range of being asked.
32, I/O processor according to claim 31, this I/O processor also comprise the logical circuit that is used for during first enumeration process at least one of host process system concealing device and functions of the equipments.
33, I/O processor according to claim 31, wherein second enumeration process comprises at least one in configuration device and the functions of the equipments so that require bus transaction request on data bus, and described bus transaction request is independent of host process system start-up.
34, I/O processor according to claim 31, wherein at least one the allocate memory address realm in equipment and functions of the equipments be included in at least one configuration title that is associated in equipment and the functions of the equipments in one or more base registers are set.
35, a kind of article comprise:
One storage medium comprises storage machine readable instructions thereon, is used for:
Response is by first enumeration process of host process system control, and request is from the one or more memory address range of host process system assignment; With
Start second enumeration process so that dispose and the equipment of I/O processor communication and at least one in the functions of the equipments, this second enumeration process comprises at least one allocate memory address realm in equipment and functions of the equipments from one or more memory address range of being asked.
36, article according to claim 35, wherein storage medium comprises that also storage is used for during first enumeration process at least one the machine readable instructions in host process system concealing device and the functions of the equipments thereon.
37, article according to claim 35, wherein storage medium comprises that also storage is used at least one of configuration device and functions of the equipments thereon so that require the logical circuit of bus transaction request on data bus, and described bus transaction request is independent of host process system start-up.
38, according to the described article of claim 37, wherein storage medium also comprise storage be used for thereon with at least one configuration title that is associated in equipment and the functions of the equipments in the machine readable instructions of one or more base registers is set.
39, a kind of method comprises:
Response is asked from the one or more memory address range of host process system assignment by first enumeration process of host process system control; With
Start second enumeration process so that dispose and the equipment of I/O processor communication and at least one in the functions of the equipments, this second enumeration process comprises at least one allocate memory address realm in equipment and functions of the equipments from one or more memory address range of being asked.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200310119818 CN1609831A (en) | 2003-10-24 | 2003-10-24 | Special equipment and configuration of equipment function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200310119818 CN1609831A (en) | 2003-10-24 | 2003-10-24 | Special equipment and configuration of equipment function |
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| Publication Number | Publication Date |
|---|---|
| CN1609831A true CN1609831A (en) | 2005-04-27 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200310119818 Pending CN1609831A (en) | 2003-10-24 | 2003-10-24 | Special equipment and configuration of equipment function |
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| Country | Link |
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| CN (1) | CN1609831A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101946243A (en) * | 2008-02-18 | 2011-01-12 | 惠普开发有限公司 | The system and method for the host computer that is coupled communicatedly device and peripheral unit |
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2003
- 2003-10-24 CN CN 200310119818 patent/CN1609831A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101946243A (en) * | 2008-02-18 | 2011-01-12 | 惠普开发有限公司 | The system and method for the host computer that is coupled communicatedly device and peripheral unit |
| CN101946243B (en) * | 2008-02-18 | 2015-02-11 | 惠普开发有限公司 | Systems and methods of communicatively coupling a host computing device and a peripheral device |
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