CN1680920B

CN1680920B - Method and device for remotely updating basic input and output system in data processing system

Info

Publication number: CN1680920B
Application number: CN 200410032464
Authority: CN
Inventors: 詹森达; 陈怡勳; 许朝胜; 吴宜昌; 黄文宾
Original assignee: Wistron Corp
Current assignee: Wistron Corp
Priority date: 2004-04-07
Filing date: 2004-04-07
Publication date: 2011-06-15
Anticipated expiration: 2024-04-07
Also published as: CN1680920A

Abstract

The invention provides a method and device for updating the Basic Input Output System (BIOS) in a data processing system at a remote end, which is characterized in that a remote control platform issues a BIOS updating command, the BIOS updating command is transmitted to a microprocessor of a non-execution operating system in the data processing system and a related storage medium through a network, and after the correctness of a BIOS updating image file is confirmed, the BIOS of a system microprocessor of the execution operating system is updated at a proper time, wherein the system microprocessor is usually a central processing unit. The method and the device can achieve the update of the remote BIOS, and can also successfully update the BIOS and restart the data processing system when the operating system fails due to update failure or other reasons because the update operation is processed autonomously and is irrelevant to the operation of the operating system in the data processing system.

Description

Far-end upgrades the method and the device thereof of Basic Input or Output System (BIOS) in the data handling system

Technical field

The invention relates to a kind of method of upgrading the Basic Input or Output System (BIOS) (BIOS) of data handling system, and particularly upgrade the method for BIOS relevant for a kind of far-end, this method is not required to be each operating system and writes the BIOS refresh routine, and still can make far-end and upgrade after BIOS upgrades failure.

Background technology

Generally speaking, desire is to a data handling system, when for example computer carries out the BIOS renewal, all need to carry out under the condition of operate as normal in operating system, as long as oneself's start detects (Power On Self Test, POST) under the situation that imperfect or operating system (Operating System) can't normally be carried out, then will cause to carry out far-end BIOS and upgrade operation.

Please refer to Fig. 1, to illustrate be that computer carries out the schematic flow sheet of BIOS when upgrading in the prior art.When upgrading the BIOS step and beginning (step 110), log-on data disposal system (step 102) at first, and do oneself's start and detect (step 104).If oneself start detects successfully (step 101), then enter operating system (DOS for example, Microsoft Windows, Linux, etc.) (step 106).After system enters operating system, if the distance terminal user requires to upgrade BIOS (step 103), then transmit BIOS image file (step 108) earlier, judge BIOS image file whether correctly (step 105), carry out refresh routine (step 112) again, and finish renewal back restarting systems (step 114).If the BIOS image file is incorrect, then notify far-end manoeuvring platform (step 116) and process ends (step 120).On the other hand, if BIOS, then process ends (step 120) are upgraded in distance terminal user and no requirement (NR).In a single day hence one can see that, upgrades startup of BIOS step and the failure of self-testing mechanism in the prior art, operating system just can't operate, and just can't remake far-end BIOS this moment and upgrade.

Aspect the hardware setting of prior art, please refer to the block synoptic diagram that Fig. 5 illustrates existing renewal BIOS.Show among the figure that too network 504 and socket card 506 pass on the terminal user desires to upgrade the information of BIOS to a far-end manoeuvring platform 502 by second, such instruction is by system processor 522 computing that is for data processing, coupled system flash memory 524 and system random access memory 526 provide the storage space configuration, with the BIOS of update system.This kind receives the setting that remote instructions is upgraded BIOS, because the essential passage through system processor 522 of the information transmission between data handling system and the network, meaning promptly must could be finished BIOS smoothly and upgrade under the situation of operating system normal operation.On the other hand if system's sudden power, or there is other factors and causes BIOS to upgrade failure, then system processor 522 after BIOS upgrades failure restart operation the time just can't restart, anticipate promptly and can't be again to upgrade BIOS by network with far-end manoeuvring platform 502;

Summary of the invention

Therefore the purpose of this invention is to provide a kind of mode and upgrade the work of BIOS, and another kind of solution is provided, cause once more far-end to upgrade the problem of BIOS to handle because of BIOS upgrades the failure back to allow far-end indication computer.

Another object of the present invention provides a kind of BIOS update system, utilize far-end to provide desire to upgrade the BIOS image file that replaces, with a microprocessor is bridge not by under the situation of operating system, directly or indirectly upgrades BIOS and log-on data disposal system again.

In order to achieve the above object, the invention provides a kind of data handling system, be applicable to a remote instructions and upgrade a recordable memory.This data handling system comprises a far-end manoeuvring platform, one first little processing components, one second little processing components, a network and a socket.Wherein this far-end manoeuvring platform provides update instruction and update content, by the transmission of network and the conversion of socket, is connected socket, receives instruction and is carried out subsequent step by first little processing components, to upgrade recordable memory.Recordable memory in the present invention is arranged in second little processing components, for example be the rewritten BIOS storer in the central processing unit, operation via first little processing components, directly do not upgrading this recordable memory (BIOS) by second little processing components, if this first little processing components is not supported this recordable memory of direct renewal, also available another indirect mode is connected to the startup block (Boot Block) of second little processing components by BIOS and upgrades this recordable memory.First little processing components among the present invention comprises the first microprocessor and first working storage, common first little reason place device is the microprocessor except central processing unit in the computer, and first working storage is generally the storer corresponding with first microprocessor, for example is flash memory, random access memory etc.Be bridge with the first microprocessor among the present invention, first working storage of matching coupling, remote instructions and update content that reception transmits by network, renewal for example is the BIOS storer in the central processing unit, (comprise for example flash memory owing to be responsible for first microprocessor second microprocessor and the second corresponding working storage thereof corresponding of execution update instruction with accepting the updated stored device, random access memory etc.) separate, so first microprocessor can direct or indirect mode upgrades the recordable memory of second microprocessor, no matter it is directly or indirectly all irrelevant with operating system, and after upgrading failure, the far-end manoeuvring platform still can re-execute update instruction again by first microprocessor, till the system recovery operation.

In addition, even do not pass through second microprocessor, and can upgrade the recordable memory of second microprocessor at any time in direct mode.

For further specifying above-mentioned purpose of the present invention, design feature and effect, the present invention is described in detail below with reference to accompanying drawing.

Description of drawings

Fig. 1 is that the far-end BIOS that illustrates according to prior art upgrades schematic flow sheet.

Fig. 2 upgrades the workflow synoptic diagram according to the indirect type BIOS that a preferred embodiment among the present invention is illustrated.

Fig. 3 A is the direct-type microprocessor work schematic flow sheet that is illustrated according to a preferred embodiment among the present invention.

Fig. 3 B is the indirect type microprocessor work schematic flow sheet that is illustrated according to a preferred embodiment among the present invention.

Fig. 4 is the far-end manoeuvring platform workflow synoptic diagram that is illustrated according to a preferred embodiment among the present invention.

Fig. 5 is the BIOS update system block synoptic diagram that illustrates according to prior art.

Fig. 6 A is the far-end BIOS update system block synoptic diagram of the indirect type that illustrated according to a preferred embodiment among the present invention.

Fig. 6 B is the far-end BIOS update system block synoptic diagram of the direct-type that illustrated according to a preferred embodiment among the present invention.

Embodiment

The present invention proposes a kind of far-end manoeuvring platform indication computer that allows and upgrades the work of BIOS, and another kind of solution is provided, to handle the problem that causes upgrading once more BIOS because of BIOS renewal failure back.And this kind BIOS update system, the BIOS image file that utilizes far-end to provide desire upgrade to replace, with a microprocessor be bridge not by under the situation of operating system, finish the renewal of system bios and successfully restart data handling system.

The purpose of this invention is to provide another pipeline and carry out far-end BIOS renewal, a meaning i.e. microprocessor is regarded the bridge tool that upgrades BIOS; Because this kind microprocessor has the temporary function (generally including for example flash memory, random access memory) of data,, just can carry out the function that far-end upgrades BIOS by this microprocessor when under the remote side administration person during BIOS update instruction.

Technology among the present invention can utilize direct or indirect mode to come far-end to upgrade BIOS.Directly mode needs at microprocessor and system's recordable memory one interface is arranged, and this microprocessor can upgrade BIOS the time in office.If system does not have this interface, just can utilize indirect mode to upgrade BIOS.Indirect mode utilizes the procedure code of the startup block (Boot Block) of BIOS self to upgrade BIOS, therefore need not wait until that POST just upgrades BIOS after finishing, more after dispatching from the factory, system just can not change in addition because of the procedure code that starts block, make that starting block has the characteristic that is not destroyed, and guarantee to upgrade once more the possibility of BIOS.

Please refer to Fig. 2, it illustrates according to the BIOS workflow synoptic diagram that connects renewal among the present invention between the preferred embodiment.BIOS in the system is a recordable memory, wherein stores start block sign indicating number, all need carry out bios program when restarting systems each time.In disclosed remote updating method, workflow such as Fig. 2 of BIOS illustrate.At first when carrying out BIOS start block sign indicating number (step 202), if requiring to carry out BIOS, far-end upgrades (step 203), then read BIOS image file (step 204) in the relevant working storage of microprocessor, it is to be transmitted by network and socket by the far-end manoeuvring platform.When the BIOS image file read finish after, whether the content of inspecting the BIOS image file correct (step 205).If incorrect, then inform microprocessor image file incorrect (step 214); If correct, the execution (step 206) that then enters the BIOS refresh routine.No matter refresh routine is success (step 208) or failure (step 216), all inform microprocessor, if success, just footpath row start (step 212) again.

In the present invention, when system operator desires to carry out far-end renewal BIOS, just upgrade the instruction of BIOS down to the microprocessor in the system of desire renewal BIOS from the far-end manoeuvring platform.This microprocessor can directly upgrade BIOS (Fig. 3 A) after receiving instruction, or wait and BIOS startup block (Boot Block) communication (Fig. 3 B).At first with reference to figure 3A.Whether microprocessor receives BIOS update instruction (step 303), if, just draw BIOS image file (step 302) as bridge by microprocessor.After drawing the BIOS image file and finishing and differentiate this image file correct (step 305), this correct information is conveyed to microprocessor, and enters BIOS refresh routine (step 304).Upgrade finishing the back differentiates and upgrades whether success (step 307) of operation, pass successfully or the information of failure is returned this far-end control platform (step 306,314), if upgrades successfully restarting systems (step 308) then and finish the BIOS renewal microprocessor flow process (step 320) of direct-type.If microprocessor flow process at indirect type, meaning is that microprocessor needs to cooperate BIOS startup block to come together to finish the BIOS renewal after receiving instruction, then with reference to figure 3B, wherein correct (step 305) afterwards differentiating the BIOS image file, different with the direct-type flow process is first restarting systems (step 308), and wait for that BIOS starts the block inquiry and whether will upgrade BIOS (step 309), it is will upgrade after the BIOS that BIOS starts the block inquiry, just transmits the BIOS image file and starts block procedure code (step 316) to BIOS.And wait for that BIOS starts the block procedure code and informs the renewal result, notify remote console to upgrade successfully (step 306) or failure (step 314) at last, and finish the microprocessor flow process (step 320) of indirect type.

No matter adopt direct-type or indirect type microprocessor model among the present invention, when the far-end manoeuvring platform is observed, with reference to far-end manoeuvring platform schematic flow sheet shown in Figure 4.When terminal user requires far-end to upgrade BIOS (step 402), if check out that BIOS is upgrading (step 403), then show the information (step 414) of " BIOS upgrades ",, then descend update instruction to microprocessor (step 404) if BIOS there is no and upgrades.Then the far-end manoeuvring platform transmits the BIOS image file to microprocessor (step 406), and differentiate microprocessor and connect whether receive correct BIOS image file (step 405), after finishing, transmission confirms renewal whether successfully (step 407), with display update successful information (step 408).If upgrade failure, then decision is attempted upgrading (step 409) or showing " BIOS upgrades failure " information (step 412) once more.If microprocessor receives incorrect BIOS image file, then whether decision transmits once (step 401) again.

Please refer to Fig. 6 B, is disclosed direct-type far-end BIOS update system block diagram.In the system architecture block schematic diagram provided by the invention, the vertical behaviour of far-end platform 602 is when too network 604 and socket card 606 are linked up by second, not by responsible systematic microprocessor 622 (central processing unit CPU) swap data of carrying out operating system in the data handling system, but do exchanges data and carry out the relevant operation of renewal BIOS via another microprocessor 612.The procedure code of this microprocessor 612 leaves microprocessor flash memory 614 in, renewal BIOS image file from 602 receptions of far-end manoeuvring platform, then be temporarily stored in microprocessor random access memory 616, microprocessor and system's quickflashing have a direct interface 613, make microprocessor even under the situation that system processor 622 lost efficacy, or operating system is under the disabled state, still is able to the operation that BIOS is upgraded in success.

Please refer to Fig. 6 A, is disclosed indirect type far-end BIOS update system block diagram.This system constructing and direct-type far-end BIOS are that difference is that

microprocessor

612 and 624 of system's flash memories there is no direct interface and exist, but via systematic microprocessor (central processing unit CPU) 622, and system dynamics access memory 626, and exist the BIOS in system's flash memory to start the renewal that block (BootBlock) 624 is finished far-end BIOS.Even the meaning operating system is in disabled state, still is able to success and upgrades the BIOS operation.

Though the present invention describes with reference to current specific embodiment, but those of ordinary skill in the art will be appreciated that, above embodiment is used for illustrating the present invention, under the situation that does not break away from spirit of the present invention, also can make the variation or the replacement of various equivalences, therefore, as long as in connotation scope of the present invention in the scope to the variation of the foregoing description, claims that modification all will drop on the application.

Claims

1. A data processing system device that utilizes a remote command to perform an update operation of a rewritable memory, comprising:

a remote control platform;

a network;

a web interface;

a first microprocessor;

a first register;

a second microprocessor; and

a second register;

It is characterized in that the remote operation platform uses the first microprocessor as a bridge through the network and the network interface, and uses the temporary storage function of the first temporary register to store the content of the update operation transmitted by the remote operation platform, The rewritable memory related to the second microprocessor is updated in conjunction with the second register; wherein, the second microprocessor is responsible for executing an operating system, and the first microprocessor is not responsible for executing the operating system.

2. The data processing system device according to claim 1, wherein the remote operating platform comprises a remote data processing system.

3. The data processing system device as claimed in claim 2, wherein the remote data processing system is at least one of the following: a desktop computer, a notebook computer, and a server.

4. The data processing system device as claimed in claim 1, wherein the network comprises an Ethernet network.

5. The data processing system device of claim 1, wherein the network comprises a local area network.

6. The data processing system device of claim 1, wherein the network interface comprises a network interface card.

7. The data processing system device as claimed in claim 1, wherein the first register comprises at least one of a flash memory and a random access memory.

8. The data processing system device as claimed in claim 1, wherein the first microprocessor comprises a central processing unit.

9. The data processing system device as claimed in claim 1, wherein the second register comprises at least one of a flash memory and a random access memory.

10. The data processing system device as claimed in claim 9, wherein the first microprocessor accesses the flash memory through the second microprocessor to execute the update operation.

11. The data processing system device as claimed in claim 9, wherein the first microprocessor directly accesses the flash memory to execute the updating operation.

12. The data processing system device as claimed in claim 1, wherein the rewritable memory comprises a BIOS.

13. The data processing system device as claimed in claim 12, wherein the rewritable memory includes two programmable parts, wherein any one of the programmable parts includes the rewritable memory during operation of the rewritable memory. A copy of the memory software is written and only the programmable portion that is not active is updated during the update operation.

14. The data processing system device of claim 12, wherein the rewritable memory comprises an electrically erasable read-only memory.

15. The data processing system device of claim 1, wherein the data processing system is a computer system.

16. The data processing system device of claim 1, wherein the data processing system is a computer network system.

17. A method of updating a basic input output system (BIOS), performed when a BIOS memory is in a non-updating state, the method comprising:

Extracting a BIOS image file from a first microprocessor, wherein the BIOS image file is transmitted by a remote operating platform, and temporarily stored in a first register related to the first microprocessor, wherein the first The microprocessor is not responsible for executing an operating system;

Determine whether the BIOS image file is correct;

If the BIOS image file is correct, then inform the first microprocessor that the BIOS image file is correct;

If the BIOS image file is incorrect, the first microprocessor requests the remote operating platform to transmit the BIOS image file again;

Entering an update program, the processor writes the BIOS into the BIOS memory through a second microprocessor and its associated second register, wherein the second microprocessor is responsible for executing the operating system ;

judging whether the update procedure is successful;

conveying success or failure of the update procedure to the first microprocessor; and

Restart the system.

18. The method of claim 17, wherein the second microprocessor is a central processing unit.

19. The method as claimed in claim 17, further comprising executing a self-boot detection program after restarting the system.

20. A method for updating a rewritable memory, characterized in that a second microprocessor responsible for executing an operating system to which the rewritable memory belongs utilizes a first microprocessor not responsible for executing the operating system and a temporary The register repeatedly checks an update content transmitted from the remote end through the network, and stores the update content in the temporary register after confirming that it is correct, and writes the update content into the rewritable memory through the operation of the second microprocessor.

21. The method for updating a rewritable memory as claimed in claim 20, wherein the first microprocessor is a central processing system.

22. The method for updating a rewritable memory as claimed in claim 20, wherein the register comprises a flash memory.

23. The method for updating a rewritable memory as claimed in claim 20, wherein the register comprises a random access memory.

24. The method for updating a rewritable memory as claimed in claim 20, wherein the network is an Ethernet network.

25. The method for updating a rewritable memory as claimed in claim 20, wherein the network is an area network.

26. A data processing system adapted to update a rewritable memory with a remote command, comprising:

A remote operation platform that provides the remote command and an updated content;

a first micro-processing component, the first micro-processing component is not responsible for executing an operating system;

A second micro-processing component, related to the rewritable memory, is coupled to the first micro-processing component, and the second micro-processing component is responsible for executing the operating system.