CN1679148A - Plasma treatment method and plasma treatment device - Google Patents

Abstract

In a plasma processing method in which Ar gas is supplied into a vacuum chamber (1), low-frequency power such as 300W is first supplied from a high-frequency power supply (11) to a mounting table (2) (lower electrode) to generate weak plasma, and the weak plasma acts on a semiconductor wafer (W) to adjust the state of charge accumulated in the semiconductor wafer. At this time, a DC voltage (HV) is not applied to the electrostatic chuck (4) in order to facilitate the movement of the electric charges. Thereafter, DC voltage is applied to the electrostatic chuck (4), and high-frequency power for normal processing such as 2000W is supplied, so that strong plasma is generated and normal plasma processing is performed. Therefore, the occurrence of surface arcing on the substrate to be processed can be prevented, and productivity can be improved as compared with the prior art.

Description

Plasma treatment method and plasma treatment device

technical field

The present invention relates to a plasma processing method and a plasma processing device, in particular to a plasma processing method and a plasma processing device for performing plasma etching processing on a substrate to be processed such as a semiconductor wafer or an LCD substrate.

Background technique

Currently, many plasma processing methods are used for processing substrates to be processed, such as semiconductor wafers and LCD substrates, with plasma. For example, in the manufacturing process of semiconductor devices, as a technique for forming a fine circuit on a substrate to be processed, such as a semiconductor wafer, plasma etching, which removes thin films and the like formed on the semiconductor wafer by etching with plasma, is often used. deal with.

In an etching apparatus that performs a certain plasma etching process, for example, plasma is generated in a processing chamber (etching chamber) having a structure capable of hermetically sealing the inside. In addition, a semiconductor wafer is placed on a holder provided in the etching chamber, and then etched.

In addition, various types of methods for generating the above-mentioned plasma are already known. Among them, there is a device that generates plasma by supplying high-frequency power to a pair of parallel plate electrodes that are arranged to face up and down. In this device, one of the parallel plate electrodes, such as the lower electrode, also serves as a support. device. Then, a semiconductor wafer is placed on the lower electrode, and a high-frequency voltage is applied between the parallel plate electrodes to generate plasma to perform etching.

However, in such an etching apparatus, a lightning-like abnormal discharge, that is, a so-called surface arc, is generated on the surface of the semiconductor wafer during the etching process.

The above-mentioned surface arc often occurs, for example, when an insulator layer is formed on a conductor layer and the insulator layer is etched. For example, when an insulator layer made of a silicon oxide film is etched to form a contact hole leading to an underlying conductor layer made of a metal layer, the silicon oxide film whose film thickness has been reduced is often damaged by etching. .

Moreover, since many parts of the silicon oxide film in the semiconductor wafer are destroyed when such an abnormal discharge occurs, most elements of the semiconductor wafer are adversely affected. In addition, at the same time, metal contamination occurs in the etching chamber, and the etching process cannot be continued as it is, and it is necessary to clean the inside of the etching chamber. Therefore, there is a problem that productivity is significantly lowered.

Contents of the invention

Accordingly, an object of the present invention is to provide a plasma processing method and a plasma processing apparatus capable of preventing surface arcing on a substrate to be processed and improving productivity more than conventional ones.

In the plasma processing method of the present invention, plasma processing is performed on the substrate to be processed to perform plasma processing, and before performing the above plasma processing, a plasma weaker than the plasma used in the plasma processing is applied to the above On the substrate to be processed, the charge state of the substrate to be processed is maintained in a constant state, and thereafter, the above-mentioned plasma treatment is performed.

In addition, in the plasma processing method of the present invention, in the above plasma processing method, the above-mentioned weak plasma is made to act on the above-mentioned processed substrate for a predetermined time, and thereafter, the electrostatic chuck for adsorbing and holding the above-mentioned processed substrate Apply a DC voltage to it.

In addition, in the plasma processing method of the present invention, in the above plasma processing method, before the elimination of the weak plasma, the DC voltage is started to be applied to the electrostatic chuck.

In addition, in the plasma processing method of the present invention, in the above plasma processing method, the weak plasma is a plasma formed of Ar gas, O ₂ gas, CF ₄ gas or N ₂ gas.

In addition, in the plasma processing method of the present invention, in the above plasma processing method, the weak plasma is formed by high-frequency power of 0.15 to 1.0 W/cm ² .

In addition, in the plasma processing method of the present invention, in the above plasma processing method, the time for causing the above-mentioned weak plasma to act on the above-mentioned substrate to be processed is 5 to 20 seconds.

In addition, in the plasma processing method of the present invention, in the above plasma processing method, when the plasma processing is started, the application of the DC voltage to the electrostatic chuck is started after the application of the high-frequency power for generating the plasma is started. , when the plasma treatment is finished, the application of the high-frequency power is stopped after the application of the DC voltage to the electrostatic chuck is stopped.

In addition, in the plasma processing method of the present invention, in the above plasma processing method, the loading on the electrostatic chuck is started in a state where the substrate to be processed is supported above the electrostatic chuck by a support bar grounded with a conductor. DC voltage, thereafter, causes the above-mentioned substrate to be processed to be lowered to be placed on the above-mentioned electrostatic chuck.

Furthermore, in the plasma processing method of the present invention, in the above plasma processing method, the plasma processing is an etching process, and the weak plasma is applied to the substrate to be processed in a processing chamber in which the etching process is performed.

Further, the plasma processing apparatus of the present invention is a plasma processing apparatus including a plasma processing mechanism for performing plasma processing on a substrate to be processed, and includes a control unit for controlling the plasma processing mechanism to perform the above plasma processing method.

Description of drawings

FIG. 1 is a diagram schematically showing a schematic configuration of an apparatus used in one embodiment of the present invention.

FIG. 2 is a diagram for explaining a plasma processing method according to an embodiment of the present invention.

FIG. 3 is a diagram schematically showing a schematic configuration of an apparatus used in another embodiment of the present invention.

FIG. 4 is a diagram for explaining a plasma processing method related to another embodiment of the present invention.

FIG. 5 is a diagram for explaining a plasma processing method related to a modified example of the embodiment shown in FIG. 2 .

FIG. 6 is a diagram for explaining an adsorption method using an electrostatic chuck.

FIG. 7 is a diagram for explaining potential changes of various parts in the adsorption method of FIG. 6 .

Fig. 8 is a diagram for explaining potential changes at various parts in another adsorption method.

FIG. 9 is a diagram for explaining a comparative example of an adsorption method using an electrostatic chuck.

FIG. 10 is a diagram for explaining potential changes at various parts in the adsorption method of FIG. 9 .

Fig. 11 is a graph showing the relationship between the voltage applied to the electrostatic chuck and the number of particles.

Fig. 12 is a diagram showing a difference in the number of particles due to a difference in order.

Detailed ways

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram schematically showing the overall configuration of a plasma processing apparatus (etching apparatus) used in an embodiment of the present invention. In FIG. 1, reference numeral 1 denotes a cylindrical vacuum chamber which is formed of a material such as aluminum and whose interior can be hermetically sealed to constitute a processing chamber.

The above-mentioned vacuum chamber 1 is connected to the ground potential. Inside the vacuum chamber 1, a mounting table 2, which is made of a conductive material such as aluminum in a block shape and also serves as a lower electrode, is provided.

The mounting table 2 is supported in the vacuum chamber 1 via an insulating plate 3 made of ceramics or the like. An electrostatic chuck 4 is provided on the semiconductor wafer mounting surface of the mounting table 2 . The electrostatic chuck 4 has a structure in which an electrode 4 a for electrostatic chuck is sandwiched between an insulating film 4 b made of an insulating material, and a DC power supply 5 is connected to the electrode 4 a for electrostatic chuck. The electrostatic chuck electrode 4 a is made of copper or the like, and the insulating film 4 b is made of polyimide or the like.

In addition, inside the mounting table 2, a heat medium flow path 6 for circulating an insulating fluid as a heat medium for temperature control, and a temperature control gas for supplying the semiconductor wafer W such as helium gas are provided. The gas flow path 7 inside.

Furthermore, by circulating the insulating fluid controlled at a predetermined temperature in the heat medium flow path 6, the mounting table 2 is controlled at a predetermined temperature, and the temperature control gas is supplied to the mounting table through the gas flow path 7. 2 and the inside of the semiconductor wafer W, the heat exchange between them is promoted, and the semiconductor wafer W can be controlled at a given temperature with high precision and high efficiency.

In addition, a focus ring 8 made of a conductive material or an insulating material is provided on the outer periphery above the stage 2 , and a power supply line 9 for supplying high-frequency power is connected to the approximate center of the stage 2 . A high-frequency power supply (RF power supply) 11 is connected to the power supply line 9 via the integrator 10 so that high-frequency power of a predetermined frequency is supplied from the high-frequency power supply 11 .

In addition, on the outer side of the above-mentioned focus ring 8, an exhaust ring 12 that is formed in a ring shape and has a plurality of exhaust holes is provided. A vacuum pump or the like is used to evacuate the processing space in the vacuum chamber 1 .

On the other hand, on the top portion of the vacuum chamber 1 above the mounting table 2 , an injection head 15 is installed parallel to and facing the mounting table 2 , and the injection head 15 is grounded. Therefore, these ejection heads 15 and the stage 2 function as a pair of electrodes (upper electrode and lower electrode).

A plurality of gas ejection holes 16 are provided on the lower surface of the ejection head 15, and a gas introduction unit 17 is provided on the upper portion thereof. Furthermore, a gas diffusion cavity 18 is formed inside the spray head 15 . The gas supply pipe 19 is connected to the gas introduction unit 17 , and the gas supply system 20 is connected to the other end of the gas supply pipe 19 . This gas supply system 20 is composed of a mass flow controller (MFC) 21 for controlling the flow rate of gas, a processing gas supply source 22 for supplying processing gas for etching, etc., an Ar gas supply source 23 for supplying Ar gas, etc. constitute.

On the other hand, an annular magnetic field forming mechanism (ring magnet) 24 is disposed concentrically with the vacuum chamber 1 around the outer periphery of the vacuum chamber 1 so as to form a magnetic field in the processing space between the stage 2 and the injection head 15 . The entirety of the magnetic field forming mechanism 24 can be rotated around the vacuum chamber 1 at a predetermined rotation speed by the rotation mechanism 25 .

In addition, the above-mentioned plasma processing mechanism such as the DC power supply 5 , the high-frequency power supply 11 , and the gas supply system 20 for performing plasma processing on the semiconductor wafer W is configured to be controlled by the control unit 40 .

Next, the procedure of the etching process performed by the etching apparatus configured as above will be described.

(first embodiment)

First, the unillustrated gate valve provided in the vacuum chamber 1 is opened, the semiconductor wafer W is passed through the load lock chamber (not illustrated) arranged adjacent to the gate valve, and the semiconductor wafer W is transported by the transport mechanism (not illustrated). It is transported into the vacuum chamber 1 and placed on the mounting table 2 . And, after withdrawing the transport mechanism to the outside of the vacuum chamber 1, the gate valve is closed. In addition, at this time, the application of the DC voltage (HV) from the DC power supply 5 to the electrostatic chuck electrode 4 a of the electrostatic chuck 4 is not performed.

Thereafter, the vacuum chamber 1 is evacuated to a predetermined vacuum degree through the exhaust port 13 by the vacuum pump of the exhaust system 14 , and at the same time, Ar gas is first supplied into the vacuum chamber 1 from the Ar gas supply source 23 . In addition, in this state, as shown in FIG. 2 , first, relatively low high-frequency power (for example, 13.56 MHz) such as 300 W is supplied from the high-frequency power supply 11 to the mounting table 2 as the lower electrode, thereby generating weak plasma. body, and make the weak plasma act on the semiconductor wafer W.

The reason why the weak plasma acts on the semiconductor wafer W in this way is as follows.

In other words, the state of the processed semiconductor wafer W varies depending on the processing state in the preceding process (eg, film formation process such as CVD). Furthermore, when a strong plasma is applied in such a state where electric charges are accumulated inside the semiconductor wafer W, the possibility of surface arcing or the like being generated is high. This functions to uniformly adjust (initialize) the state of charges accumulated inside the semiconductor wafer W, and the like.

Moreover, whenever the charge state accumulated inside the semiconductor wafer W is adjusted, in order to facilitate the transfer of charges from the inside of the semiconductor wafer W, the DC voltage (HV) supplied to the electrostatic chuck electrode 4a of the electrostatic chuck 4 is not adjusted. In the state, the semiconductor wafer is conditioned (initialized) by the weak ion body.

In addition, the high-frequency power used to generate such weak ions is about 0.15 to 1.0 W/cm ² , for example, about 100 to 500 W, and the time for the weak ions to act on the semiconductor wafer W is, for example, about 5 to 20 Second.

In addition, as mentioned above, although the case where Ar gas is used and the plasma of Ar gas is activated has been described, the type of gas is not limited to this, and for example, O ₂ gas, CF ₄ gas, N ₂ gas, etc. can also be used. gas. However, for each type of gas selected, it is required that the gas plasma generated by the selected gas rarely have undesirable effects such as etching on the semiconductor wafer W and the inner wall of the vacuum chamber 1, and it is necessary to select a gas that is easy to trigger the generation of plasma. gas. In addition, it is preferable to make an appropriate selection in consideration of the fact that there are variables in the optimal gas type even according to any processing performed on the semiconductor wafer W in the preceding process.

In addition, as described above, after the weak plasma is generated on the semiconductor wafer W, as shown in FIG. 2 , the DC voltage (HV) from the DC power supply 5 is applied to the electrostatic chuck electrode 4 a. Thereafter, a predetermined processing gas (etching gas) is supplied into the vacuum chamber 1 from the processing gas supply source 22, and a high power for normal processing such as 2000 W is supplied from the high frequency power source 11 to the mounting table 2 as the lower electrode. High-frequency power (for example, a frequency of 13.56MHz) generates strong plasma and performs normal plasma processing (etching processing). In addition, in FIG. 2 , the horizontal axis represents time, and the vertical axis represents the voltage value when HV is applied to the electrostatic chuck and the power value when RF is output.

At this time, by applying high-frequency power to the mounting table 2 as the lower electrode, a high-frequency electric field is formed in the processing space between the injection head 15 as the upper electrode and the mounting table 2 as the lower electrode, and at the same time, the magnetic field forming mechanism 24 forms a magnetic field, and performs plasma etching in this state.

Also, when a given etching process is performed, the etching process is stopped by stopping the supply of high-frequency power from the high-frequency power source 11, and the semiconductor wafer W is carried out of the vacuum chamber 1 in the reverse order to the above.

As described above, firstly, the weak plasma is applied to the semiconductor wafer W, and thereafter, when the semiconductor wafer W is etched, the ratio of surface arc generation on the semiconductor wafer W can be made substantially zero (1) regardless of the load. %the following). On the other hand, when the above-mentioned weak plasma is not activated and the processing is started, the proportion of surface arcs generated on the semiconductor wafer W may be about 80% depending on the load. This is because the semiconductor wafer W has already been charged in the process before etching, so when the previous process is a process of forming a so-called Low-K film by CVD, the probability of occurrence of the above-mentioned surface arc is particularly high.

Therefore, it was confirmed that the rate of occurrence of surface arcs on the semiconductor wafer W can be significantly reduced by applying the weak plasma to the semiconductor wafer W as described above before starting normal processing.

However, in the above-mentioned embodiment, as shown in FIG. 1 , the case of using a device having a structure in which high-frequency power is applied only to the mounting table 2 as the lower electrode has been described. However, as shown in FIG. 3 , even for A so-called upper and lower loading type plasma processing apparatus having a structure in which high-frequency power is applied from a high-frequency power supply 31 to the injection head 15 as an upper electrode via the integrator 30 is also suitable.

Now, as shown in FIG. 4, at first, start to load the low-power high-frequency power of the mounting table 2 as the lower electrode, after this, start to add the low-power high-frequency power to the injection head 15 as the upper electrode, Here, the application of high-frequency power to the mounting table 2 as the lower electrode is temporarily stopped. Also, after the weak plasma is applied to the semiconductor wafer W for a predetermined time in this state, the application of high-frequency power to the ejection head 15 as the upper electrode is also stopped, and the plasma is temporarily extinguished.

Then, the application of DC voltage (HV) to the electrostatic chuck electrode 4a of the electrostatic chuck 4 is started sequentially, and the usual high-frequency power (high-power high-frequency power) for processing is applied to the mounting table 2 as the lower electrode. power) to apply normal high-frequency power for processing (high-power high-frequency power) to the injection head 15 serving as the upper electrode, and start normal processing of the semiconductor wafer W.

In this way, the present invention can also be applied to a plasma processing apparatus of a voltage application type for upper and lower units.

Alternatively, instead of applying the weak plasma as described above, it is also preferable to apply an ionizer to the semiconductor wafer W to reduce the charge inside the semiconductor wafer W before starting the treatment. Occurrence of surface arcing can also be suppressed by the action of such an ionizer. The ionizer can be arranged in the vacuum chamber or in other places outside the vacuum chamber.

However, in the plasma processing method shown in FIG. 2 , in the state where the high-frequency power is not applied after applying weak high-frequency power to the mounting table 2 as the lower electrode to generate weak plasma, the electrostatic chuck starts to The electrostatic chuck of 4 is loaded with a DC voltage (HV) on the electrode 4a. In this way, if the application of the DC voltage (HV) to the electrode 4a for the electrostatic chuck is started in a state where the application of the high-frequency power is not performed after applying the weak high-frequency power to generate weak plasma, when the application of the When the DC voltage (HV) is applied, there is a possibility of lightning discharge and damage to the substrate. In this case, as shown in FIG. 5 , in the state where the high-frequency power is applied to the stage 2 (the state where weak plasma is generated), if the DC voltage (HV) to the electrostatic chuck electrode 4a starts to Loading can suppress the occurrence of discharge.

As above, in the first embodiment, the method of generating weak plasma using Ar gas before plasma processing such as etching and the timing of applying the DC voltage to the electrostatic chuck electrode 4 a at this time have been described.

(second embodiment)

Next, a preferred example of the relationship between the timing of high-frequency power application and the timing of DC voltage application to the electrostatic chuck electrode 4 a when plasma processing such as etching is performed will be described.

In addition, the above-mentioned electrostatic chuck 4 has a bipolar type and a unipolar type, and these types include a Coulomb type (Fufuku-ron type) and a Johnson feedback type (Jonsson-Ra-Beck type), respectively. Among them, when using the unipolar electrostatic chuck 4 of the Coulomb type, it is preferable to carry out the adsorption of the semiconductor wafer W in the following procedure. This sequence is shown in FIG. 6 . The horizontal axis represents time, the dotted line on the vertical axis represents the applied high-frequency power (W), and the solid line represents the applied DC voltage value (V).

In other words, after the semiconductor wafer W is placed on the mounting table 2 (electrostatic chuck 4 ), introduction of gas into the vacuum chamber 1 is started. Thereafter, as shown by the dotted line in FIG. 6 , first, high-frequency power is applied to the mounting table 2 to generate plasma, and thereafter, as shown by the solid line in the same figure, a DC voltage ( HV).

In addition, since the semiconductor wafer W is not attracted to the electrostatic chuck 4 before the DC voltage (HV) is applied to the electrostatic chuck electrode 4a, sufficient temperature control cannot be performed. Therefore, it is preferable that the high-frequency power applied to the mounting table 2 when the plasma is first generated is lower than the high-frequency power (for example, about 500 W) during the processing, and the temperature of the semiconductor wafer W is kept low by the action of the plasma. produce rise.

Furthermore, when taking out the semiconductor wafer W from the electrostatic chuck 4, as shown in the same figure, after the plasma processing is completed, first, the applied high-frequency power value is lowered to a value lower than that at the time of processing (not 0W). Thereafter, the application of the DC voltage (HV) to the electrostatic chuck electrode 4 a is stopped, and then the application of the high-frequency power is stopped to cause the plasma to disappear. In addition, when the application of DC voltage (HV) to the electrode 4a for the electrostatic chuck is stopped, a voltage (for example, about -2000V) with a polarity opposite to that at the time of adsorption is temporarily applied to the electrode 4a for the electrostatic chuck to remove the charge. , it is easy to carry out the semiconductor wafer W to the outside. In the case where the above-mentioned voltage application with reversed polarity is performed as necessary, and the semiconductor wafer W can be easily taken out from the electrostatic chuck 4 without performing the voltage application with reversed polarity, such reversed polarity is not performed. voltage loading.

FIG. 7 shows the copper electrode part (Cu) and the polyimide insulating film part (PI) of the electrostatic chuck (ESC) when the above-mentioned electrostatic chuck 4 is used to adsorb the semiconductor wafer W. , the back oxide film unit (B.S.Ox) of the multilayer semiconductor wafer (Multi Layer Wafer), the silicon substrate unit (Si sub) and the oxide film unit (Ox), and the processing space unit (Space) and the upper electrode unit in the vacuum chamber The potential change of each unit of (Wall).

As shown in FIG. 7, firstly, when the wafer support rods provided on the stage 2 are lowered, and the semiconductor substrate W is placed on the stage 2, as shown in ① in the figure, the potential of each unit is at After that, when gas is introduced into the vacuum chamber 1, as shown in ② in the figure, the potential of each unit is in a zero state.

After that, when high-frequency power is applied to generate plasma, the potential of the semiconductor substrate W becomes about negative 100V determined in the plasma state, as shown in (3) in the figure.

And, in this state, when a DC voltage (HV) is started to be applied to the electrostatic chuck electrode 4a, as shown in ④ in the figure, the potential of the electrostatic chuck electrode 4a becomes equal to the applied DC voltage (HV). potential (for example, about 1.5kV), and generate a potential difference on the insulating film unit (PI) to adsorb the semiconductor wafer W.

In this way, according to the above-mentioned sequence of attracting the semiconductor wafer W by the electrostatic chuck 4, because the surface of the semiconductor wafer W is not loaded with a high DC voltage (HV) along with the application of a direct current voltage (HV) to the electrostatic chuck electrode 4a. Therefore, it is possible to prevent an undesired abnormal discharge from being generated on the surface of the semiconductor wafer W.

In addition, the sequence of applying the DC voltage after applying the high-frequency power described in the second embodiment has the effect described below.

If in the sequence shown in FIG. 9, that is, when the plasma treatment is started, a DC voltage is applied to the electrode 4a for the electrostatic chuck, a high-frequency power is applied to the lower electrode (or upper electrode), and after the plasma treatment is completed, When the DC voltage is cut off after the high-frequency power is cut off, and the semiconductor wafer W is sucked or detached, a large voltage is applied to the semiconductor wafer W as shown in FIG. 10 . Therefore, there is a possibility that damage, specifically, a defect with a diameter of about several tens of μm may occur on the surface of the semiconductor wafer W, and an arc may be caused during etching at the position where the defect occurs, resulting in product failure. In addition, the chipped portion may become particles and adhere to the surface of the semiconductor wafer W in some cases.

However, in the case of performing the sequence of RF ON (on) → HV ON at the start of the process and HV OFF (off) → RF OFF at the end of the process described in this embodiment, because there is no semiconductor Since a high voltage is applied to the wafer W, the semiconductor wafer W will not be damaged, and particles can be prevented from adhering to the surface of the semiconductor wafer W.

In addition, in the sequence shown in FIG. 9, even if no damage is caused on the surface of the semiconductor wafer W, since the semiconductor wafer W is charged with a DC voltage applied to the electrostatic chuck electrode 4a, there is a possibility of static The electric power makes it possible for charged particles, which normally float in the processing chamber, to attach to the semiconductor wafer W.

However, in the case of performing the sequence of RF ON→HV ON at the start of the process, and HVOFF→RF OFF at the end of the process, the floating charged particles are captured until the high-frequency discharge is maintained until the DC voltage is applied to the electrostatic chuck. Trapped in the ion sheath, the attachment of particles to the surface of the semiconductor wafer W can be reduced as a result. There is also such an effect.

Next, the results of verifying the trapping effect in the ion sheath are shown.

FIG. 11 is a graph showing the results of investigating the difference in the number of attached particles due to the difference in the magnitude of the DC applied voltage of the electrostatic chuck for holding the semiconductor wafer W. FIG.

In other words, first, the CF-based reactant used as the particle generation source is attached to the processing chamber of the plasma processing apparatus (drying process), after that, the semiconductor wafer is transported into the processing chamber, placed on the electrostatic chuck, and processed. The gas flows for a certain period of time, and then the semiconductor wafer W is destaticized and transported out of the processing chamber. Since the particles are divided into 3 types according to the size of the particles, and according to the size of each of these 3 types, the amount attached to the semiconductor wafer W is calculated. Therefore, let the DC voltage of the electrostatic chuck be 0V, 1.5kV, 2.0kV, and 2.5kV, and the investigation results in each case are shown in Figure 11.

As shown in FIG. 11, it can be seen that the number of particles adhering to the semiconductor wafer W increases as the DC voltage applied to the electrostatic chuck increases. In other words, it can be seen that the application of a DC voltage to the electrostatic chuck has an effect on the adhesion of particles to the semiconductor wafer W.

In addition, the processing conditions of the above drying process are pressure: 6.65Pa, high-frequency power: 3500W, gas used: C ₄ F ₈ /Ar/CH ₂ F ₂ = 13/600/5 sccm, pressure inside the wafer (central/peripheral): 1330/3990Pa, temperature (ceiling/sidewall/bottom): 60/60/60°C, high-frequency loading time: 3 minutes.

In addition, the semiconductor wafer W was placed on the electrostatic chuck, and the pressure, gas used, wafer internal pressure, and temperature conditions were the same as above when the gas was circulated, high-frequency power = 0, and the gas circulation time was 60 seconds.

In addition, in the above-mentioned static elimination process, the semiconductor wafer W was carried out under the conditions of pressure: 26.6Pa, applied voltage: -1.5kV, voltage applied time: 1 second, pressure: 53.2pA, _N2 : 1000 sccm, and time: 15 seconds. For static elimination, the static elimination of the electrostatic chuck was carried out under the conditions of applied voltage: -2.0kV and voltage application time: 1 second. In addition, the reason for performing the static elimination as above is that there is a possibility that the semiconductor wafer W jumps up when the semiconductor wafer W is transported after the processing, causing reattachment of unnecessary particles. In other words, such static elimination does not occur. Jumping of the semiconductor wafer W.

In addition, FIG. 12 shows that after the above-mentioned drying process, the semiconductor wafer W is arranged in the processing chamber, and _O2 dry cleaning is performed in this state, and many particles are generated from the attached reactants in the drying process. In the case of the sequence of RF ON→HV ON, HV OFF→RF OFF at the end of the treatment, and HVON→RF ON at the start of the treatment, RF OFF→HV OFF at the end of the treatment, the measurement adheres to the Particle count results on semiconductor wafer W. In addition, in this measurement, the drying process and the static elimination process are the same as the above case, the pressure in the _O2 dry cleaning process: 13.3Pa, the high-frequency power: 1000W, the gas used: _O2 =1000sccm, the pressure inside the wafer (center /periphery): 1330/3990Pa, temperature (ceiling/side wall/bottom): 60/60/60°C, time for high frequency: 30 seconds.

As shown in Figure 12, by adopting the order of RF ON→HV ON at the beginning of the treatment and HV OFF→RF OFF at the end of the treatment, the number of attached particles can be greatly reduced.

In addition, in the sequence shown in FIG. 8 , in the state (①) where the semiconductor wafer W is supported by the wafer support rod (support bar) provided on the stage 2, the electrostatic chuck electrode 4a starts to be loaded. DC voltage (HV) (②), thereafter, lower the support pins for the wafer, and place the semiconductor substrate W on the mounting table 2 (③, ④). In the case of attracting the semiconductor substrate W, the semiconductor substrate The surface of W does not become the potential of the applied DC voltage (HV). Therefore, even according to this adsorption sequence, it is possible to prevent an undesired abnormal discharge from being generated on the surface of the semiconductor substrate W. However, in this procedure, the support pins for the wafer are conductive, and the structure that charges are supplied from the pins to the semiconductor substrate W is not necessarily required.

In addition, if the same Coulomb type electrostatic chuck or bipolar type electrostatic chuck is used, it is also possible to prevent abnormal discharge generated during adsorption by the above electrostatic chuck.

In addition, in the above examples, an embodiment of etching treatment using a parallel plate type etching apparatus was described, but the present invention is not limited to this embodiment, as long as it can be used for all plasma processing. In addition, in the above-mentioned embodiment, although the case where the weak plasma is applied in the vacuum chamber of the etching apparatus performing the etching process is described, it is also possible to apply the weak plasma in a place different from the apparatus performing the etching process, and it is also possible to apply the weak plasma to the semiconductor wafer. W is initialized.

As described in detail above, according to the present invention, surface arcing generated on a substrate to be processed can be prevented, and productivity can be improved as compared with the prior art.

The plasma processing method and plasma processing apparatus according to the present invention can be used in the semiconductor manufacturing industry and the like for semiconductor manufacturing.

Therefore, the present invention has the possibility of industrial application.

Claims (10)

1. a method of plasma processing is characterized in that,

When making action of plasma on processed substrate, carry out plasma treatment, before carrying out described plasma treatment, to be weaker than the weak action of plasma of the plasma that in this plasma is handled, uses on described processed substrate, and state of charge that will this processed substrate is kept certain state, after this, carry out described plasma treatment.

2. method of plasma processing as claimed in claim 1 is characterized in that,

Make described weak action of plasma preset time on described processed substrate, after this, load direct voltage being used to adsorb on the electrostatic chuck that keeps described processed substrate.

3. method of plasma processing as claimed in claim 2 is characterized in that,

Before described weak plasma disappearance, begin described electrostatic chuck is loaded direct voltage.

4. as any one described method of plasma processing in the claim 1～3, it is characterized in that,

Described weak plasma is by Ar gas, O ₂Gas, CF ₄Gas or N ₂The plasma that gas forms.

5. as any one described method of plasma processing in the claim 1～4, it is characterized in that,

By 0.15～1.0W/cm ²High frequency power form described weak plasma.

6. as any one described method of plasma processing in the claim 1～5, it is characterized in that,

Make described weak action of plasma on described processed substrate 5～20 seconds.

7. as any one described method of plasma processing in the claim 1～6, it is characterized in that,

When described plasma treatment begins, begin to load be used to produce the High frequency power of plasma after, begin described electrostatic chuck is loaded direct voltage, when described plasma treatment finishes, after stopping, stopping the loading of described High frequency power to described electrostatic chuck loading direct voltage.

8. as any one described method of plasma processing in the claim 1～6, it is characterized in that,

Under situation about by supporting rod described processed substrate being supported in above the described electrostatic chuck with conductor ground connection, begin loading direct voltage on the described electrostatic chuck, after this, described processed substrate is descended, be positioned on the described electrostatic chuck.

9. as any one described method of plasma processing in the claim 1～8, it is characterized in that,

Described plasma treatment is an etch processes, in the process chamber that carries out this etch processes, makes described weak action of plasma on described processed substrate.

10. one kind has the plasma processing apparatus of implementing the plasma processor structure of plasma treatment on processed substrate, it is characterized in that,

Have the described plasma processor structure of control, carry out claim 1～9 in the control unit of any one described method of plasma processing.

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