CN1588521A

CN1588521A - Organic light emitting display and its display unit

Info

Publication number: CN1588521A
Application number: CNA2004100791235A
Authority: CN
Inventors: 李国胜; 胡硕修
Original assignee: AU Optronics Corp
Current assignee: AUO Corp
Priority date: 2004-09-08
Filing date: 2004-09-08
Publication date: 2005-03-02
Anticipated expiration: 2024-09-08
Also published as: CN100346387C

Abstract

An organic light emitting display includes a display unit, a scan line, a data line, a reference line, and a main voltage line. The display unit comprises a first PMOS transistor, an organic light emitting diode and a capacitor. The first PMOS transistor generates a driving current. The organic light emitting diode emits light according to the driving current. The capacitor has a first end and a second end, and the first end and the second end selectively receive the data signal and the reference voltage respectively according to the control signal. The scan lines are used for transmitting scan signals. The data line is used for transmitting data signals. The reference line is used for outputting a reference voltage. The main voltage line is used for outputting a main voltage to the first PMOS transistor.

Description

Organic light emitting display and display unit thereof

Technical field

The relevant a kind of organic light emitting display of the present invention, and particularly relevant a kind of organic light emitting display and display unit thereof.

Background technology

Please refer to Fig. 1, it is the circuit diagram of traditional organic luminescence display unit.Organic luminescence display unit 100 comprises N type metal oxide semiconductor transistor (nmos pass transistor) T1, P-type mos transistor (PMOS transistor) T2, capacitor C 1 and Organic Light Emitting Diode (Organic Light Emitting Diode, OLED) O1.The drain electrode of nmos pass transistor T1 receives data-signal Data, and its grid receives sweep signal Scan.Capacitor C 1 has first end and second end, and its first end is coupled to the source electrode of nmos pass transistor T1, and its second termination is received principal voltage Vdd.Second end of the source electrode of PMOS transistor T 2 and capacitor C 1 couples, and its grid is that first end with capacitor C 1 couples, and its drain electrode is that the anode with Organic Light Emitting Diode O1 couples.The negative terminal of Organic Light Emitting Diode O1 is biased in low principal voltage Vss.

The luminosity of organic luminescence display unit 100 mainly is by the drive current I decision by Organic Light Emitting Diode O1.And drive current I is produced by PMOS transistor T 2, and the difference Vgs of the grid voltage of drive current I and PMOS transistor T 2 and source voltage has corresponding relation.The source voltage of PMOS transistor T 2 is to be principal voltage Vdd, and the grid voltage of PMOS transistor T 2 is the data-signal Data during for nmos pass transistor T1 conducting.

Please refer to Fig. 2, it is the traditional organic light emitting display (Organic Light EmittingDisplay) of expression.Organic light emitting display 200 comprise display unit 100 (1,1)-100 (m, n), sweep trace SL (1)-SL (m), data line DL (1)-DL (n) and principal voltage line VL (1)-VL (n).Sweep trace SL (1)-SL (m) is in order to transmit the grid of the nmos pass transistor T1 in the extremely corresponding display unit 100 of sweep signal Scan (1)-Scan (m) respectively.Data line DL (1)-DL (n) is in order to the drain electrode of the nmos pass transistor T1 of the correspondence of data signal Data (1)-Data (n) to the display unit 100.Principal voltage line VL (1)-VL (n) is in order to second end of the capacitor C 1 of output principal voltage Vdd to the display unit 100, and principal voltage Vdd is a definite value.Yet under the actual state, because the impedance meeting of principal voltage line VL (1)-VL (n) itself forms pressure drop to principal voltage Vdd.With point of the A among Fig. 2 and B point is example, A point and B point all by principal voltage line VL (2) so that identical principal voltage Vdd to be provided, but because of the electric current on the principal voltage line VL (2) and the cause of impedance thereof, and the principal voltage Vdd that the principal voltage Vdd that causes ordering at B is ordered than A because of pressure drop is low, promptly for the display unit 100 of diverse location, be actually and received the different principal voltage Vdd of each standard, therefore cause the brightness disproportionation of display unit 100 to reach and the difference of expecting brightness.

And the pressure drop of principal voltage line more causes another problem, is load effect (Loading effect).Please refer to Fig. 3, it is the synoptic diagram that traditional organic light emitting display shows complete white picture and shows first night of half white picture.Organic light emitting display 200 (1) is white portion D in order to show complete white picture.Organic light emitting display 200 (2) is divided into black region E and white portion F in order to show white picture first night half.Tradition organic light emitting display 200 (1) display white region D require to be I if suppose it for the magnitude of current on the principal voltage line VL.Then traditional organic light emitting display 200 (2) shows black region E and white portion F, and because of the voltage of the display unit of white portion F only need be provided, the magnitude of current on the principal voltage line VL only need to require 0.5I.And it is desirable to, white portion D and white portion F, brightness should be identical.But the magnitude of current that requires because of white portion D is bigger, also causes the pressure drop of principal voltage Vdd bigger, makes the brightness of white portion D less on the contrary; The magnitude of current of reviewing white portion F requirement is less, and the pressure drop of the principal voltage Vdd of white portion F is less, and the brightness that makes white portion F is near desirable and big than the brightness of white portion D.When this load effect can make organic light emitting display display frame, not only can't reach the brightness of expection, and the brightness of white portion F that makes first night of half white picture on the contrary makes display effect desirable not to the utmost greater than the brightness of the white portion D of complete white picture.

When organic active display is applied in the different electronic products, the different principal voltage Vdd that electronic product provided may be different, in order to reach the pixel intensity of demand, then needs extra adjustment circuit, or increase external circuit and adjust voltage, do not conform to economic benefit and increase cost.

Summary of the invention

In view of this, the purpose of this invention is to provide a kind of organic light emitting display, its display unit is not influenced by the step-down of principal voltage, and does not have the problem of luminosity inequality, also is not subjected to the restriction of principal voltage and need increases extra circuit.

Organic light emitting display of the present invention comprises display unit, sweep trace, data line, reference line, reaches the principal voltage line.Display unit comprises electric capacity, a PMOS transistor, reaches Organic Light Emitting Diode.Electric capacity tool first end and second end, first end and second end optionally receive data-signal and reference voltage respectively according to sweep signal.First end of the one its grid of PMOS transistor and electric capacity couples.Organic Light Emitting Diode is coupled to a PMOS transistor.When the sweep signal activation, first end and second end of electric capacity receive data-signal and reference voltage respectively.And when the sweep signal disabled, the transistorized source electrode of the one PMOS is biased in principal voltage, and the transistorized source electrode of a PMOS is coupled to second end of electric capacity, make the voltage difference of transistorized source electrode of a PMOS and grid equal the cross-pressure of electric capacity, PMOS transistor output corresponds to the drive current of difference of data-signal and reference voltage to Organic Light Emitting Diode.Sweep trace is in order to transmit sweep signal.Data line is in order to data signal.Reference line is in order to output reference voltage.The principal voltage line is in order to the output principal voltage.

For above-mentioned purpose of the present invention, feature and advantage can be become apparent, be elaborated especially exemplified by a preferred embodiment and conjunction with figs. below.

Description of drawings

Fig. 1 is the circuit diagram of traditional organic luminescence display unit.

Fig. 2 is the synoptic diagram of traditional organic light emitting display.

Fig. 3 is traditional complete white picture of organic light emitting display demonstration and the synoptic diagram that shows first night of half white picture.

Fig. 4 is the circuit diagram of the organic luminescence display unit of a preferred embodiment of the present invention.

Fig. 5 is the synoptic diagram of the organic light emitting display of a preferred embodiment of the present invention.

Embodiment

Please refer to Fig. 4, it is the circuit diagram of the organic luminescence display unit of a preferred embodiment of the present invention.Organic luminescence display unit 400 comprises PMOS transistor Q4, Organic Light Emitting Diode O2, capacitor C 2, the first switch Q1, second switch Q2 and the 3rd switch Q3.PMOS transistor Q4 is in order to produce drive current Id, and its source electrode is to couple with the 3rd switch Q3, and its drain electrode couples with the anode of Organic Light Emitting Diode O2.Organic Light Emitting Diode O2 is luminous according to drive current Id, and its negative terminal is coupled to a low principal voltage Vss.Capacitor C 2 tools, first end and second end, first end and the first switch Q1 couple and couple with the grid of PMOS transistor Q4, second end and second switch Q2 couple, and the 3rd switch Q3 is coupled between capacitor C 2 and the PMOS transistor Q4, and for example the 3rd switch Q3 connects second end of capacitor C 2 and the source electrode of PMOS transistor Q4.

The first switch Q1 is controlled by sweep signal Scan, is nmos pass transistor in the present embodiment, and its drain electrode receives data-signal Data, and its grid receives sweep signal Scan, and its source electrode is that first end with capacitor C 2 couples.Second switch Q2 is controlled by sweep signal Scan, is nmos pass transistor in the present embodiment, and its drain electrode receives reference voltage Vref, and its grid receives sweep signal Scan, and its source electrode is that second end with capacitor C 2 couples.The 3rd switch Q3 is controlled by sweep signal Scan, is the PMOS transistor in the present embodiment, and its drain electrode is that second end with capacitor C 2 couples, and its grid receives sweep signal Scan, and the source electrode of its source electrode and this PMOS transistor Q4 couples.

When sweep signal Scan activation, the first switch Q1 and second switch Q2 conducting, the 3rd not conducting of switch Q3, data-signal Data is sent to first end of capacitor C 2 through the first switch Q1, reference voltage Vref inputs to second end of capacitor C 2 through second switch Q2, and this moment, the cross-pressure Vc of capacitor C 2 was the difference Va of reference voltage Vref and data-signal Data.And the action of charging is only done in the effect of reference voltage Vref to capacitor C 2 at this moment, after the charging action is finished, just no longer includes current direction capacitor C 2, so reference voltage Vref does not have the problem of pressure drop, and it is accurate to be maintained fixed the position.When sweep signal Scan disabled, the first switch Q1 and not conducting of second switch Q2, the 3rd switch Q3 conducting, make capacitor C 2 and PMOS transistor Q4 electrically connect, the source electrode of PMOS transistor Q4 is that the voltage difference Vgs that is biased in the source electrode of principal voltage Vdd and PMOS transistor Q4 and grid is that the cross-pressure Vc that equals capacitor C 2 is difference Va, and PMOS transistor Q4 produces the drive current Id that corresponds to difference Va.

Please refer to Fig. 5, it is the organic light emitting display (Organic LightEmitting Display) of a preferred embodiment of the present invention.Organic light emitting display 500 comprise display unit 400 (1,1)-400 (m, n), sweep trace SL (1)-SL (m), data line DL (1)-DL (n), principal voltage line VL (1)-VL (n), and reference line RL (1)-RL (m).Sweep trace SL (1)-SL (m) is in order to transmit sweep signal Scan (1)-Scan (m) respectively to corresponding display unit 400.Data line DL (1)-DL (n) in order to data signal Data (1)-Data (n) to display unit 400.Reference line RL (1)-RL (m) in order to output reference voltage Vref to display unit 400.Principal voltage line VL (1)-VL (n) is in order to export principal voltage Vdd to display unit 400.

In this example, when the first switch Q1 in the display unit 400 reached with nmos pass transistor, its drain electrode coupled to receive data-signal Data with data line DL, and its grid is coupled to sweep trace SL and receives sweep signal Scan, and its source electrode is coupled to first end of capacitor C 2.When the second switch Q2 in the display unit 400 reached with nmos pass transistor, its drain electrode coupled to receive reference voltage Vref with reference line RL, and its grid is coupled to sweep trace SL to receive sweep signal Scan, and its source electrode is coupled to second end of capacitor C 2.When the 3rd switch Q3 in the display unit 400 reached with the PMOS transistor, its grid was coupled to sweep trace SL to receive sweep signal Scan, and its source electrode and principal voltage line Vd couple to receive principal voltage Vdd, and its drain electrode is coupled to second end of capacitor C 2.

Organic light emitting display that the above embodiment of the present invention disclosed and display unit thereof, because of the brightness of display unit is difference decision by reference voltage and data-signal, and the position standard of reference voltage is for fixing, even principal voltage has the phenomenon of pressure drop, can not produce the brightness influence to Organic Light Emitting Diode yet.Therefore more can be because of load effect, brightness is followed expect difference to some extent.And make its brightness evenly and can follow expection brightness difference to some extent.If the principal voltage that supply is different also need not increase extra circuit arrangement again, the demand of direct applicable different product is so the present invention has more the advantage that reduces cost.

In sum; though the present invention discloses as above with a preferred embodiment; yet it is not in order to limit the present invention; any person skilled in the art person without departing from the spirit and scope of the present invention; when the change that can do various equivalences or replacement, so protection scope of the present invention is when looking accompanying being as the criterion that the application's claim scope defined.

Claims

1. An organic light emitting display unit, comprising:

A capacitor with a first end and a second end, the first end and the second end selectively receive a data signal and a reference voltage respectively according to a scanning signal;

a first P-type metal oxide semiconductor transistor (PMOS transistor), the gate of which is coupled to the first end of the capacitor; and

an organic light emitting diode coupled to the first PMOS transistor;

Wherein, when the scan signal is enabled, the first terminal and the second terminal of the capacitor respectively receive the data signal and the reference voltage; and

When the scan signal is disabled, the source of the first PMOS transistor is biased at a main voltage, and the source of the first PMOS transistor is coupled to the second end of the capacitor, so that the first PMOS The voltage difference between the source and the gate of the transistor is equal to the voltage across the capacitor, and the first PMOS transistor outputs a driving current corresponding to the difference between the data signal and the reference voltage to the organic light emitting diode.

2. The unit of claim 1, further comprising:

a first switch, controlled by the scan signal, coupled to the first end of the capacitor, for selectively transmitting the data signal;

a second switch, controlled by the scan signal, coupled to the second end of the capacitor, for selectively outputting the reference voltage; and

a third switch, controlled by the scan signal, coupled to the source of the first PMOS, for selectively outputting the main voltage;

Wherein, when the scan signal is enabled, the first switch and the second switch are turned on, the third switch is not turned on, the first switch transmits the data signal, and the second switch outputs the reference voltage; and

When the scan signal is disabled, the first switch and the second switch are not turned on, and the third switch is turned on to output the main voltage.

3. The unit according to claim 2, wherein the first switch is an N-type metal oxide semiconductor transistor (NMOS transistor), the drain of the NMOS transistor receives the data signal, and the gate of the NMOS transistor receives the data signal. For the scan signal, the source of the NMOS transistor is coupled to the first terminal of the capacitor.

4. The unit according to claim 2, wherein the second switch is an NMOS transistor, the drain of the NMOS transistor receives the reference voltage, the gate of the NMOS transistor receives the scan signal, and the source of the NMOS transistor The pole is coupled to the second end of the capacitor.

5. The unit according to claim 2, wherein the third switch is a second PMOS transistor, the drain of the second PMOS transistor is coupled to the second end of the capacitor, and the second PMOS transistor The gate receives the scan signal, and the source of the second PMOS transistor is coupled to the source of the first PMOS transistor.

6. The unit of claim 2, wherein the third switch connects the second terminal of the capacitor to the source of the first PMOS transistor.

7. An organic light emitting display unit, comprising:

a first switch controlled by a scanning signal;

a second switch controlled by the scan signal;

a third switch controlled by the scan signal;

a first PMOS transistor, used to generate a driving current, the source of the first PMOS transistor is coupled to the third switch;

an organic light emitting diode emitting light according to the driving current; and

A capacitor has a first end and a second end, the first end is coupled to the first switch, the second end is coupled to the second switch, the third switch is coupled between the capacitor and the PMOS between transistors;

Wherein, when the scan signal is enabled, the first switch and the second switch are turned on, the third switch is not turned on, a data signal is input to the first end of the capacitor through the first switch, and a reference a voltage is input to the second end of the capacitor through the second switch, and the voltage across the capacitor is the difference between the reference voltage and the data signal; and

When the scan signal is disabled, the first switch and the second switch are not turned on, and the third switch is turned on, so that the capacitor is electrically connected to the first PMOS transistor, and the source of the first PMOS transistor The first PMOS transistor is biased at a main voltage and the voltage difference between the source and the gate of the first PMOS transistor is equal to the voltage across the capacitor, and the first PMOS transistor generates the driving current corresponding to the difference.

8. The unit according to claim 7, wherein the first switch is an NMOS transistor, the drain of the NMOS transistor receives the data signal, the gate of the NMOS transistor receives the scan signal, and the source of the NMOS transistor The pole is coupled to the first end of the capacitor.

9. The unit according to claim 7, wherein the second switch is an NMOS transistor, the drain of the NMOS transistor receives the reference voltage, the gate of the NMOS transistor receives the scan signal, and the source of the NMOS transistor The pole is coupled to the second end of the capacitor.

10. The unit according to claim 7, wherein the third switch is a second PMOS transistor, the drain of the second PMOS transistor is coupled to the second end of the capacitor, and the second PMOS transistor The gate receives the scan signal, and the source of the second PMOS transistor is coupled to the source of the first PMOS transistor.

11. The unit of claim 7, wherein the third switch connects the second end of the capacitor to the source of the first PMOS transistor.